From 2d00b675bf9b7143511ebb4a4c1ca0bbe7f35fea Mon Sep 17 00:00:00 2001 From: Mark Poliakov Date: Mon, 11 Oct 2021 18:35:06 +0300 Subject: [PATCH] feat: only map GICD regs once --- kernel/src/arch/aarch64/irq/gic/mod.rs | 9 ++++----- kernel/src/mem/virt/mod.rs | 9 +++++++++ 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/kernel/src/arch/aarch64/irq/gic/mod.rs b/kernel/src/arch/aarch64/irq/gic/mod.rs index 2665cae..11fdf74 100644 --- a/kernel/src/arch/aarch64/irq/gic/mod.rs +++ b/kernel/src/arch/aarch64/irq/gic/mod.rs @@ -4,7 +4,7 @@ use crate::dev::{ irq::{IntController, IntSource, IrqContext}, Device, }; -use crate::mem::virt::DeviceMemoryIo; +use crate::mem::virt::{DeviceMemoryIo, DeviceMemory}; use crate::sync::IrqSafeNullLock; use crate::util::InitOnce; use error::Errno; @@ -52,10 +52,9 @@ impl Device for Gic { } unsafe fn enable(&self) -> Result<(), Errno> { - let gicd_mmio_shared = - DeviceMemoryIo::map("GICv2 shared Distributor registers", self.gicd_base, 1)?; - let gicd_mmio_banked = - DeviceMemoryIo::map("GICv2 banked Distributor registers", self.gicd_base, 1)?; + let gicd_mmio = DeviceMemory::map("GICv2 Distributor registers", self.gicd_base, 1)?; + let gicd_mmio_shared = DeviceMemoryIo::new(gicd_mmio.clone()); + let gicd_mmio_banked = DeviceMemoryIo::new(gicd_mmio); let gicc_mmio = DeviceMemoryIo::map("GICv2 CPU registers", self.gicc_base, 1)?; let mut gicd = Gicd::new(gicd_mmio_shared, gicd_mmio_banked); diff --git a/kernel/src/mem/virt/mod.rs b/kernel/src/mem/virt/mod.rs index fcb3bb0..eb0d4ba 100644 --- a/kernel/src/mem/virt/mod.rs +++ b/kernel/src/mem/virt/mod.rs @@ -111,6 +111,15 @@ impl DeviceMemory { Ok(Self { name, base, count }) } + + pub unsafe fn clone(&self) -> Self { + // TODO maybe add refcount and remove "unsafe"? + Self { + name: self.name, + base: self.base, + count: self.count + } + } } impl DeviceMemoryIo {