tidy: format sources
This commit is contained in:
@@ -3,7 +3,7 @@
|
||||
|
||||
use tock_registers::{
|
||||
interfaces::{Readable, Writeable},
|
||||
register_bitfields
|
||||
register_bitfields,
|
||||
};
|
||||
|
||||
register_bitfields! {
|
||||
|
||||
@@ -1,6 +1,9 @@
|
||||
#![allow(missing_docs)]
|
||||
|
||||
use crate::mem::{self, phys::{self, PageUsage}};
|
||||
use crate::mem::{
|
||||
self,
|
||||
phys::{self, PageUsage},
|
||||
};
|
||||
use core::mem::size_of;
|
||||
|
||||
struct Stack {
|
||||
@@ -10,8 +13,8 @@ struct Stack {
|
||||
|
||||
#[repr(C)]
|
||||
pub struct Context {
|
||||
pub k_sp: usize, // 0x00
|
||||
pub ttbr0: usize, // 0x08
|
||||
pub k_sp: usize, // 0x00
|
||||
pub ttbr0: usize, // 0x08
|
||||
|
||||
stack_base_phys: usize,
|
||||
stack_page_count: usize,
|
||||
@@ -29,24 +32,24 @@ impl Context {
|
||||
stack.push(ustack);
|
||||
|
||||
stack.push(__aa64_ctx_enter_kernel as usize); // x30/lr
|
||||
stack.push(0); // x29
|
||||
stack.push(0); // x28
|
||||
stack.push(0); // x27
|
||||
stack.push(0); // x26
|
||||
stack.push(0); // x25
|
||||
stack.push(0); // x24
|
||||
stack.push(0); // x23
|
||||
stack.push(0); // x22
|
||||
stack.push(0); // x21
|
||||
stack.push(0); // x20
|
||||
stack.push(0); // x19
|
||||
stack.push(0); // x29
|
||||
stack.push(0); // x28
|
||||
stack.push(0); // x27
|
||||
stack.push(0); // x26
|
||||
stack.push(0); // x25
|
||||
stack.push(0); // x24
|
||||
stack.push(0); // x23
|
||||
stack.push(0); // x22
|
||||
stack.push(0); // x21
|
||||
stack.push(0); // x20
|
||||
stack.push(0); // x19
|
||||
|
||||
Self {
|
||||
k_sp: stack.sp,
|
||||
ttbr0,
|
||||
|
||||
stack_base_phys: stack.bp,
|
||||
stack_page_count: 8
|
||||
stack_page_count: 8,
|
||||
}
|
||||
}
|
||||
|
||||
@@ -66,7 +69,7 @@ impl Stack {
|
||||
let bp = mem::virtualize(phys);
|
||||
Stack {
|
||||
bp,
|
||||
sp: bp + page_count * mem::PAGE_SIZE
|
||||
sp: bp + page_count * mem::PAGE_SIZE,
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -38,9 +38,7 @@ pub(super) struct Gicc {
|
||||
|
||||
impl Gicc {
|
||||
pub const unsafe fn new(regs: DeviceMemoryIo<GiccRegs>) -> Self {
|
||||
Self {
|
||||
regs,
|
||||
}
|
||||
Self { regs }
|
||||
}
|
||||
|
||||
pub unsafe fn enable(&self) {
|
||||
|
||||
@@ -4,7 +4,7 @@ use crate::dev::{
|
||||
irq::{IntController, IntSource, IrqContext},
|
||||
Device,
|
||||
};
|
||||
use crate::mem::virt::{DeviceMemoryIo, DeviceMemory};
|
||||
use crate::mem::virt::{DeviceMemory, DeviceMemoryIo};
|
||||
use crate::sync::IrqSafeNullLock;
|
||||
use crate::util::InitOnce;
|
||||
use error::Errno;
|
||||
|
||||
@@ -90,7 +90,11 @@ impl Device for Rtc {
|
||||
}
|
||||
|
||||
unsafe fn enable(&self) -> Result<(), Errno> {
|
||||
self.regs.init(IrqSafeNullLock::new(DeviceMemoryIo::map(self.name(), self.base, 1)?));
|
||||
self.regs.init(IrqSafeNullLock::new(DeviceMemoryIo::map(
|
||||
self.name(),
|
||||
self.base,
|
||||
1,
|
||||
)?));
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,16 +1,14 @@
|
||||
use crate::arch::{
|
||||
machine::{self, IrqNumber},
|
||||
};
|
||||
use crate::sync::IrqSafeNullLock;
|
||||
use crate::util::InitOnce;
|
||||
use crate::mem::virt::DeviceMemoryIo;
|
||||
use crate::arch::machine::{self, IrqNumber};
|
||||
use crate::dev::{
|
||||
irq::{IntController, IntSource},
|
||||
serial::SerialDevice,
|
||||
Device,
|
||||
};
|
||||
use crate::mem::virt::DeviceMemoryIo;
|
||||
use crate::sync::IrqSafeNullLock;
|
||||
use crate::util::InitOnce;
|
||||
use error::Errno;
|
||||
use tock_registers::interfaces::{Readable, Writeable, ReadWriteable};
|
||||
use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
|
||||
use tock_registers::registers::{Aliased, ReadOnly, ReadWrite};
|
||||
use tock_registers::{register_bitfields, register_structs};
|
||||
|
||||
@@ -75,13 +73,13 @@ register_structs! {
|
||||
}
|
||||
|
||||
struct UartInner {
|
||||
regs: DeviceMemoryIo<Regs>
|
||||
regs: DeviceMemoryIo<Regs>,
|
||||
}
|
||||
|
||||
pub(super) struct Uart {
|
||||
inner: InitOnce<IrqSafeNullLock<UartInner>>,
|
||||
base: usize,
|
||||
irq: IrqNumber
|
||||
irq: IrqNumber,
|
||||
}
|
||||
|
||||
impl Device for Uart {
|
||||
@@ -91,7 +89,7 @@ impl Device for Uart {
|
||||
|
||||
unsafe fn enable(&self) -> Result<(), Errno> {
|
||||
let mut inner = UartInner {
|
||||
regs: DeviceMemoryIo::map(self.name(), self.base, 1)?
|
||||
regs: DeviceMemoryIo::map(self.name(), self.base, 1)?,
|
||||
};
|
||||
// TODO
|
||||
self.inner.init(IrqSafeNullLock::new(inner));
|
||||
@@ -134,7 +132,7 @@ impl IntSource for Uart {
|
||||
}
|
||||
}
|
||||
|
||||
use crate::dev::gpio::{GpioDevice};
|
||||
use crate::dev::gpio::GpioDevice;
|
||||
machine::GPIO.toggle_pin(machine::PinAddress::new(3, 26));
|
||||
Ok(())
|
||||
}
|
||||
@@ -153,7 +151,7 @@ impl Uart {
|
||||
Self {
|
||||
inner: InitOnce::new(),
|
||||
base,
|
||||
irq
|
||||
irq,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,4 +1,7 @@
|
||||
use crate::dev::{Device, irq::{IntController, IntSource, IrqContext}};
|
||||
use crate::dev::{
|
||||
irq::{IntController, IntSource, IrqContext},
|
||||
Device,
|
||||
};
|
||||
use error::Errno;
|
||||
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
@@ -20,7 +23,11 @@ impl Device for Bcm283xIntController {
|
||||
impl IntController for Bcm283xIntController {
|
||||
type IrqNumber = IrqNumber;
|
||||
|
||||
fn register_handler(&self, irq: IrqNumber, handler: &'static (dyn IntSource + Sync)) -> Result<(), Errno> {
|
||||
fn register_handler(
|
||||
&self,
|
||||
irq: IrqNumber,
|
||||
handler: &'static (dyn IntSource + Sync),
|
||||
) -> Result<(), Errno> {
|
||||
todo!()
|
||||
}
|
||||
|
||||
|
||||
@@ -1,19 +1,19 @@
|
||||
//! ARM generic timer implementation
|
||||
|
||||
use crate::arch::machine::{self, IrqNumber};
|
||||
use crate::dev::{
|
||||
irq::{IntController, IntSource},
|
||||
timer::TimestampSource,
|
||||
Device,
|
||||
};
|
||||
use crate::arch::machine::{self, IrqNumber};
|
||||
use core::time::Duration;
|
||||
use cortex_a::registers::{CNTFRQ_EL0, CNTP_TVAL_EL0, CNTPCT_EL0, CNTP_CTL_EL0};
|
||||
use cortex_a::registers::{CNTFRQ_EL0, CNTPCT_EL0, CNTP_CTL_EL0, CNTP_TVAL_EL0};
|
||||
use error::Errno;
|
||||
use tock_registers::interfaces::{Readable, Writeable};
|
||||
|
||||
/// Generic timer struct
|
||||
pub struct GenericTimer {
|
||||
irq: IrqNumber
|
||||
irq: IrqNumber,
|
||||
}
|
||||
|
||||
///
|
||||
@@ -58,8 +58,6 @@ impl TimestampSource for GenericTimer {
|
||||
impl GenericTimer {
|
||||
/// Constructs a new instance of ARM Generic Timer
|
||||
pub const fn new(irq: IrqNumber) -> Self {
|
||||
Self {
|
||||
irq
|
||||
}
|
||||
Self { irq }
|
||||
}
|
||||
}
|
||||
|
||||
@@ -14,7 +14,11 @@ pub trait IntController: Device {
|
||||
type IrqNumber;
|
||||
|
||||
/// Binds a handler [IntSource] to a specific [irq] line
|
||||
fn register_handler(&self, irq: Self::IrqNumber, handler: &'static (dyn IntSource + Sync)) -> Result<(), Errno>;
|
||||
fn register_handler(
|
||||
&self,
|
||||
irq: Self::IrqNumber,
|
||||
handler: &'static (dyn IntSource + Sync),
|
||||
) -> Result<(), Errno>;
|
||||
|
||||
/// Enables/unmasks [irq] line
|
||||
fn enable_irq(&self, irq: Self::IrqNumber) -> Result<(), Errno>;
|
||||
|
||||
+2
-2
@@ -9,7 +9,7 @@
|
||||
const_fn_trait_bound,
|
||||
const_panic,
|
||||
panic_info_message,
|
||||
alloc_error_handler,
|
||||
alloc_error_handler
|
||||
)]
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
@@ -27,9 +27,9 @@ pub mod debug;
|
||||
pub mod arch;
|
||||
pub mod dev;
|
||||
pub mod mem;
|
||||
pub mod proc;
|
||||
pub mod sync;
|
||||
pub mod util;
|
||||
pub mod proc;
|
||||
|
||||
#[panic_handler]
|
||||
fn panic_handler(pi: &core::panic::PanicInfo) -> ! {
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
use crate::util::InitOnce;
|
||||
use crate::sync::IrqSafeNullLock;
|
||||
use crate::util::InitOnce;
|
||||
use core::alloc::{GlobalAlloc, Layout};
|
||||
use core::ptr::null_mut;
|
||||
|
||||
@@ -36,8 +36,7 @@ impl Heap {
|
||||
(self.base + ptr) as *mut u8
|
||||
}
|
||||
|
||||
unsafe fn dealloc(&mut self, _ptr: *mut u8, _layout: Layout) {
|
||||
}
|
||||
unsafe fn dealloc(&mut self, _ptr: *mut u8, _layout: Layout) {}
|
||||
}
|
||||
|
||||
#[alloc_error_handler]
|
||||
@@ -51,11 +50,7 @@ static SYSTEM_ALLOC: SystemAlloc = SystemAlloc;
|
||||
static HEAP: InitOnce<IrqSafeNullLock<Heap>> = InitOnce::new();
|
||||
|
||||
pub unsafe fn init(base: usize, size: usize) {
|
||||
let heap = Heap {
|
||||
base,
|
||||
size,
|
||||
ptr: 0
|
||||
};
|
||||
let heap = Heap { base, size, ptr: 0 };
|
||||
|
||||
debugln!("Kernel heap: {:#x}..{:#x}", base, base + size);
|
||||
|
||||
|
||||
@@ -1,9 +1,9 @@
|
||||
//! Memory management and functions module
|
||||
#![allow(missing_docs)]
|
||||
|
||||
pub mod heap;
|
||||
pub mod phys;
|
||||
pub mod virt;
|
||||
pub mod heap;
|
||||
|
||||
/// Virtual offset applied to kernel address space
|
||||
pub const KERNEL_OFFSET: usize = 0xFFFFFF8000000000;
|
||||
|
||||
@@ -35,15 +35,17 @@ static mut RESERVED_REGIONS_HEAD: *mut ReservedRegion = null_mut();
|
||||
static mut RESERVED_REGION_KERNEL: MaybeUninit<ReservedRegion> = MaybeUninit::uninit();
|
||||
static mut RESERVED_REGION_PAGES: MaybeUninit<ReservedRegion> = MaybeUninit::uninit();
|
||||
pub unsafe fn reserve(usage: &str, region: *mut ReservedRegion) {
|
||||
debugln!("Reserving {:?} region: {:#x}..{:#x}", usage, (*region).start, (*region).end);
|
||||
debugln!(
|
||||
"Reserving {:?} region: {:#x}..{:#x}",
|
||||
usage,
|
||||
(*region).start,
|
||||
(*region).end
|
||||
);
|
||||
(*region).next = RESERVED_REGIONS_HEAD;
|
||||
RESERVED_REGIONS_HEAD = region;
|
||||
}
|
||||
pub(super) unsafe fn reserve_kernel() {
|
||||
RESERVED_REGION_KERNEL.write(ReservedRegion::new(
|
||||
0,
|
||||
kernel_end_phys(),
|
||||
));
|
||||
RESERVED_REGION_KERNEL.write(ReservedRegion::new(0, kernel_end_phys()));
|
||||
reserve("kernel", RESERVED_REGION_KERNEL.as_mut_ptr());
|
||||
}
|
||||
pub(super) unsafe fn reserve_pages(base: usize, count: usize) {
|
||||
@@ -63,4 +65,3 @@ pub fn is_reserved(page: usize) -> bool {
|
||||
}
|
||||
false
|
||||
}
|
||||
|
||||
|
||||
@@ -2,8 +2,8 @@ use crate::mem::{
|
||||
self,
|
||||
phys::{self, PageUsage},
|
||||
};
|
||||
use error::Errno;
|
||||
use core::ops::{Index, IndexMut};
|
||||
use error::Errno;
|
||||
|
||||
#[derive(Clone, Copy)]
|
||||
#[repr(transparent)]
|
||||
@@ -50,7 +50,9 @@ impl Table {
|
||||
}
|
||||
|
||||
pub const fn empty() -> Table {
|
||||
Table { entries: [Entry::invalid(); 512] }
|
||||
Table {
|
||||
entries: [Entry::invalid(); 512],
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
+4
-4
@@ -1,8 +1,8 @@
|
||||
//! Synchronization facilities module
|
||||
|
||||
use crate::arch::platform::{irq_mask_save, irq_restore};
|
||||
use core::cell::UnsafeCell;
|
||||
use core::ops::{Deref, DerefMut};
|
||||
use crate::arch::platform::{irq_mask_save, irq_restore};
|
||||
|
||||
/// Same as [NullLock], but ensures IRQs are disabled while
|
||||
/// the lock is held
|
||||
@@ -14,7 +14,7 @@ pub struct IrqSafeNullLock<T: ?Sized> {
|
||||
/// when dropped
|
||||
pub struct IrqSafeNullLockGuard<'a, T: ?Sized> {
|
||||
value: &'a mut T,
|
||||
irq_state: u64
|
||||
irq_state: u64,
|
||||
}
|
||||
|
||||
impl<T> IrqSafeNullLock<T> {
|
||||
@@ -22,7 +22,7 @@ impl<T> IrqSafeNullLock<T> {
|
||||
#[inline(always)]
|
||||
pub const fn new(value: T) -> Self {
|
||||
Self {
|
||||
value: UnsafeCell::new(value)
|
||||
value: UnsafeCell::new(value),
|
||||
}
|
||||
}
|
||||
|
||||
@@ -32,7 +32,7 @@ impl<T> IrqSafeNullLock<T> {
|
||||
unsafe {
|
||||
IrqSafeNullLockGuard {
|
||||
value: &mut *self.value.get(),
|
||||
irq_state: irq_mask_save()
|
||||
irq_state: irq_mask_save(),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user