From 195c19e22560da06f1962b4b1b115a59505b9190 Mon Sep 17 00:00:00 2001 From: Mark Poliakov Date: Fri, 16 Jan 2026 23:18:46 +0200 Subject: [PATCH] serial: unify 8250 drivers, better dts support --- Cargo.lock | 53 +- doc/visionfive2.txt | 5 +- etc/dtb/aarch64-qemu-virt.dtb | Bin 1048576 -> 0 bytes etc/dtb/{ => aarch64}/aarch64-qemu-virt.dts | 16 +- etc/dtb/aarch64/bcm2711-rpi-4-b.dts | 492 +++ etc/dtb/aarch64/gicv2.h | 14 + etc/dtb/bcm2711-rpi-4-b.dtb | Bin 36792 -> 0 bytes etc/dtb/bcm2711-rpi-4-b.dts | 1907 ------------ etc/dtb/jh7110-starfive-visionfive-v1.3b.dts | 2757 ----------------- etc/dtb/riscv64-qemu-virt.dtb | Bin 5072 -> 0 bytes etc/dtb/riscv64/jh7110-pinctrl.h | 308 ++ .../jh7110-starfive-visionfive-v1.3b.dts | 1141 +++++++ etc/dtb/{ => riscv64}/riscv64-qemu-virt.dts | 14 +- kernel/Cargo.toml | 1 + kernel/arch/hosted/src/lib.rs | 10 +- kernel/driver/bsp/arm/src/pl011.rs | 28 +- kernel/driver/bsp/bcm283x/src/aux_uart.rs | 33 +- kernel/driver/bsp/jh7110/src/clocks.rs | 20 + kernel/driver/serial/uart8250/Cargo.toml | 21 + kernel/driver/serial/uart8250/src/fdt.rs | 180 ++ kernel/driver/serial/uart8250/src/io.rs | 81 + kernel/driver/serial/uart8250/src/lib.rs | 120 + kernel/driver/serial/uart8250/src/port.rs | 257 ++ kernel/lib/device-tree/src/driver/tree.rs | 24 +- kernel/libk/src/device/display/console.rs | 9 +- kernel/libk/src/vfs/pty.rs | 11 +- kernel/libk/src/vfs/terminal.rs | 31 +- kernel/src/arch/riscv64/mod.rs | 5 + kernel/src/arch/x86/mod.rs | 39 +- kernel/src/arch/x86/peripherals/mod.rs | 1 - kernel/src/arch/x86/peripherals/serial.rs | 218 -- kernel/src/device/mod.rs | 1 - kernel/src/device/serial/mod.rs | 6 - kernel/src/device/serial/ns16550a.rs | 204 -- kernel/src/device/serial/snps_dw_apb_uart.rs | 304 -- kernel/src/main.rs | 1 + userspace/lib/cross/src/io.rs | 8 + userspace/lib/cross/src/sys/mod.rs | 6 + userspace/lib/cross/src/sys/unix/mod.rs | 2 +- userspace/lib/cross/src/sys/unix/poll.rs | 2 +- userspace/lib/cross/src/sys/unix/pty.rs | 8 + userspace/lib/cross/src/sys/unix/term.rs | 8 + userspace/lib/cross/src/sys/yggdrasil/mod.rs | 4 +- userspace/lib/cross/src/sys/yggdrasil/pty.rs | 8 + .../lib/cross/src/sys/yggdrasil/socket.rs | 2 +- userspace/lib/cross/src/sys/yggdrasil/term.rs | 15 + userspace/lib/cross/src/term.rs | 8 + userspace/sysutils/src/login.rs | 89 +- userspace/tools/crypt/src/lib.rs | 2 +- userspace/tools/crypt/src/main.rs | 4 +- userspace/tools/crypt/src/rsa/mod.rs | 2 +- userspace/tools/md2txt/src/main.rs | 2 +- userspace/tools/rdb/src/debugger.rs | 6 +- userspace/tools/rdb/src/state.rs | 18 +- userspace/tools/rdb/src/x86.rs | 2 +- userspace/tools/red/src/command.rs | 2 +- userspace/tools/red/src/config.rs | 2 +- userspace/tools/rsh/src/crypt/client.rs | 8 +- userspace/tools/rsh/src/crypt/config.rs | 7 +- userspace/tools/rsh/src/crypt/server.rs | 6 +- userspace/tools/rsh/src/crypt/stream.rs | 3 +- .../tools/rsh/src/crypt/symmetric/aes_gcm.rs | 9 +- .../src/crypt/symmetric/chacha20poly1305.rs | 5 +- userspace/tools/rsh/src/lib.rs | 2 +- userspace/tools/rsh/src/main.rs | 4 +- userspace/tools/rsh/src/server.rs | 2 +- userspace/tools/rsh/src/socket.rs | 1 + userspace/tools/shell/src/command/eval.rs | 4 +- userspace/tools/shell/src/env.rs | 2 +- userspace/tools/shell/src/exec.rs | 2 +- userspace/tools/shell/src/main.rs | 5 +- userspace/tools/shell/src/syntax/lex.rs | 8 +- userspace/tools/shell/src/syntax/parse.rs | 10 +- userspace/tools/strace/src/tracer.rs | 2 +- xtask/Cargo.toml | 1 + xtask/src/build/device_tree.rs | 95 + xtask/src/build/mod.rs | 31 +- xtask/src/build/x86_64.rs | 2 +- xtask/src/env.rs | 9 + xtask/src/error.rs | 2 + xtask/src/main.rs | 15 + xtask/src/qemu.rs | 42 +- xtask/src/util.rs | 2 +- 83 files changed, 3191 insertions(+), 5600 deletions(-) delete mode 100644 etc/dtb/aarch64-qemu-virt.dtb rename etc/dtb/{ => aarch64}/aarch64-qemu-virt.dts (98%) create mode 100644 etc/dtb/aarch64/bcm2711-rpi-4-b.dts create mode 100644 etc/dtb/aarch64/gicv2.h delete mode 100644 etc/dtb/bcm2711-rpi-4-b.dtb delete mode 100644 etc/dtb/bcm2711-rpi-4-b.dts delete mode 100644 etc/dtb/jh7110-starfive-visionfive-v1.3b.dts delete mode 100644 etc/dtb/riscv64-qemu-virt.dtb create mode 100644 etc/dtb/riscv64/jh7110-pinctrl.h create mode 100644 etc/dtb/riscv64/jh7110-starfive-visionfive-v1.3b.dts rename etc/dtb/{ => riscv64}/riscv64-qemu-virt.dts (95%) create mode 100644 kernel/driver/serial/uart8250/Cargo.toml create mode 100644 kernel/driver/serial/uart8250/src/fdt.rs create mode 100644 kernel/driver/serial/uart8250/src/io.rs create mode 100644 kernel/driver/serial/uart8250/src/lib.rs create mode 100644 kernel/driver/serial/uart8250/src/port.rs delete mode 100644 kernel/src/arch/x86/peripherals/serial.rs delete mode 100644 kernel/src/device/serial/mod.rs delete mode 100644 kernel/src/device/serial/ns16550a.rs delete mode 100644 kernel/src/device/serial/snps_dw_apb_uart.rs create mode 100644 xtask/src/build/device_tree.rs diff --git a/Cargo.lock b/Cargo.lock index 7067179e..cb6b9f4d 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1199,9 +1199,9 @@ checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" [[package]] name = "libc" -version = "0.2.169" +version = "0.2.180" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b5aba8db14291edd000dfcc4d620c7ebfb122c613afb886ca8803fa4e128a20a" +checksum = "bcc35a38544a891a5f7c865aca548a982ccb3b8650a5b06d0fd33a10283c56fc" dependencies = [ "rustc-std-workspace-core", ] @@ -1353,6 +1353,12 @@ version = "0.4.15" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "d26c52dbd32dccf2d10cac7725f8eae5296885fb5703b261f7d0a0739ec807ab" +[[package]] +name = "linux-raw-sys" +version = "0.11.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "df1d3c3b53da64cf5760482273a98e575c651a67eec7f77df96b5b642de8f039" + [[package]] name = "litemap" version = "0.7.4" @@ -1787,7 +1793,20 @@ dependencies = [ "bitflags 2.8.0", "errno", "libc", - "linux-raw-sys", + "linux-raw-sys 0.4.15", + "windows-sys", +] + +[[package]] +name = "rustix" +version = "1.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "146c9e247ccc180c1f61615433868c99f3de3ae256a30a43b49f67c2d9171f34" +dependencies = [ + "bitflags 2.8.0", + "errno", + "libc", + "linux-raw-sys 0.11.0", "windows-sys", ] @@ -2004,15 +2023,14 @@ dependencies = [ [[package]] name = "tempfile" -version = "3.16.0" +version = "3.24.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "38c246215d7d24f48ae091a2902398798e05d978b24315d6efbc00ede9a8bb91" +checksum = "655da9c7eb6305c55742045d5a8d2037996d61d8de95806335c7c86ce0f82e9c" dependencies = [ - "cfg-if", "fastrand", "getrandom 0.3.1", "once_cell", - "rustix", + "rustix 1.1.3", "windows-sys", ] @@ -2388,7 +2406,7 @@ checksum = "b4ee928febd44d98f2f459a4a79bd4d928591333a494a10a868418ac1b39cf1f" dependencies = [ "either", "home", - "rustix", + "rustix 0.38.44", "winsafe", ] @@ -2557,8 +2575,8 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "e105d177a3871454f754b33bb0ee637ecaaac997446375fd3e5d43a2ed00c909" dependencies = [ "libc", - "linux-raw-sys", - "rustix", + "linux-raw-sys 0.4.15", + "rustix 0.38.44", ] [[package]] @@ -2589,6 +2607,7 @@ dependencies = [ "semver 1.0.25", "serde", "tar", + "tempfile", "thiserror", "toml", "walkdir", @@ -2855,6 +2874,19 @@ dependencies = [ "yggdrasil-abi", ] +[[package]] +name = "ygg_driver_serial_8250" +version = "0.1.0" +dependencies = [ + "device-api", + "device-tree", + "kernel-arch-x86", + "libk", + "libk-mm", + "libk-util", + "yggdrasil-abi", +] + [[package]] name = "ygg_driver_usb" version = "0.1.0" @@ -3028,6 +3060,7 @@ dependencies = [ "ygg_driver_net_stmmac", "ygg_driver_nvme", "ygg_driver_pci", + "ygg_driver_serial_8250", "ygg_driver_usb", "ygg_driver_usb_xhci", "ygg_driver_virtio_blk", diff --git a/doc/visionfive2.txt b/doc/visionfive2.txt index fdabc77c..b1ace10d 100644 --- a/doc/visionfive2.txt +++ b/doc/visionfive2.txt @@ -33,10 +33,11 @@ $ booti ${loadaddr} ${initrd_addr_r}: ${fdt_addr_r} env set ipaddr 13.0.0.2; env set initrd_addr_r 0x70000000; tftpboot ${initrd_addr_r} 13.0.0.1:initrd.img; tftpboot ${loadaddr} 13.0.0.1:yggdrasil-kernel.bin; load mmc 1:3 ${fdt_addr_r} dtbs/6.6.20-starfive/starfive/${fdtfile}; fdt resize; booti ${loadaddr} ${initrd_addr_r}:60000000 ${fdt_addr_r} +env set ipaddr 13.0.0.2; env set initrd_addr_r 0x70000000; tftpboot ${initrd_addr_r} 13.0.0.1:initrd.img; tftpboot ${loadaddr} 13.0.0.1:yggdrasil-kernel.bin; tftpboot ${fdt_addr_r} 13.0.0.1:vf2.dtb; fdt resize; booti ${loadaddr} ${initrd_addr_r}:60000000 ${fdt_addr_r} + #### For DHCP boot with BUILD-MACHINE-IP-ADDR 192.168.88.10 -dhcp -dhcp; env set initrd_addr_r 0x70000000; tftpboot ${initrd_addr_r} 192.168.88.10:initrd.img; tftpboot ${loadaddr} 192.168.88.10:yggdrasil-kernel.bin; load mmc 1:3 ${fdt_addr_r} dtbs/6.6.20-starfive/starfive/${fdtfile}; fdt resize; booti ${loadaddr} ${initrd_addr_r}:60000000 ${fdt_addr_r} +dhcp; env set initrd_addr_r 0x70000000; tftpboot ${initrd_addr_r} 192.168.88.10:initrd.img; tftpboot ${loadaddr} 192.168.88.10:yggdrasil-kernel.bin; tftpboot ${fdt_addr_r} 192.168.88.10:vf2.dtb; fdt resize; booti ${loadaddr} ${initrd_addr_r}:60000000 ${fdt_addr_r} Missing drivers: diff --git a/etc/dtb/aarch64-qemu-virt.dtb b/etc/dtb/aarch64-qemu-virt.dtb deleted file mode 100644 index e673688a2d8b0ec36261621b4a9a490e0629eb06..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1048576 zcmeI%JFFyGc>v&QFnEWzjUOy)U|`HH*wef7SeC^gbOXzP0eJ(<0f9$7ee2G&r(bmU zo!wapF-RZ>4#*cda6$wGK!5}Zk}XmqAl?il2PBpqu=xK^SM}|Cr*@}ri-6!eQs1gm z=kcHOb)D1IeSiAaSN^+tN0sTIs^0Uzal8_*KZ@7-YSsI{xc-C4zgp@w1+S0eAH?e? zRdxRjam;+C%kj$d?DO&QXnOp@<-_C2oXt9cGuWQP)?Yqz9-@KL2_Ekswyxf~F zhod}+)QqF|>;J5(b{x@n?^lt}vbOx?ubztC`&pFdT$=Lg+snzY?e9{a3>K5i8K-~s z$tx$BD^FhAWU^M7Pj6CBW{Z0VPhVN5yq^80>Gv~pkbfdwEPqScAI9lR>vq*L&eNqg z9}iYXv&E!;^LTkMJn1aT+Hr1sXaBFntE9KY-|Qq(TQ@zo=a}AY{?V-X#d>mlxeZz^ zN0a%u&e&0ueUvdBJ>MT5-8%T#m1{YkY*otg*uK}Bd0uD+5M}Rb>XrAg#94RLpG-!x zrmXaz_r+*-BQGBePNtmkGqo{tdS5SB)~@Y5HnHE-6gCRkKHF65{x3IS*K;}>Gp3eR zUn^$Lqa$WJ;c`4z%(z(|7W0q0W5(@W()nXP^YEDO?2h@yy<a2=fx=Rh?$o&oj>Ld>+}85aYxJ#l!*Jp++lrY=N&Qsa_^Wstj|l`F(2PM z<__yKC)6>|5A7XuhxPfv?wEhIcg!8uXCijYGanH%o&UbwVSPRk9e2chvP9e?=Jg%c zXTEVAG0VE%XP(!0Sf3y6j(KhGdG4@2^JeLo=hJ(~++ltGb$85X_Kvy3`pg@&W1i3M z9dn2E+3$||H+#q2VSVPJ=$Pjx_Kvy3`h2Q8<|lWKd22qJ_3za8@=I@|{M;;G0?u6T z&1cWoi`mgpskN>b5AMBh#qS^aUB3Oi&0~B)>-|R@SIzZ!2klzq8tqZeOROm$q?ek(OXv|)BKg#}jU3K#}?xFIV(&j>(v=-afV%!hZ%X#K& zJ4M?E>g8`mXX{1&fqHLT*K5CvmTtSo*Tg+luWNiw+*9?s#@7|MYkZAMc@Nq-ca5)! zd#Ya7_?oz<>UE8;D{j~L8kbY=eb@M!xTorMjjxG&s$SRly5e??ue}eNeyd*uVvMic zZ~qv_S2DAmKKa`w7X>lEl3K0y_+-?{4kO(!e;+(%aaR9+ybjuS&9N!#{nNVb{j^z+ zYSZoJcd@vUdY@a@t8!$`JbE8*t~L42-&(V*Eq`gg{z*0S<;!H``?qJyRlgn%CjDFW zv|fycvG+uIPCNIj>$zW*KG@-*(&3< zF|z;I6W_iaqwK&j-@DKD=ab{R*RxHT<7m1X9>jx3ro0#_`^vWYS&{ej*}mg_*^K`n z&hx&@Nv~65{YY!x=ChYfZ9XGpTIaJge=jWK9L^T2`i1`B>PPyw;zr4`w)HE`dA80k z@HvMp%Y6Pu-R9%8`enS@vRsRK-n)Bk64TAEwq?3)dCoQ0M&|PkSkEbYD{1qdM6TDG zlploh9*RNsqu>6~Vlb(z>PJy2Tjr~GG#)H(ADoJnmhPyE~Mvusmd?!wdUbBt}B_LyT{3!c=?_p3F` zV{4eP^8NW{`M*xwM{%Cl-X5=0_tr-~S{=ltc5E+2jI6RATf{pvw~Uu{+xi(V$C~-y zNxU;w8864O9k0#*PU4-h&v@;8TF-XAyT;pYzwKE}SMl(-hzT`w$_M$}FSE^Co4qQ} zO1vzzm{_c!OU&u#X$s8)R~UOCo_@!Hzw))8}k=DzpQ{$>PaJh5;0o9Eta z);gy{o6mjjUt*8H_VncTi*devzkQ)ME#LFncAw8ikusnAaCJ0#p+4*n$FamRyN)>? z4VLvX^I0$M$=>y+;=^z2L*|LL?l3+u>uFXkb@MajzcTZg-~8S7weM!;)A{G5&nM3G zSvO@Dk)k{OEUn^WJ~G@x3qCKbgPb?|**pyEh*D=FfilmG}Sn-*jniJFLgm z;bhPs&TiL>db+Ca43^_Xe_7Xu)na;UeR8SzG;P-BM~nK4$Mtl0uUhA4$E*4Asy~gL zby>}C52l9^c`$x{aBtb4O{@6$suzpn`D$4m)^|t4`o`+sysql$AV%1q)T`UGh*#gL za(&+%Oz-rcA04i4pS0`G2W5DdHa#`N*~-tRtHo?Qj{A2pnBIzUOqQdV*yd^(>9QH{ zdZf$MVT?RFk66oi+!>6oH2;FmhoQsSWH6dm@$b=o>9KT}yYflU2Xe7%FYi>B%6G{% z`1; + gpios = <&gpio 0x03 0x00>; linux,code = <0x74>; label = "GPIO Key Poweroff"; }; }; - pl061@9030000 { - phandle = <0x8007>; + gpio: pl061@9030000 { clock-names = "apb_pclk"; - clocks = <0x8000>; + clocks = <&clk_24mhz>; interrupts = <0x00 0x07 0x04>; gpio-controller; #gpio-cells = <0x02>; @@ -299,15 +298,15 @@ pl031@9010000 { clock-names = "apb_pclk"; - clocks = <0x8000>; + clocks = <&clk_24mhz>; interrupts = <0x00 0x02 0x04>; reg = <0x00 0x9010000 0x00 0x1000>; compatible = "arm,pl031", "arm,primecell"; }; - pl011@9000000 { + uart0: pl011@9000000 { clock-names = "uartclk", "apb_pclk"; - clocks = <0x8000 0x8000>; + clocks = <&clk_24mhz &clk_24mhz>; interrupts = <0x00 0x01 0x04>; reg = <0x00 0x9000000 0x00 0x1000>; compatible = "arm,pl011", "arm,primecell"; @@ -411,8 +410,7 @@ compatible = "arm,armv8-timer", "arm,armv7-timer"; }; - apb-pclk { - phandle = <0x8000>; + clk_24mhz: apb-pclk { clock-output-names = "clk24mhz"; clock-frequency = <0x16e3600>; #clock-cells = <0x00>; diff --git a/etc/dtb/aarch64/bcm2711-rpi-4-b.dts b/etc/dtb/aarch64/bcm2711-rpi-4-b.dts new file mode 100644 index 00000000..978c7ffb --- /dev/null +++ b/etc/dtb/aarch64/bcm2711-rpi-4-b.dts @@ -0,0 +1,492 @@ +/dts-v1/; + +#include + +/memreserve/ 0x0000000000000000 0x0000000000001000; +/ { + compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; + model = "Raspberry Pi 4 Model B"; + #address-cells = <0x02>; + #size-cells = <0x01>; + interrupt-parent = <&gicv2>; + + aliases { + serial0 = "/soc/serial@7e201000"; + serial1 = "/soc/serial@7e215040"; + blconfig = "/reserved-memory/nvram@0"; + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x01>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + size = <0x4000000>; + reusable; + linux,cma-default; + alloc-ranges = <0x00 0x00 0x40000000>; + }; + + nvram@0 { + compatible = "raspberrypi,bootloader-config", "nvmem-rmem"; + #address-cells = <0x01>; + #size-cells = <0x01>; + reg = <0x00 0x00 0x00>; + no-map; + status = "disabled"; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x7e000000 0x00 0xfe000000 0x01800000>, + <0x7c000000 0x00 0xfc000000 0x02000000>, + <0x40000000 0x00 0xff800000 0x00800000>; + dma-ranges = <0xc0000000 0x00 0x00 0x40000000>; + + timer@7e003000 { + compatible = "brcm,bcm2835-system-timer"; + reg = <0x7e003000 0x1000>; + interrupts = , + , + , + ; + clock-frequency = <0xf4240>; + }; + + txp@7e004000 { + compatible = "brcm,bcm2835-txp"; + reg = <0x7e004000 0x20>; + interrupts = ; + }; + + dsi0: dsi@7e209000 { + compatible = "brcm,bcm2835-dsi0"; + reg = <0x7e209000 0x78>; + interrupts = ; + #address-cells = <0x01>; + #size-cells = <0x00>; + #clock-cells = <0x01>; + clocks = <&cprman 0x20>, + <&cprman 0x2f>, + <&cprman 0x31>; + clock-names = "phy", "escape", "pixel"; + clock-output-names = "dsi0_byte", "dsi0_ddr2", "dsi0_ddr"; + status = "disabled"; + power-domains = <&power 0x11>; + }; + + dsi1: dsi@7e700000 { + compatible = "brcm,bcm2711-dsi1"; + reg = <0x7e700000 0x8c>; + interrupts = ; + #address-cells = <0x01>; + #size-cells = <0x00>; + #clock-cells = <0x01>; + clocks = <&cprman 0x23>, + <&cprman 0x30>, + <&cprman 0x32>; + clock-names = "phy", "escape", "pixel"; + clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr"; + status = "disabled"; + power-domains = <&power 0x12>; + }; + + cprman: cprman@7e101000 { + compatible = "brcm,bcm2711-cprman"; + #clock-cells = <0x01>; + reg = <0x7e101000 0x2000>; + clocks = <&clk_osc>, + <&dsi0 0x00>, + <&dsi0 0x01>, + <&dsi0 0x02>, + <&dsi1 0x00>, + <&dsi1 0x01>, + <&dsi1 0x02>; + }; + + mbox: mailbox@7e00b880 { + compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = ; + #mbox-cells = <0x00>; + }; + + gpio: gpio@7e200000 { + compatible = "brcm,bcm2711-gpio"; + reg = <0x7e200000 0xb4>; + interrupts = , + , + , + ; + gpio-controller; + #gpio-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x02>; + pinctrl-names = "default"; + bootph-all; + + uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 { + brcm,pins = <30>, <31>; + brcm,pull = <2>, <0>; + brcm,function = <7>; + }; + + uart0_gpio32: uart0_gpio32 { + brcm,pins = <32>, <33>; + brcm,pull = <0>, <2>; + brcm,function = <8>; + }; + + uart1_gpio14: uart1_gpio14 { + brcm,pins = <14>, <15>; + brcm,function = <2>; + bootph-all; + }; + }; + + uart0: serial@7e201000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201000 0x200>; + interrupts = ; + clocks = <&cprman 0x13>, + <&cprman 0x14>; + clock-names = "uartclk", + "apb_pclk"; + arm,primecell-periphid = <0x241011>; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; + uart-has-rtscts; + status = "okay"; + skip-init; + bootph-all; + }; + + aux: aux@7e215000 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <0x01>; + reg = <0x7e215000 0x08>; + clocks = <&cprman 0x14>; + }; + + uart1: serial@7e215040 { + compatible = "brcm,bcm2835-aux-uart"; + reg = <0x7e215040 0x40>; + interrupts = ; + clocks = <&aux 0x00>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; + skip-init; + bootph-all; + }; + + l1_intc: local_intc@40000000 { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + }; + + gicv2: interrupt-controller@40041000 { + interrupt-controller; + #interrupt-cells = <0x03>; + compatible = "arm,gic-400"; + reg = <0x40041000 0x1000>, + <0x40042000 0x2000>, + <0x40044000 0x2000>, + <0x40046000 0x2000>; + interrupts = ; + }; + + avs_monitor: avs-monitor@7d5d2000 { + compatible = "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd"; + reg = <0x7d5d2000 0xf00>; + }; + + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xb00>; + interrupts = , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "dma0", + "dma1", + "dma2", + "dma3", + "dma4", + "dma5", + "dma6", + "dma7", + "dma8", + "dma9", + "dma10"; + #dma-cells = <0x01>; + brcm,dma-channel-mask = <0x7f5>; + }; + + pm_wdt: watchdog@7e100000 { + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; + #power-domain-cells = <0x01>; + #reset-cells = <0x01>; + reg = <0x7e100000 0x114>, + <0x7e00a000 0x24>, + <0x7ec11000 0x20>; + clocks = <&cprman 0x15>, + <&cprman 0x1d>, + <&cprman 0x17>, + <&cprman 0x16>; + clock-names = "v3d", "peri_image", "h264", "isp"; + system-power-controller; + }; + + uart2: serial@7e201400 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201400 0x200>; + interrupts = ; + clocks = <&cprman 0x13>, + <&cprman 0x14>; + clock-names = "uartclk", + "apb_pclk"; + arm,primecell-periphid = <0x241011>; + status = "disabled"; + }; + + uart3: serial@7e201600 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201600 0x200>; + interrupts = ; + clocks = <&cprman 0x13>, + <&cprman 0x14>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x241011>; + status = "disabled"; + }; + + uart4: serial@7e201800 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201800 0x200>; + interrupts = ; + clocks = <&cprman 0x13>, + <&cprman 0x14>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x241011>; + status = "disabled"; + }; + + uart5: serial@7e201a00 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201a00 0x200>; + interrupts = ; + clocks = <&cprman 0x13>, + <&cprman 0x14>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x241011>; + status = "disabled"; + }; + + clk_dvp: clock@7ef00000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7ef00000 0x10>; + clocks = <&clk_108m>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + }; + + l2_intc: interrupt-controller@7ef00100 { + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; + reg = <0x7ef00100 0x30>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <0x01>; + }; + + firmware: firmware { + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; + #address-cells = <0x01>; + #size-cells = <0x01>; + mboxes = <&mbox>; + dma-ranges; + + clk_firmware: clocks { + compatible = "raspberrypi,firmware-clocks"; + #clock-cells = <0x01>; + }; + + gpio_firmware: gpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <0x02>; + status = "okay"; + gpio-line-names = "BT_ON", "WL_ON", "PWR_LED_OFF", "GLOBAL_RESET", "VDD_SD_IO_SEL", "CAM_GPIO", "SD_PWR_ON", ""; + }; + + firmware_reset: reset { + compatible = "raspberrypi,firmware-reset"; + #reset-cells = <0x01>; + }; + }; + + power: power { + compatible = "raspberrypi,bcm2835-power"; + firmware = <&firmware>; + #power-domain-cells = <0x01>; + }; + + vchiq: mailbox@7e00b840 { + compatible = "brcm,bcm2835-vchiq"; + reg = <0x7e00b840 0x3c>; + interrupts = ; + }; + }; + + clocks { + clk_osc: clk-osc { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-output-names = "osc"; + clock-frequency = <54000000>; + }; + + clk_usb: clk-usb { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-output-names = "otg"; + clock-frequency = <480000000>; + }; + }; + + clk_27m: clk-27M { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "27MHz-clock"; + }; + + clk_108m: clk-108M { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <108000000>; + clock-output-names = "108MHz-clock"; + }; + + pmu: arm-pmu { + compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; + interrupts = , + , + , + ; + interrupt-affinity = <0x21>, + <0x22>, + <0x23>, + <0x24>; + }; + + arm_timer: timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + enable-method = "brcm,bcm2836-smp"; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x00>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xd8>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x01>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xe0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x02>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xe8>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x03>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xf0>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_act: led-act { + label = "ACT"; + default-state = "keep"; + linux,default-trigger = "heartbeat"; + gpios = <&gpio 0x2a 0x00>; + }; + + led_pwr: led-pwr { + label = "PWR"; + gpios = <&gpio_firmware 0x02 0x01>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00 0x00 0x00>; + }; + + sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <0x1388>; + gpios = <&gpio_firmware 0x04 0x00>; + states = <3300000 0x01>, + <1800000 0x00>; + status = "okay"; + }; + + sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpio = <&gpio_firmware 0x06 0x00>; + }; +}; \ No newline at end of file diff --git a/etc/dtb/aarch64/gicv2.h b/etc/dtb/aarch64/gicv2.h new file mode 100644 index 00000000..410ad976 --- /dev/null +++ b/etc/dtb/aarch64/gicv2.h @@ -0,0 +1,14 @@ +#pragma once + +#define GIC_SPI 0 +#define GIC_PPI 1 + +#define GIC_CPU_MASK_RAW(x) ((x) << 8) +#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) + +#define IRQ_TYPE_NONE 0 +#define IRQ_TYPE_EDGE_RISING 1 +#define IRQ_TYPE_EDGE_FALLING 2 +#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING) +#define IRQ_TYPE_LEVEL_HIGH 4 +#define IRQ_TYPE_LEVEL_LOW 8 diff --git a/etc/dtb/bcm2711-rpi-4-b.dtb b/etc/dtb/bcm2711-rpi-4-b.dtb deleted file mode 100644 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c8bd03c0..00000000 --- a/etc/dtb/bcm2711-rpi-4-b.dts +++ /dev/null @@ -1,1907 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x0000000000000000 0x0000000000001000; -/ { - compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; - model = "Raspberry Pi 4 Model B"; - #address-cells = <0x02>; - #size-cells = <0x01>; - interrupt-parent = <0x01>; - - aliases { - serial0 = "/soc/serial@7e201000"; - serial1 = "/soc/serial@7e215040"; - emmc2bus = "/emmc2bus"; - ethernet0 = "/scb/ethernet@7d580000"; - pcie0 = "/scb/pcie@7d500000"; - blconfig = "/reserved-memory/nvram@0"; - }; - - chosen { - stdout-path = "serial1:115200n8"; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x01>; - ranges; - phandle = <0x29>; - - linux,cma { - compatible = "shared-dma-pool"; - size = <0x4000000>; - reusable; - linux,cma-default; - alloc-ranges = <0x00 0x00 0x40000000>; - phandle = <0x2a>; - }; - - nvram@0 { - compatible = "raspberrypi,bootloader-config", "nvmem-rmem"; - #address-cells = <0x01>; - #size-cells = <0x01>; - reg = <0x00 0x00 0x00>; - no-map; - status = "disabled"; - phandle = <0x2b>; - }; - }; - - thermal-zones { - - cpu-thermal { - polling-delay-passive = <0x00>; - polling-delay = <0x3e8>; - coefficients = <0xfffffe19 0x641b8>; - thermal-sensors = <0x02>; - phandle = <0x2c>; - - trips { - - cpu-crit { - temperature = <0x15f90>; - hysteresis = <0x00>; - type = "critical"; - }; - }; - - cooling-maps { - }; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <0x01>; - #size-cells = <0x01>; - ranges = <0x7e000000 0x00 0xfe000000 0x1800000 0x7c000000 0x00 0xfc000000 0x2000000 0x40000000 0x00 0xff800000 0x800000>; - dma-ranges = <0xc0000000 0x00 0x00 0x40000000>; - - timer@7e003000 { - compatible = "brcm,bcm2835-system-timer"; - reg = <0x7e003000 0x1000>; - interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>; - clock-frequency = <0xf4240>; - phandle = <0x2d>; - }; - - txp@7e004000 { - compatible = "brcm,bcm2835-txp"; - reg = <0x7e004000 0x20>; - interrupts = <0x00 0x4b 0x04>; - phandle = <0x2e>; - }; - - cprman@7e101000 { - compatible = "brcm,bcm2711-cprman"; - #clock-cells = <0x01>; - reg = <0x7e101000 0x2000>; - clocks = <0x03 0x04 0x00 0x04 0x01 0x04 0x02 0x05 0x00 0x05 0x01 0x05 0x02>; - phandle = <0x06>; - }; - - mailbox@7e00b880 { - compatible = "brcm,bcm2835-mbox"; - reg = <0x7e00b880 0x40>; - interrupts = <0x00 0x21 0x04>; - #mbox-cells = <0x00>; - phandle = <0x1d>; - }; - - gpio@7e200000 { - compatible = "brcm,bcm2711-gpio"; - reg = <0x7e200000 0xb4>; - interrupts = <0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - pinctrl-names = "default"; - gpio-line-names = "ID_SDA", "ID_SCL", "SDA1", "SCL1", "GPIO_GCLK", "GPIO5", "GPIO6", "SPI_CE1_N", "SPI_CE0_N", "SPI_MISO", "SPI_MOSI", "SPI_SCLK", "GPIO12", "GPIO13", "TXD1", "RXD1", "GPIO16", "GPIO17", "GPIO18", "GPIO19", "GPIO20", "GPIO21", "GPIO22", "GPIO23", "GPIO24", "GPIO25", "GPIO26", "GPIO27", "RGMII_MDIO", "RGMIO_MDC", "CTS0", "RTS0", "TXD0", "RXD0", "SD1_CLK", "SD1_CMD", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", "PWM0_MISO", "PWM1_MOSI", "STATUS_LED_G_CLK", "SPIFLASH_CE_N", "SDA0", "SCL0", "RGMII_RXCLK", "RGMII_RXCTL", "RGMII_RXD0", "RGMII_RXD1", "RGMII_RXD2", "RGMII_RXD3", "RGMII_TXCLK", "RGMII_TXCTL", "RGMII_TXD0", "RGMII_TXD1", "RGMII_TXD2", "RGMII_TXD3"; - bootph-all; - phandle = <0x28>; - - dpi_gpio0 { - brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>; - brcm,function = <0x06>; - phandle = <0x2f>; - }; - - emmc_gpio22 { - brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>; - brcm,function = <0x07>; - phandle = <0x30>; - }; - - emmc_gpio34 { - brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>; - brcm,function = <0x07>; - brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>; - phandle = <0x0e>; - }; - - emmc_gpio48 { - brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>; - brcm,function = <0x07>; - phandle = <0x31>; - }; - - gpclk0_gpio4 { - brcm,pins = <0x04>; - brcm,function = <0x04>; - phandle = <0x32>; - }; - - gpclk1_gpio5 { - brcm,pins = <0x05>; - brcm,function = <0x04>; - phandle = <0x33>; - }; - - gpclk1_gpio42 { - brcm,pins = <0x2a>; - brcm,function = <0x04>; - phandle = <0x34>; - }; - - gpclk1_gpio44 { - brcm,pins = <0x2c>; - brcm,function = <0x04>; - phandle = <0x35>; - }; - - gpclk2_gpio6 { - brcm,pins = <0x06>; - brcm,function = <0x04>; - phandle = <0x36>; - }; - - gpclk2_gpio43 { - brcm,pins = <0x2b>; - brcm,function = <0x04>; - brcm,pull = <0x00>; - phandle = <0x37>; - }; - - i2c0_gpio0 { - brcm,pins = <0x00 0x01>; - brcm,function = <0x04>; - phandle = <0x0a>; - }; - - i2c0_gpio28 { - brcm,pins = <0x1c 0x1d>; - brcm,function = <0x04>; - phandle = <0x38>; - }; - - i2c0_gpio44 { - brcm,pins = <0x2c 0x2d>; - brcm,function = <0x05>; - phandle = <0x39>; - }; - - i2c1_gpio2 { - brcm,pins = <0x02 0x03>; - brcm,function = <0x04>; - phandle = <0x11>; - }; - - i2c1_gpio44 { - brcm,pins = <0x2c 0x2d>; - brcm,function = <0x06>; - phandle = <0x3a>; - }; - - jtag_gpio22 { - brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>; - brcm,function = <0x03>; - phandle = <0x3b>; - }; - - pcm_gpio18 { - brcm,pins = <0x12 0x13 0x14 0x15>; - brcm,function = <0x04>; - phandle = <0x3c>; - }; - - pcm_gpio28 { - brcm,pins = <0x1c 0x1d 0x1e 0x1f>; - brcm,function = <0x06>; - phandle = <0x3d>; - }; - - sdhost_gpio48 { - brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>; - brcm,function = <0x04>; - phandle = <0x3e>; - }; - - spi0_gpio7 { - brcm,pins = <0x07 0x08 0x09 0x0a 0x0b>; - brcm,function = <0x04>; - phandle = <0x3f>; - }; - - spi0_gpio35 { - brcm,pins = <0x23 0x24 0x25 0x26 0x27>; - brcm,function = <0x04>; - phandle = <0x40>; - }; - - spi1_gpio16 { - brcm,pins = <0x10 0x11 0x12 0x13 0x14 0x15>; - brcm,function = <0x03>; - phandle = <0x41>; - }; - - spi2_gpio40 { - brcm,pins = <0x28 0x29 0x2a 0x2b 0x2c 0x2d>; - brcm,function = <0x03>; - phandle = <0x42>; - }; - - uart0_gpio14 { - brcm,pins = <0x0e 0x0f>; - brcm,function = <0x04>; - bootph-all; - phandle = <0x43>; - }; - - uart0_ctsrts_gpio16 { - brcm,pins = <0x10 0x11>; - brcm,function = <0x07>; - phandle = <0x44>; - }; - - uart0_ctsrts_gpio30 { - brcm,pins = <0x1e 0x1f>; - brcm,function = <0x07>; - brcm,pull = <0x02 0x00>; - phandle = <0x07>; - }; - - uart0_gpio32 { - brcm,pins = <0x20 0x21>; - brcm,function = <0x07>; - brcm,pull = <0x00 0x02>; - phandle = <0x08>; - }; - - uart0_gpio36 { - brcm,pins = <0x24 0x25>; - brcm,function = <0x06>; - phandle = <0x45>; - }; - - uart0_ctsrts_gpio38 { - brcm,pins = <0x26 0x27>; - brcm,function = <0x06>; - phandle = <0x46>; - }; - - uart1_gpio14 { - brcm,pins = <0x0e 0x0f>; - brcm,function = <0x02>; - bootph-all; - phandle = <0x0d>; - }; - - uart1_ctsrts_gpio16 { - brcm,pins = <0x10 0x11>; - brcm,function = <0x02>; - phandle = <0x47>; - }; - - uart1_gpio32 { - brcm,pins = <0x20 0x21>; - brcm,function = <0x02>; - phandle = <0x48>; - }; - - uart1_ctsrts_gpio30 { - brcm,pins = <0x1e 0x1f>; - brcm,function = <0x02>; - phandle = <0x49>; - }; - - uart1_gpio40 { - brcm,pins = <0x28 0x29>; - brcm,function = <0x02>; - phandle = <0x4a>; - }; - - uart1_ctsrts_gpio42 { - brcm,pins = <0x2a 0x2b>; - brcm,function = <0x02>; - phandle = <0x4b>; - }; - - gpclk0_gpio49 { - phandle = <0x4c>; - - pin-gpclk { - pins = "gpio49"; - function = "alt1"; - bias-disable; - }; - }; - - gpclk1_gpio50 { - phandle = <0x4d>; - - pin-gpclk { - pins = "gpio50"; - function = "alt1"; - bias-disable; - }; - }; - - gpclk2_gpio51 { - phandle = <0x4e>; - - pin-gpclk { - pins = "gpio51"; - function = "alt1"; - bias-disable; - }; - }; - - i2c0_gpio46 { - phandle = <0x4f>; - - pin-sda { - function = "alt0"; - pins = "gpio46"; - bias-pull-up; - }; - - pin-scl { - function = "alt0"; - pins = "gpio47"; - bias-disable; - }; - }; - - i2c1_gpio46 { - phandle = <0x50>; - - pin-sda { - function = "alt1"; - pins = "gpio46"; - bias-pull-up; - }; - - pin-scl { - function = "alt1"; - pins = "gpio47"; - bias-disable; - }; - }; - - i2c3_gpio2 { - phandle = <0x51>; - - pin-sda { - function = "alt5"; - pins = "gpio2"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio3"; - bias-disable; - }; - }; - - i2c3_gpio4 { - phandle = <0x52>; - - pin-sda { - function = "alt5"; - pins = "gpio4"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio5"; - bias-disable; - }; - }; - - i2c4_gpio6 { - phandle = <0x53>; - - pin-sda { - function = "alt5"; - pins = "gpio6"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio7"; - bias-disable; - }; - }; - - i2c4_gpio8 { - phandle = <0x54>; - - pin-sda { - function = "alt5"; - pins = "gpio8"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio9"; - bias-disable; - }; - }; - - i2c5_gpio10 { - phandle = <0x55>; - - pin-sda { - function = "alt5"; - pins = "gpio10"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio11"; - bias-disable; - }; - }; - - i2c5_gpio12 { - phandle = <0x56>; - - pin-sda { - function = "alt5"; - pins = "gpio12"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio13"; - bias-disable; - }; - }; - - i2c6_gpio0 { - phandle = <0x57>; - - pin-sda { - function = "alt5"; - pins = "gpio0"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio1"; - bias-disable; - }; - }; - - i2c6_gpio22 { - phandle = <0x58>; - - pin-sda { - function = "alt5"; - pins = "gpio22"; - bias-pull-up; - }; - - pin-scl { - function = "alt5"; - pins = "gpio23"; - bias-disable; - }; - }; - - i2c_slave_gpio8 { - phandle = <0x59>; - - pins-i2c-slave { - pins = "gpio8", "gpio9", "gpio10", "gpio11"; - function = "alt3"; - }; - }; - - jtag_gpio48 { - phandle = <0x5a>; - - pins-jtag { - pins = "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53"; - function = "alt4"; - }; - }; - - mii_gpio28 { - phandle = <0x5b>; - - pins-mii { - pins = "gpio28", "gpio29", "gpio30", "gpio31"; - function = "alt4"; - }; - }; - - mii_gpio36 { - phandle = <0x5c>; - - pins-mii { - pins = "gpio36", "gpio37", "gpio38", "gpio39"; - function = "alt5"; - }; - }; - - pcm_gpio50 { - phandle = <0x5d>; - - pins-pcm { - pins = "gpio50", "gpio51", "gpio52", "gpio53"; - function = "alt2"; - }; - }; - - pwm0_0_gpio12 { - phandle = <0x5e>; - - pin-pwm { - pins = "gpio12"; - function = "alt0"; - bias-disable; - }; - }; - - pwm0_0_gpio18 { - phandle = <0x5f>; - - pin-pwm { - pins = "gpio18"; - function = "alt5"; - bias-disable; - }; - }; - - pwm1_0_gpio40 { - phandle = <0x14>; - - pin-pwm { - pins = "gpio40"; - function = "alt0"; - bias-disable; - }; - }; - - pwm0_1_gpio13 { - phandle = <0x60>; - - pin-pwm { - pins = "gpio13"; - function = "alt0"; - bias-disable; - }; - }; - - pwm0_1_gpio19 { - phandle = <0x61>; - - pin-pwm { - pins = "gpio19"; - function = "alt5"; - bias-disable; - }; - }; - - pwm1_1_gpio41 { - phandle = <0x15>; - - pin-pwm { - pins = "gpio41"; - function = "alt0"; - bias-disable; - }; - }; - - pwm0_1_gpio45 { - phandle = <0x62>; - - pin-pwm { - pins = "gpio45"; - function = "alt0"; - bias-disable; - }; - }; - - pwm0_0_gpio52 { - phandle = <0x63>; - - pin-pwm { - pins = "gpio52"; - function = "alt1"; - bias-disable; - }; - }; - - pwm0_1_gpio53 { - phandle = <0x64>; - - pin-pwm { - pins = "gpio53"; - function = "alt1"; - bias-disable; - }; - }; - - rgmii_gpio35 { - phandle = <0x65>; - - pin-start-stop { - pins = "gpio35"; - function = "alt4"; - }; - - pin-rx-ok { - pins = "gpio36"; - function = "alt4"; - }; - }; - - rgmii_irq_gpio34 { - phandle = <0x66>; - - pin-irq { - pins = "gpio34"; - function = "alt5"; - }; - }; - - rgmii_irq_gpio39 { - phandle = <0x67>; - - pin-irq { - pins = "gpio39"; - function = "alt4"; - }; - }; - - rgmii_mdio_gpio28 { - phandle = <0x68>; - - pins-mdio { - pins = "gpio28", "gpio29"; - function = "alt5"; - }; - }; - - rgmii_mdio_gpio37 { - phandle = <0x69>; - - pins-mdio { - pins = "gpio37", "gpio38"; - function = "alt4"; - }; - }; - - spi0_gpio46 { - phandle = <0x6a>; - - pins-spi { - pins = "gpio46", "gpio47", "gpio48", "gpio49"; - function = "alt2"; - }; - }; - - spi2_gpio46 { - phandle = <0x6b>; - - pins-spi { - pins = "gpio46", "gpio47", "gpio48", "gpio49", "gpio50"; - function = "alt5"; - }; - }; - - spi3_gpio0 { - phandle = <0x6c>; - - pins-spi { - pins = "gpio0", "gpio1", "gpio2", "gpio3"; - function = "alt3"; - }; - }; - - spi4_gpio4 { - phandle = <0x6d>; - - pins-spi { - pins = "gpio4", "gpio5", "gpio6", "gpio7"; - function = "alt3"; - }; - }; - - spi5_gpio12 { - phandle = <0x6e>; - - pins-spi { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - function = "alt3"; - }; - }; - - spi6_gpio18 { - phandle = <0x6f>; - - pins-spi { - pins = "gpio18", "gpio19", "gpio20", "gpio21"; - function = "alt3"; - }; - }; - - uart2_gpio0 { - phandle = <0x70>; - - pin-tx { - pins = "gpio0"; - function = "alt4"; - bias-disable; - }; - - pin-rx { - pins = "gpio1"; - function = "alt4"; - bias-pull-up; - }; - }; - - uart2_ctsrts_gpio2 { - phandle = <0x71>; - - pin-cts { - pins = "gpio2"; - function = "alt4"; - bias-pull-up; - }; - - pin-rts { - pins = "gpio3"; - function = "alt4"; - bias-disable; - }; - }; - - uart3_gpio4 { - phandle = <0x72>; - - pin-tx { - pins = "gpio4"; - function = "alt4"; - bias-disable; - }; - - pin-rx { - pins = "gpio5"; - function = "alt4"; - bias-pull-up; - }; - }; - - uart3_ctsrts_gpio6 { - phandle = <0x73>; - - pin-cts { - pins = "gpio6"; - function = "alt4"; - bias-pull-up; - }; - - pin-rts { - pins = "gpio7"; - function = "alt4"; - bias-disable; - }; - }; - - uart4_gpio8 { - phandle = <0x74>; - - pin-tx { - pins = "gpio8"; - function = "alt4"; - bias-disable; - }; - - pin-rx { - pins = "gpio9"; - function = "alt4"; - bias-pull-up; - }; - }; - - uart4_ctsrts_gpio10 { - phandle = <0x75>; - - pin-cts { - pins = "gpio10"; - function = "alt4"; - bias-pull-up; - }; - - pin-rts { - pins = "gpio11"; - function = "alt4"; - bias-disable; - }; - }; - - uart5_gpio12 { - phandle = <0x76>; - - pin-tx { - pins = "gpio12"; - function = "alt4"; - bias-disable; - }; - - pin-rx { - pins = "gpio13"; - function = "alt4"; - bias-pull-up; - }; - }; - - uart5_ctsrts_gpio14 { - phandle = <0x77>; - - pin-cts { - pins = "gpio14"; - function = "alt4"; - bias-pull-up; - }; - - pin-rts { - pins = "gpio15"; - function = "alt4"; - bias-disable; - }; - }; - - gpioout { - brcm,pins = <0x06>; - brcm,function = <0x01>; - phandle = <0x78>; - }; - - alt0 { - brcm,pins = <0x04 0x05 0x07 0x08 0x09 0x0a 0x0b>; - brcm,function = <0x04>; - phandle = <0x79>; - }; - }; - - serial@7e201000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7e201000 0x200>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x06 0x13 0x06 0x14>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x241011>; - pinctrl-names = "default"; - pinctrl-0 = <0x07 0x08>; - uart-has-rtscts; - status = "okay"; - skip-init; - bootph-all; - phandle = <0x7a>; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - max-speed = <0x1e8480>; - shutdown-gpios = <0x09 0x00 0x00>; - }; - }; - - mmc@7e202000 { - compatible = "brcm,bcm2835-sdhost"; - reg = <0x7e202000 0x100>; - interrupts = <0x00 0x78 0x04>; - clocks = <0x06 0x14>; - status = "disabled"; - phandle = <0x7b>; - }; - - i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; - reg = <0x7e203000 0x24>; - clocks = <0x06 0x1f>; - status = "disabled"; - phandle = <0x7c>; - }; - - spi@7e204000 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7e204000 0x200>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x7d>; - }; - - i2c@7e205000 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7e205000 0x200>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0x0a>; - clock-frequency = <0x186a0>; - phandle = <0x7e>; - }; - - dpi@7e208000 { - compatible = "brcm,bcm2835-dpi"; - reg = <0x7e208000 0x8c>; - clocks = <0x06 0x14 0x06 0x2c>; - clock-names = "core", "pixel"; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x7f>; - }; - - dsi@7e209000 { - compatible = "brcm,bcm2835-dsi0"; - reg = <0x7e209000 0x78>; - interrupts = <0x00 0x64 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - #clock-cells = <0x01>; - clocks = <0x06 0x20 0x06 0x2f 0x06 0x31>; - clock-names = "phy", "escape", "pixel"; - clock-output-names = "dsi0_byte", "dsi0_ddr2", "dsi0_ddr"; - status = "disabled"; - power-domains = <0x0b 0x11>; - phandle = <0x04>; - }; - - aux@7e215000 { - compatible = "brcm,bcm2835-aux"; - #clock-cells = <0x01>; - reg = <0x7e215000 0x08>; - clocks = <0x06 0x14>; - phandle = <0x0c>; - }; - - serial@7e215040 { - compatible = "brcm,bcm2835-aux-uart"; - reg = <0x7e215040 0x40>; - interrupts = <0x00 0x5d 0x04>; - clocks = <0x0c 0x00>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0x0d>; - skip-init; - bootph-all; - phandle = <0x80>; - }; - - spi@7e215080 { - compatible = "brcm,bcm2835-aux-spi"; - reg = <0x7e215080 0x40>; - interrupts = <0x00 0x5d 0x04>; - clocks = <0x0c 0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x81>; - }; - - spi@7e2150c0 { - compatible = "brcm,bcm2835-aux-spi"; - reg = <0x7e2150c0 0x40>; - interrupts = <0x00 0x5d 0x04>; - clocks = <0x0c 0x02>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x82>; - }; - - pwm@7e20c000 { - compatible = "brcm,bcm2835-pwm"; - reg = <0x7e20c000 0x28>; - clocks = <0x06 0x1e>; - assigned-clocks = <0x06 0x1e>; - assigned-clock-rates = <0x989680>; - #pwm-cells = <0x02>; - status = "disabled"; - phandle = <0x83>; - }; - - mmc@7e300000 { - compatible = "brcm,bcm2835-sdhci"; - reg = <0x7e300000 0x100>; - interrupts = <0x00 0x7e 0x04>; - clocks = <0x06 0x1c>; - status = "okay"; - #address-cells = <0x01>; - #size-cells = <0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0x0e>; - bus-width = <0x04>; - non-removable; - mmc-pwrseq = <0x0f>; - phandle = <0x84>; - - wifi@1 { - reg = <0x01>; - compatible = "brcm,bcm4329-fmac"; - phandle = <0x85>; - }; - }; - - hvs@7e400000 { - compatible = "brcm,bcm2711-hvs"; - reg = <0x7e400000 0x6000>; - interrupts = <0x00 0x61 0x04>; - clocks = <0x10 0x04>; - phandle = <0x86>; - }; - - dsi@7e700000 { - compatible = "brcm,bcm2711-dsi1"; - reg = <0x7e700000 0x8c>; - interrupts = <0x00 0x6c 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - #clock-cells = <0x01>; - clocks = <0x06 0x23 0x06 0x30 0x06 0x32>; - clock-names = "phy", "escape", "pixel"; - clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr"; - status = "disabled"; - power-domains = <0x0b 0x12>; - phandle = <0x05>; - }; - - i2c@7e804000 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7e804000 0x1000>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0x11>; - clock-frequency = <0x186a0>; - phandle = <0x87>; - }; - - usb@7e980000 { - compatible = "brcm,bcm2835-usb"; - reg = <0x7e980000 0x10000>; - interrupts = <0x00 0x49 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x12>; - clock-names = "otg"; - phys = <0x13>; - phy-names = "usb2-phy"; - power-domains = <0x0b 0x06>; - dr_mode = "peripheral"; - g-rx-fifo-size = <0x100>; - g-np-tx-fifo-size = <0x20>; - g-tx-fifo-size = <0x100 0x100 0x200 0x200 0x200 0x300 0x300>; - phandle = <0x88>; - }; - - local_intc@40000000 { - compatible = "brcm,bcm2836-l1-intc"; - reg = <0x40000000 0x100>; - phandle = <0x89>; - }; - - interrupt-controller@40041000 { - interrupt-controller; - #interrupt-cells = <0x03>; - compatible = "arm,gic-400"; - reg = <0x40041000 0x1000 0x40042000 0x2000 0x40044000 0x2000 0x40046000 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - avs-monitor@7d5d2000 { - compatible = "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd"; - reg = <0x7d5d2000 0xf00>; - phandle = <0x8a>; - - thermal { - compatible = "brcm,bcm2711-thermal"; - #thermal-sensor-cells = <0x00>; - phandle = <0x02>; - }; - }; - - dma@7e007000 { - compatible = "brcm,bcm2835-dma"; - reg = <0x7e007000 0xb00>; - interrupts = <0x00 0x50 0x04 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 0x00 0x55 0x04 0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x57 0x04 0x00 0x58 0x04 0x00 0x58 0x04>; - interrupt-names = "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7", "dma8", "dma9", "dma10"; - #dma-cells = <0x01>; - brcm,dma-channel-mask = <0x7f5>; - phandle = <0x1a>; - }; - - watchdog@7e100000 { - compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; - #power-domain-cells = <0x01>; - #reset-cells = <0x01>; - reg = <0x7e100000 0x114 0x7e00a000 0x24 0x7ec11000 0x20>; - clocks = <0x06 0x15 0x06 0x1d 0x06 0x17 0x06 0x16>; - clock-names = "v3d", "peri_image", "h264", "isp"; - system-power-controller; - phandle = <0x8b>; - }; - - rng@7e104000 { - compatible = "brcm,bcm2711-rng200"; - reg = <0x7e104000 0x28>; - }; - - serial@7e201400 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7e201400 0x200>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x06 0x13 0x06 0x14>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x241011>; - status = "disabled"; - phandle = <0x8c>; - }; - - serial@7e201600 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7e201600 0x200>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x06 0x13 0x06 0x14>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x241011>; - status = "disabled"; - phandle = <0x8d>; - }; - - serial@7e201800 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7e201800 0x200>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x06 0x13 0x06 0x14>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x241011>; - status = "disabled"; - phandle = <0x8e>; - }; - - serial@7e201a00 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7e201a00 0x200>; - interrupts = <0x00 0x79 0x04>; - clocks = <0x06 0x13 0x06 0x14>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x241011>; - status = "disabled"; - phandle = <0x8f>; - }; - - spi@7e204600 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7e204600 0x200>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x90>; - }; - - spi@7e204800 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7e204800 0x200>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x91>; - }; - - spi@7e204a00 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7e204a00 0x200>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x92>; - }; - - spi@7e204c00 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7e204c00 0x200>; - interrupts = <0x00 0x76 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x93>; - }; - - i2c@7e205600 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7e205600 0x200>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x94>; - }; - - i2c@7e205800 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7e205800 0x200>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x95>; - }; - - i2c@7e205a00 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7e205a00 0x200>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x96>; - }; - - i2c@7e205c00 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7e205c00 0x200>; - interrupts = <0x00 0x75 0x04>; - clocks = <0x06 0x14>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0x97>; - }; - - pixelvalve@7e206000 { - compatible = "brcm,bcm2711-pixelvalve0"; - reg = <0x7e206000 0x100>; - interrupts = <0x00 0x6d 0x04>; - status = "okay"; - phandle = <0x98>; - }; - - pixelvalve@7e207000 { - compatible = "brcm,bcm2711-pixelvalve1"; - reg = <0x7e207000 0x100>; - interrupts = <0x00 0x6e 0x04>; - status = "okay"; - phandle = <0x99>; - }; - - pixelvalve@7e20a000 { - compatible = "brcm,bcm2711-pixelvalve2"; - reg = <0x7e20a000 0x100>; - interrupts = <0x00 0x65 0x04>; - status = "okay"; - phandle = <0x9a>; - }; - - pwm@7e20c800 { - compatible = "brcm,bcm2835-pwm"; - reg = <0x7e20c800 0x28>; - clocks = <0x06 0x1e>; - assigned-clocks = <0x06 0x1e>; - assigned-clock-rates = <0x989680>; - #pwm-cells = <0x02>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0x14 0x15>; - phandle = <0x9b>; - }; - - pixelvalve@7e216000 { - compatible = "brcm,bcm2711-pixelvalve4"; - reg = <0x7e216000 0x100>; - interrupts = <0x00 0x6e 0x04>; - status = "okay"; - phandle = <0x9c>; - }; - - pixelvalve@7ec12000 { - compatible = "brcm,bcm2711-pixelvalve3"; - reg = <0x7ec12000 0x100>; - interrupts = <0x00 0x6a 0x04>; - status = "disabled"; - phandle = <0x9d>; - }; - - vec@7ec13000 { - compatible = "brcm,bcm2711-vec"; - reg = <0x7ec13000 0x1000>; - clocks = <0x06 0x18>; - interrupts = <0x00 0x7b 0x04>; - status = "disabled"; - power-domains = <0x0b 0x07>; - phandle = <0x9e>; - }; - - clock@7ef00000 { - compatible = "brcm,brcm2711-dvp"; - reg = <0x7ef00000 0x10>; - clocks = <0x16>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - phandle = <0x17>; - }; - - interrupt-controller@7ef00100 { - compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; - reg = <0x7ef00100 0x30>; - interrupts = <0x00 0x60 0x04>; - interrupt-controller; - #interrupt-cells = <0x01>; - phandle = <0x18>; - }; - - hdmi@7ef00700 { - compatible = "brcm,bcm2711-hdmi0"; - reg = <0x7ef00700 0x300 0x7ef00300 0x200 0x7ef00f00 0x80 0x7ef00f80 0x80 0x7ef01b00 0x200 0x7ef01f00 0x400 0x7ef00200 0x80 0x7ef04300 0x100 0x7ef20000 0x100>; - reg-names = "hdmi", "dvp", "phy", "rm", "packet", "metadata", "csc", "cec", "hd"; - clock-names = "hdmi", "bvb", "audio", "cec"; - resets = <0x17 0x00>; - interrupt-parent = <0x18>; - interrupts = <0x00 0x01 0x02 0x03 0x04 0x05>; - interrupt-names = "cec-tx", "cec-rx", "cec-low", "wakeup", "hpd-connected", "hpd-removed"; - ddc = <0x19>; - dmas = <0x1a 0x0a>; - dma-names = "audio-rx"; - status = "okay"; - clocks = <0x10 0x0d 0x10 0x0e 0x17 0x00 0x1b>; - wifi-2.4ghz-coexistence; - phandle = <0x9f>; - }; - - i2c@7ef04500 { - compatible = "brcm,bcm2711-hdmi-i2c"; - reg = <0x7ef04500 0x100 0x7ef00b00 0x300>; - reg-names = "bsc", "auto-i2c"; - clock-frequency = <0x17cdc>; - status = "okay"; - phandle = <0x19>; - }; - - hdmi@7ef05700 { - compatible = "brcm,bcm2711-hdmi1"; - reg = <0x7ef05700 0x300 0x7ef05300 0x200 0x7ef05f00 0x80 0x7ef05f80 0x80 0x7ef06b00 0x200 0x7ef06f00 0x400 0x7ef00280 0x80 0x7ef09300 0x100 0x7ef20000 0x100>; - reg-names = "hdmi", "dvp", "phy", "rm", "packet", "metadata", "csc", "cec", "hd"; - ddc = <0x1c>; - clock-names = "hdmi", "bvb", "audio", "cec"; - resets = <0x17 0x01>; - interrupt-parent = <0x18>; - interrupts = <0x08 0x07 0x06 0x09 0x0a 0x0b>; - interrupt-names = "cec-tx", "cec-rx", "cec-low", "wakeup", "hpd-connected", "hpd-removed"; - dmas = <0x1a 0x11>; - dma-names = "audio-rx"; - status = "okay"; - clocks = <0x10 0x0d 0x10 0x0e 0x17 0x01 0x1b>; - wifi-2.4ghz-coexistence; - phandle = <0xa0>; - }; - - i2c@7ef09500 { - compatible = "brcm,bcm2711-hdmi-i2c"; - reg = <0x7ef09500 0x100 0x7ef05b00 0x300>; - reg-names = "bsc", "auto-i2c"; - clock-frequency = <0x17cdc>; - status = "okay"; - phandle = <0x1c>; - }; - - firmware { - compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; - #address-cells = <0x01>; - #size-cells = <0x01>; - mboxes = <0x1d>; - dma-ranges; - phandle = <0x1e>; - - clocks { - compatible = "raspberrypi,firmware-clocks"; - #clock-cells = <0x01>; - phandle = <0x10>; - }; - - gpio { - compatible = "raspberrypi,firmware-gpio"; - gpio-controller; - #gpio-cells = <0x02>; - status = "okay"; - gpio-line-names = "BT_ON", "WL_ON", "PWR_LED_OFF", "GLOBAL_RESET", "VDD_SD_IO_SEL", "CAM_GPIO", "SD_PWR_ON", ""; - phandle = <0x09>; - }; - - reset { - compatible = "raspberrypi,firmware-reset"; - #reset-cells = <0x01>; - phandle = <0x26>; - }; - }; - - power { - compatible = "raspberrypi,bcm2835-power"; - firmware = <0x1e>; - #power-domain-cells = <0x01>; - phandle = <0x0b>; - }; - - mailbox@7e00b840 { - compatible = "brcm,bcm2835-vchiq"; - reg = <0x7e00b840 0x3c>; - interrupts = <0x00 0x22 0x04>; - phandle = <0xa1>; - }; - }; - - clocks { - - clk-osc { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-output-names = "osc"; - clock-frequency = <0x337f980>; - phandle = <0x03>; - }; - - clk-usb { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-output-names = "otg"; - clock-frequency = <0x1c9c3800>; - phandle = <0x12>; - }; - }; - - phy { - compatible = "usb-nop-xceiv"; - #phy-cells = <0x00>; - phandle = <0x13>; - }; - - gpu { - compatible = "brcm,bcm2711-vc5"; - status = "okay"; - phandle = <0xa2>; - }; - - clk-27M { - #clock-cells = <0x00>; - compatible = "fixed-clock"; - clock-frequency = <0x19bfcc0>; - clock-output-names = "27MHz-clock"; - phandle = <0x1b>; - }; - - clk-108M { - #clock-cells = <0x00>; - compatible = "fixed-clock"; - clock-frequency = <0x66ff300>; - clock-output-names = "108MHz-clock"; - phandle = <0x16>; - }; - - emmc2bus { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x01>; - ranges = <0x00 0x7e000000 0x00 0xfe000000 0x1800000>; - dma-ranges = <0x00 0xc0000000 0x00 0x00 0x40000000>; - phandle = <0xa3>; - - mmc@7e340000 { - compatible = "brcm,bcm2711-emmc2"; - reg = <0x00 0x7e340000 0x100>; - interrupts = <0x00 0x7e 0x04>; - clocks = <0x06 0x33>; - status = "okay"; - vqmmc-supply = <0x1f>; - vmmc-supply = <0x20>; - broken-cd; - phandle = <0xa4>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; - interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>; - interrupt-affinity = <0x21 0x22 0x23 0x24>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>; - arm,cpu-registers-not-fw-configured; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - enable-method = "brcm,bcm2836-smp"; - phandle = <0xa5>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x00>; - enable-method = "spin-table"; - cpu-release-addr = <0x00 0xd8>; - phandle = <0x21>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x01>; - enable-method = "spin-table"; - cpu-release-addr = <0x00 0xe0>; - phandle = <0x22>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x02>; - enable-method = "spin-table"; - cpu-release-addr = <0x00 0xe8>; - phandle = <0x23>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x03>; - enable-method = "spin-table"; - cpu-release-addr = <0x00 0xf0>; - phandle = <0x24>; - }; - }; - - scb { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x01>; - ranges = <0x00 0x7c000000 0x00 0xfc000000 0x3800000 0x06 0x00 0x06 0x00 0x40000000>; - - pcie@7d500000 { - compatible = "brcm,bcm2711-pcie"; - reg = <0x00 0x7d500000 0x9310>; - device_type = "pci"; - #address-cells = <0x03>; - #interrupt-cells = <0x01>; - #size-cells = <0x02>; - interrupts = <0x00 0x94 0x04 0x00 0x94 0x04>; - interrupt-names = "pcie", "msi"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8f 0x04>; - msi-controller; - msi-parent = <0x25>; - ranges = <0x2000000 0x00 0xf8000000 0x06 0x00 0x00 0x4000000>; - dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x00 0xc0000000>; - brcm,enable-ssc; - phandle = <0x25>; - - pci@0,0 { - device_type = "pci"; - #address-cells = <0x03>; - #size-cells = <0x02>; - ranges; - reg = <0x00 0x00 0x00 0x00 0x00>; - - usb@0,0 { - reg = <0x00 0x00 0x00 0x00 0x00>; - resets = <0x26 0x00>; - }; - }; - }; - - ethernet@7d580000 { - compatible = "brcm,bcm2711-genet-v5"; - reg = <0x00 0x7d580000 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - interrupts = <0x00 0x9d 0x04 0x00 0x9e 0x04>; - status = "okay"; - phy-handle = <0x27>; - phy-mode = "rgmii-rxid"; - phandle = <0xa6>; - - mdio@e14 { - compatible = "brcm,genet-mdio-v5"; - reg = <0xe14 0x08>; - reg-names = "mdio"; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0xa7>; - - ethernet-phy@1 { - reg = <0x01>; - phandle = <0x27>; - }; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-act { - label = "ACT"; - default-state = "keep"; - linux,default-trigger = "heartbeat"; - gpios = <0x28 0x2a 0x00>; - }; - - led-pwr { - label = "PWR"; - gpios = <0x09 0x02 0x01>; - default-state = "keep"; - linux,default-trigger = "default-on"; - }; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00 0x00 0x00>; - }; - - wifi-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <0x09 0x01 0x01>; - phandle = <0x0f>; - }; - - sd_io_1v8_reg { - compatible = "regulator-gpio"; - regulator-name = "vdd-sd-io"; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-settling-time-us = <0x1388>; - gpios = <0x09 0x04 0x00>; - states = <0x1b7740 0x01 0x325aa0 0x00>; - status = "okay"; - phandle = <0x1f>; - }; - - sd_vcc_reg { - compatible = "regulator-fixed"; - regulator-name = "vcc-sd"; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - enable-active-high; - gpio = <0x09 0x06 0x00>; - phandle = <0x20>; - }; - - __symbols__ { - rmem = "/reserved-memory"; - cma = "/reserved-memory/linux,cma"; - blconfig = "/reserved-memory/nvram@0"; - cpu_thermal = "/thermal-zones/cpu-thermal"; - system_timer = "/soc/timer@7e003000"; - txp = "/soc/txp@7e004000"; - clocks = "/soc/cprman@7e101000"; - mailbox = "/soc/mailbox@7e00b880"; - gpio = "/soc/gpio@7e200000"; - dpi_gpio0 = "/soc/gpio@7e200000/dpi_gpio0"; - emmc_gpio22 = "/soc/gpio@7e200000/emmc_gpio22"; - emmc_gpio34 = "/soc/gpio@7e200000/emmc_gpio34"; - emmc_gpio48 = "/soc/gpio@7e200000/emmc_gpio48"; - gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0_gpio4"; - gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1_gpio5"; - gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1_gpio42"; - gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1_gpio44"; - gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2_gpio6"; - gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2_gpio43"; - i2c0_gpio0 = "/soc/gpio@7e200000/i2c0_gpio0"; - i2c0_gpio28 = "/soc/gpio@7e200000/i2c0_gpio28"; - i2c0_gpio44 = "/soc/gpio@7e200000/i2c0_gpio44"; - i2c1_gpio2 = "/soc/gpio@7e200000/i2c1_gpio2"; - i2c1_gpio44 = "/soc/gpio@7e200000/i2c1_gpio44"; - jtag_gpio22 = "/soc/gpio@7e200000/jtag_gpio22"; - pcm_gpio18 = "/soc/gpio@7e200000/pcm_gpio18"; - pcm_gpio28 = "/soc/gpio@7e200000/pcm_gpio28"; - sdhost_gpio48 = "/soc/gpio@7e200000/sdhost_gpio48"; - spi0_gpio7 = "/soc/gpio@7e200000/spi0_gpio7"; - spi0_gpio35 = "/soc/gpio@7e200000/spi0_gpio35"; - spi1_gpio16 = "/soc/gpio@7e200000/spi1_gpio16"; - spi2_gpio40 = "/soc/gpio@7e200000/spi2_gpio40"; - uart0_gpio14 = "/soc/gpio@7e200000/uart0_gpio14"; - uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0_ctsrts_gpio16"; - uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0_ctsrts_gpio30"; - uart0_gpio32 = "/soc/gpio@7e200000/uart0_gpio32"; - uart0_gpio36 = "/soc/gpio@7e200000/uart0_gpio36"; - uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0_ctsrts_gpio38"; - uart1_gpio14 = "/soc/gpio@7e200000/uart1_gpio14"; - uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1_ctsrts_gpio16"; - uart1_gpio32 = "/soc/gpio@7e200000/uart1_gpio32"; - uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1_ctsrts_gpio30"; - uart1_gpio40 = "/soc/gpio@7e200000/uart1_gpio40"; - uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1_ctsrts_gpio42"; - gpclk0_gpio49 = "/soc/gpio@7e200000/gpclk0_gpio49"; - gpclk1_gpio50 = "/soc/gpio@7e200000/gpclk1_gpio50"; - gpclk2_gpio51 = "/soc/gpio@7e200000/gpclk2_gpio51"; - i2c0_gpio46 = "/soc/gpio@7e200000/i2c0_gpio46"; - i2c1_gpio46 = "/soc/gpio@7e200000/i2c1_gpio46"; - i2c3_gpio2 = "/soc/gpio@7e200000/i2c3_gpio2"; - i2c3_gpio4 = "/soc/gpio@7e200000/i2c3_gpio4"; - i2c4_gpio6 = "/soc/gpio@7e200000/i2c4_gpio6"; - i2c4_gpio8 = "/soc/gpio@7e200000/i2c4_gpio8"; - i2c5_gpio10 = "/soc/gpio@7e200000/i2c5_gpio10"; - i2c5_gpio12 = "/soc/gpio@7e200000/i2c5_gpio12"; - i2c6_gpio0 = "/soc/gpio@7e200000/i2c6_gpio0"; - i2c6_gpio22 = "/soc/gpio@7e200000/i2c6_gpio22"; - i2c_slave_gpio8 = "/soc/gpio@7e200000/i2c_slave_gpio8"; - jtag_gpio48 = "/soc/gpio@7e200000/jtag_gpio48"; - mii_gpio28 = "/soc/gpio@7e200000/mii_gpio28"; - mii_gpio36 = "/soc/gpio@7e200000/mii_gpio36"; - pcm_gpio50 = "/soc/gpio@7e200000/pcm_gpio50"; - pwm0_0_gpio12 = "/soc/gpio@7e200000/pwm0_0_gpio12"; - pwm0_0_gpio18 = "/soc/gpio@7e200000/pwm0_0_gpio18"; - pwm1_0_gpio40 = "/soc/gpio@7e200000/pwm1_0_gpio40"; - pwm0_1_gpio13 = "/soc/gpio@7e200000/pwm0_1_gpio13"; - pwm0_1_gpio19 = "/soc/gpio@7e200000/pwm0_1_gpio19"; - pwm1_1_gpio41 = "/soc/gpio@7e200000/pwm1_1_gpio41"; - pwm0_1_gpio45 = "/soc/gpio@7e200000/pwm0_1_gpio45"; - pwm0_0_gpio52 = "/soc/gpio@7e200000/pwm0_0_gpio52"; - pwm0_1_gpio53 = "/soc/gpio@7e200000/pwm0_1_gpio53"; - rgmii_gpio35 = "/soc/gpio@7e200000/rgmii_gpio35"; - rgmii_irq_gpio34 = "/soc/gpio@7e200000/rgmii_irq_gpio34"; - rgmii_irq_gpio39 = "/soc/gpio@7e200000/rgmii_irq_gpio39"; - rgmii_mdio_gpio28 = "/soc/gpio@7e200000/rgmii_mdio_gpio28"; - rgmii_mdio_gpio37 = "/soc/gpio@7e200000/rgmii_mdio_gpio37"; - spi0_gpio46 = "/soc/gpio@7e200000/spi0_gpio46"; - spi2_gpio46 = "/soc/gpio@7e200000/spi2_gpio46"; - spi3_gpio0 = "/soc/gpio@7e200000/spi3_gpio0"; - spi4_gpio4 = "/soc/gpio@7e200000/spi4_gpio4"; - spi5_gpio12 = "/soc/gpio@7e200000/spi5_gpio12"; - spi6_gpio18 = "/soc/gpio@7e200000/spi6_gpio18"; - uart2_gpio0 = "/soc/gpio@7e200000/uart2_gpio0"; - uart2_ctsrts_gpio2 = "/soc/gpio@7e200000/uart2_ctsrts_gpio2"; - uart3_gpio4 = "/soc/gpio@7e200000/uart3_gpio4"; - uart3_ctsrts_gpio6 = "/soc/gpio@7e200000/uart3_ctsrts_gpio6"; - uart4_gpio8 = "/soc/gpio@7e200000/uart4_gpio8"; - uart4_ctsrts_gpio10 = "/soc/gpio@7e200000/uart4_ctsrts_gpio10"; - uart5_gpio12 = "/soc/gpio@7e200000/uart5_gpio12"; - uart5_ctsrts_gpio14 = "/soc/gpio@7e200000/uart5_ctsrts_gpio14"; - gpioout = "/soc/gpio@7e200000/gpioout"; - alt0 = "/soc/gpio@7e200000/alt0"; - uart0 = "/soc/serial@7e201000"; - sdhost = "/soc/mmc@7e202000"; - i2s = "/soc/i2s@7e203000"; - spi = "/soc/spi@7e204000"; - i2c0 = "/soc/i2c@7e205000"; - dpi = "/soc/dpi@7e208000"; - dsi0 = "/soc/dsi@7e209000"; - aux = "/soc/aux@7e215000"; - uart1 = "/soc/serial@7e215040"; - spi1 = "/soc/spi@7e215080"; - spi2 = "/soc/spi@7e2150c0"; - pwm = "/soc/pwm@7e20c000"; - sdhci = "/soc/mmc@7e300000"; - brcmf = "/soc/mmc@7e300000/wifi@1"; - hvs = "/soc/hvs@7e400000"; - dsi1 = "/soc/dsi@7e700000"; - i2c1 = "/soc/i2c@7e804000"; - usb = "/soc/usb@7e980000"; - local_intc = "/soc/local_intc@40000000"; - gicv2 = "/soc/interrupt-controller@40041000"; - avs_monitor = "/soc/avs-monitor@7d5d2000"; - thermal = "/soc/avs-monitor@7d5d2000/thermal"; - dma = "/soc/dma@7e007000"; - pm = "/soc/watchdog@7e100000"; - uart2 = "/soc/serial@7e201400"; - uart3 = "/soc/serial@7e201600"; - uart4 = "/soc/serial@7e201800"; - uart5 = "/soc/serial@7e201a00"; - spi3 = "/soc/spi@7e204600"; - spi4 = "/soc/spi@7e204800"; - spi5 = "/soc/spi@7e204a00"; - spi6 = "/soc/spi@7e204c00"; - i2c3 = "/soc/i2c@7e205600"; - i2c4 = "/soc/i2c@7e205800"; - i2c5 = "/soc/i2c@7e205a00"; - i2c6 = "/soc/i2c@7e205c00"; - pixelvalve0 = "/soc/pixelvalve@7e206000"; - pixelvalve1 = "/soc/pixelvalve@7e207000"; - pixelvalve2 = "/soc/pixelvalve@7e20a000"; - pwm1 = "/soc/pwm@7e20c800"; - pixelvalve4 = "/soc/pixelvalve@7e216000"; - pixelvalve3 = "/soc/pixelvalve@7ec12000"; - vec = "/soc/vec@7ec13000"; - dvp = "/soc/clock@7ef00000"; - aon_intr = "/soc/interrupt-controller@7ef00100"; - hdmi0 = "/soc/hdmi@7ef00700"; - ddc0 = "/soc/i2c@7ef04500"; - hdmi1 = "/soc/hdmi@7ef05700"; - ddc1 = "/soc/i2c@7ef09500"; - firmware = "/soc/firmware"; - firmware_clocks = "/soc/firmware/clocks"; - expgpio = "/soc/firmware/gpio"; - reset = "/soc/firmware/reset"; - power = "/soc/power"; - vchiq = "/soc/mailbox@7e00b840"; - clk_osc = "/clocks/clk-osc"; - clk_usb = "/clocks/clk-usb"; - usbphy = "/phy"; - vc4 = "/gpu"; - clk_27MHz = "/clk-27M"; - clk_108MHz = "/clk-108M"; - emmc2bus = "/emmc2bus"; - emmc2 = "/emmc2bus/mmc@7e340000"; - cpus = "/cpus"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - pcie0 = "/scb/pcie@7d500000"; - genet = "/scb/ethernet@7d580000"; - genet_mdio = "/scb/ethernet@7d580000/mdio@e14"; - phy1 = "/scb/ethernet@7d580000/mdio@e14/ethernet-phy@1"; - wifi_pwrseq = "/wifi-pwrseq"; - sd_io_1v8_reg = "/sd_io_1v8_reg"; - sd_vcc_reg = "/sd_vcc_reg"; - }; -}; diff --git a/etc/dtb/jh7110-starfive-visionfive-v1.3b.dts b/etc/dtb/jh7110-starfive-visionfive-v1.3b.dts deleted file mode 100644 index 4e4233e9..00000000 --- a/etc/dtb/jh7110-starfive-visionfive-v1.3b.dts +++ /dev/null @@ -1,2757 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <0x02>; - model = "StarFive VisionFive 2 v1.3B"; - serial-number = "VF7110B1-2318-D008E000-18003903"; - #size-cells = <0x02>; - compatible = "starfive,visionfive-2-v1.3b\0starfive,jh7110"; - - dsi-output { - compatible = "starfive,jh7110-display-encoder\0verisilicon,dsi-encoder"; - status = "okay"; - phandle = <0x6a>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - - endpoint { - remote-endpoint = <0x0b>; - phandle = <0x52>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x0c>; - phandle = <0x5a>; - }; - }; - }; - }; - - &clk_osc: oscillator { - clock-output-names = "osc"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x29>; - }; - - i2stx-lrck-ext-clock { - clock-output-names = "i2stx_lrck_ext"; - #clock-cells = <0x00>; - clock-frequency = <0x2ee00>; - compatible = "fixed-clock"; - phandle = <0x32>; - }; - - stmmac-axi-config { - snps,lpi_en; - snps,wr_osr_lmt = <0x0f>; - phandle = <0x3f>; - snps,blen = <0x100 0x80 0x40 0x20 0x00 0x00 0x00>; - snps,rd_osr_lmt = <0x0f>; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0x00 0x40000000 0x02 0x00>; - }; - - gmac1-rmii-refin-clock { - clock-output-names = "gmac1_rmii_refin"; - #clock-cells = <0x00>; - clock-frequency = <0x2faf080>; - compatible = "fixed-clock"; - phandle = <0x35>; - }; - - display-subsystem { - ports = <0x0a>; - compatible = "starfive,jh7110-display\0verisilicon,display-subsystem"; - status = "okay"; - phandle = <0x69>; - }; - - rgb-output { - compatible = "starfive,jh7110-rgb_output\0verisilicon,rgb-encoder"; - status = "disabled"; - phandle = <0x6c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@0 { - remote-endpoint = <0x0a>; - reg = <0x00>; - phandle = <0x50>; - }; - }; - }; - }; - - rtc-oscillator { - clock-output-names = "rtc_osc"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - compatible = "fixed-clock"; - phandle = <0x45>; - }; - - snd-card3 { - simple-audio-card,name = "Starfive-PWMDAC-Sound-Card"; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "simple-audio-card"; - phandle = <0xac>; - - simple-audio-card,dai-link@0 { - format = "left_j"; - frame-master = <0x63>; - bitclock-master = <0x63>; - reg = <0x00>; - - cpu { - phandle = <0x63>; - sound-dai = <0x64>; - }; - - codec { - sound-dai = <0x65>; - }; - }; - }; - - thermal-zones { - - cpu-thermal { - polling-delay = <0x3a98>; - polling-delay-passive = <0xfa>; - thermal-sensors = <0x0e>; - - trips { - - cpu_crit { - temperature = <0x186a0>; - hysteresis = <0x7d0>; - type = "critical"; - }; - - cpu_alert0 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x0f>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x0f>; - cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>; - }; - }; - }; - }; - - gmac1-rgmii-rxin-clock { - clock-output-names = "gmac1_rgmii_rxin"; - #clock-cells = <0x00>; - clock-frequency = <0x7735940>; - compatible = "fixed-clock"; - phandle = <0x36>; - }; - - soc { - #address-cells = <0x02>; - #size-cells = <0x02>; - interrupt-parent = <0x10>; - compatible = "simple-bus"; - ranges; - - e24@6e210000 { - #address-cells = <0x01>; - dma-coherent; - clock-names = "clk_rtc\0clk_core\0clk_dbg"; - reg-names = "ecmd\0espace"; - irq-mode = <0x01>; - firmware-name = "e24_elf"; - starfive,stg-syscon = <0x26>; - resets = <0x27 0x04>; - memory-region = <0x5b>; - clocks = <0x27 0x18 0x27 0x19 0x27 0x1a>; - #size-cells = <0x01>; - interrupt-parent = <0x10>; - compatible = "starfive,e24"; - ranges = <0x6ce00000 0x00 0x6ce00000 0x1600000>; - status = "okay"; - reg = <0x00 0x6e210000 0x00 0x1000 0x00 0x6e211000 0x00 0x3f000>; - phandle = <0xa8>; - mboxes = <0x0d 0x00 0x02 0x0d 0x02 0x00>; - reset-names = "e24_core"; - mbox-names = "tx\0rx"; - - dsp@0 { - }; - }; - - spi@12070000 { - arm,primecell-periphid = <0x41022>; - #address-cells = <0x01>; - num-cs = <0x01>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x48>; - interrupts = <0x34>; - clocks = <0x03 0x86 0x03 0x86>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "disabled"; - reg = <0x00 0x12070000 0x00 0x10000>; - phandle = <0x8d>; - }; - - phy@10220000 { - #phy-cells = <0x00>; - compatible = "starfive,jh7110-pcie-phy"; - reg = <0x00 0x10220000 0x00 0x10000>; - phandle = <0x60>; - }; - - hdmi@29590000 { - pinctrl-names = "default"; - hdmi_0p9-supply = <0x54>; - pinctrl-0 = <0x53>; - clock-names = "sysclk\0mclk\0bclk\0pclk"; - hdmi_1p8-supply = <0x55>; - resets = <0x4e 0x09>; - interrupts = <0x63>; - clocks = <0x4e 0x11 0x4e 0x0f 0x4e 0x10 0x4f>; - hpd-gpio = <0x1a 0x0f 0x00>; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-hdmi\0inno,hdmi"; - status = "okay"; - reg = <0x00 0x29590000 0x00 0x4000>; - phandle = <0x68>; - reset-names = "hdmi_tx"; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0xa6>; - - endpoint@0 { - remote-endpoint = <0x56>; - reg = <0x00>; - phandle = <0x51>; - }; - }; - }; - - /* Verisilicon DC8200 Display Controller */ - &dc8200: dc8200@29400000 { - verisilicon,dss-syscon = <0x4d>; - compatible = "starfive,jh7110-dc8200", "verisilicon,dc8200"; - clock-names = - "noc_disp", - "vout_src", - "top_vout_axi", - "top_vout_ahb", - "pix_clk", - "vout_pix1", - "axi_clk", - "core_clk", - "vout_ahb", - "vout_top_axi", - "vout_top_lcd", - "hdmitx0_pixelclk", - "dc8200_pix0"; - clocks = < - &syscrg 0x3c /* NOC DISP */ - &syscrg 0x3a /* VOUT SRC */ - &syscrg 0x3e /* TOP VOUT AXI */ - &syscrg 0x3d /* TOP VOUT AHB */ - &voutcrg 0x07 /* PIX CLK */ - &voutcrg 0x08 /* VOUT PIX1 */ - &voutcrg 0x04 /* AXI CLK */ - &voutcrg 0x05 /* CORE CLK */ - &voutcrg 0x06 /* VOUT AHB */ - &syscrg 0x3e /* VOUT TOP AXI */ - &voutcrg 0x09 /* VOUT TOP LCD */ - &hdmitx0_pixelclk /* HDMITX0 PIXELCLK */ /* Fixed @ 297MHz */ - &voutcrg 0x01 /* DC8200 PIX0 */ - >; - reset-names = - "rst_vout_src", - "rst_axi", - "rst_ahb", - "rst_core", - "rst_noc_disp"; - resets = < - &syscrg 0x2b /* rst_vout_src */ - &voutcrg 0x00 /* rst_axi */ - &voutcrg 0x01 /* rst_ahb */ - &voutcrg 0x02 /* rst_core */ - &syscrg 0x1a /* rst_noc_disp */ - >; - interrupts = <0x5f>; - status = "okay"; - reg = - <0x00 0x29400000 0x00 0x100>, - <0x00 0x29400800 0x00 0x2000>, - <0x00 0x17030000 0x00 0x1000>; - // phandle = <0xa4>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0xa5>; - - endpoint@1 { - remote-endpoint = <0x51>; - reg = <0x01>; - phandle = <0x56>; - }; - - endpoint@2 { - remote-endpoint = <0x52>; - reg = <0x02>; - phandle = <0x0b>; - }; - - endpoint@0 { - remote-endpoint = <0x50>; - reg = <0x00>; - phandle = <0x0a>; - }; - }; - }; - - spdif@100a0000 { - clock-names = "apb\0core\0audroot\0mclk_inner\0mclk_ext\0mclk"; - resets = <0x03 0x5f>; - interrupts = <0x54>; - clocks = <0x03 0x9f 0x03 0xa0 0x03 0x10 0x03 0x11 0x20 0x03 0x12>; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-spdif"; - status = "disabled"; - interrupt-names = "tx"; - reg = <0x00 0x100a0000 0x00 0x1000>; - phandle = <0x7b>; - reset-names = "apb"; - }; - - serial@10020000 { - reg-io-width = <0x04>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x03 0x57 0x03 0x58>; - interrupts = <0x22>; - clocks = <0x03 0x96 0x03 0x95>; - compatible = "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0x10020000 0x00 0x10000>; - phandle = <0x71>; - reg-shift = <0x02>; - }; - - vin_sysctl@19800000 { - power-domains = <0x38 0x05>; - mipi_0p9-supply = <0x48>; - clock-names = "clk_apb_func\0clk_pclk\0clk_sys_clk\0clk_wrapper_clk_c\0clk_dvp_inv\0clk_axiwr\0clk_mipi_rx0_pxl\0clk_pixel_clk_if0\0clk_pixel_clk_if1\0clk_pixel_clk_if2\0clk_pixel_clk_if3\0clk_m31dphy_cfgclk_in\0clk_m31dphy_refclk_in\0clk_m31dphy_txclkesc_lan0\0clk_ispcore_2x\0clk_isp_axi"; - reg-names = "csi2rx\0vclk\0vrst\0sctrl\0isp\0trst\0pmu\0syscrg"; - resets = <0x46 0x00 0x46 0x01 0x46 0x04 0x46 0x09 0x46 0x0a 0x46 0x0b 0x46 0x05 0x46 0x06 0x46 0x07 0x46 0x08 0x46 0x02 0x46 0x03 0x03 0x29 0x03 0x2a>; - interrupts = <0x5c 0x57 0x58 0x59 0x5a>; - clocks = <0x46 0x00 0x46 0x06 0x46 0x07 0x46 0x0d 0x46 0x02 0x46 0x0c 0x46 0x01 0x46 0x08 0x46 0x09 0x46 0x0a 0x46 0x0b 0x46 0x03 0x46 0x04 0x46 0x05 0x03 0x33 0x03 0x34>; - starfive,aon-syscon = <0x40 0x00>; - compatible = "starfive,jh7110-vin"; - status = "okay"; - reg = <0x00 0x19800000 0x00 0x10000 0x00 0x19810000 0x00 0x10000 0x00 0x19820000 0x00 0x10000 0x00 0x19840000 0x00 0x10000 0x00 0x19870000 0x00 0x30000 0x00 0x11840000 0x00 0x10000 0x00 0x17030000 0x00 0x10000 0x00 0x13020000 0x00 0x10000>; - phandle = <0xa3>; - reset-names = "rst_wrapper_p\0rst_wrapper_c\0rst_pclk\0rst_sys_clk\0rst_axird\0rst_axiwr\0rst_pixel_clk_if0\0rst_pixel_clk_if1\0rst_pixel_clk_if2\0rst_pixel_clk_if3\0rst_m31dphy_hw\0rst_m31dphy_b09_always_on\0rst_isp_top_n\0rst_isp_top_axi"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@1 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x01>; - - endpoint@1 { - data-lanes = <0x00 0x01>; - clock-lanes = <0x04>; - remote-endpoint = <0x4a>; - bus-type = <0x04>; - status = "okay"; - lane-polarities = <0x00 0x00 0x00>; - reg = <0x01>; - phandle = <0x2e>; - }; - - endpoint@2 { - data-lanes = <0x00 0x01>; - clock-lanes = <0x04>; - remote-endpoint = <0x4b>; - bus-type = <0x04>; - status = "okay"; - reg = <0x02>; - phandle = <0x2f>; - }; - - endpoint@0 { - data-lanes = <0x00 0x01>; - clock-lanes = <0x04>; - remote-endpoint = <0x49>; - bus-type = <0x04>; - status = "okay"; - lane-polarities = <0x00 0x00 0x00>; - reg = <0x00>; - phandle = <0x2d>; - }; - }; - }; - }; - - syscon@13030000 { - compatible = "starfive,jh7110-sys-syscon\0syscon\0simple-mfd"; - reg = <0x00 0x13030000 0x00 0x1000>; - phandle = <0x22>; - - clock-controller { - clocks = <0x29>; - #clock-cells = <0x01>; - compatible = "starfive,jh7110-pll"; - phandle = <0x37>; - }; - }; - - i2c@10050000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - i2c-sda-hold-time-ns = <0x12c>; - pinctrl-0 = <0x18>; - clock-names = "ref"; - i2c-scl-falling-time-ns = <0x1fe>; - i2c-sda-falling-time-ns = <0x1fe>; - resets = <0x03 0x4e>; - interrupts = <0x25>; - clocks = <0x03 0x8c>; - #size-cells = <0x00>; - clock-frequency = <0x186a0>; - compatible = "snps,designware-i2c"; - status = "okay"; - reg = <0x00 0x10050000 0x00 0x10000>; - phandle = <0x74>; - - tinker_ft5406@38 { - compatible = "tinker_ft5406"; - reg = <0x38>; - phandle = <0x75>; - }; - - touchscreen@14 { - irq-gpios = <0x1a 0x1e 0x00>; - reset-gpios = <0x1a 0x1f 0x00>; - compatible = "goodix,gt911"; - reg = <0x14>; - }; - - panel_radxa@19 { - enable-gpio = <0x1a 0x16 0x00>; - reset-gpio = <0x1a 0x17 0x00>; - compatible = "starfive_jadard"; - reg = <0x19>; - - port { - - endpoint { - remote-endpoint = <0x1b>; - phandle = <0x59>; - }; - }; - }; - - seeed_plane_i2c@45 { - compatible = "seeed_panel"; - reg = <0x45>; - - port { - - endpoint { - remote-endpoint = <0x19>; - phandle = <0x58>; - }; - }; - }; - }; - - serial@12000000 { - reg-io-width = <0x04>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x03 0x59 0x03 0x5a>; - interrupts = <0x2d>; - clocks = <0x03 0x98 0x03 0x97>; - compatible = "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0x12000000 0x00 0x10000>; - phandle = <0x82>; - reg-shift = <0x02>; - }; - - csi-bridge@19800000 { - phy-names = "dphy"; - clock-names = "sys_clk\0p_clk\0pixel_if0_clk\0pixel_if1_clk\0pixel_if2_clk\0pixel_if3_clk"; - resets = <0x46 0x09 0x46 0x04 0x46 0x05 0x46 0x06 0x46 0x07 0x46 0x08>; - clocks = <0x46 0x07 0x46 0x06 0x46 0x08 0x46 0x09 0x46 0x0a 0x46 0x0b>; - compatible = "starfive,jh7110-csi2rx"; - status = "disabled"; - phys = <0x47>; - reg = <0x00 0x19800000 0x00 0x10000>; - phandle = <0xa2>; - reset-names = "sys\0reg_bank\0pixel_if0\0pixel_if1\0pixel_if2\0pixel_if3"; - }; - - jpu@13090000 { - power-domains = <0x38 0x03>; - dma-coherent; - clock-names = "axi_clk\0core_clk\0apb_clk\0noc_bus\0main_clk\0dec_clk"; - resets = <0x03 0x2c 0x03 0x2d 0x03 0x2e>; - interrupts = <0x0e>; - clocks = <0x03 0x42 0x03 0x43 0x03 0x44 0x03 0x4c 0x03 0x4b 0x03 0x4a>; - compatible = "starfive,jpu"; - status = "okay"; - reg = <0x00 0x13090000 0x00 0x300>; - phandle = <0x95>; - reset-names = "rst_axi\0rst_core\0rst_apb"; - }; - - dma-controller@16008000 { - memcpy-bus-width = <0x20>; - arm,primecell-periphid = <0x41080>; - lli-bus-interface-ahb1; - clock-names = "apb_pclk"; - resets = <0x27 0x03>; - interrupts = <0x1d>; - clocks = <0x27 0x0f>; - memcpy-burst-size = <0x100>; - compatible = "arm,pl080\0arm,primecell"; - mem-bus-interface-ahb1; - reg = <0x00 0x16008000 0x00 0x4000>; - phandle = <0x39>; - #dma-cells = <0x02>; - }; - - i2c@12030000 { - #address-cells = <0x01>; - clock-names = "ref"; - resets = <0x03 0x4f>; - interrupts = <0x30>; - clocks = <0x03 0x8d>; - #size-cells = <0x00>; - compatible = "snps,designware-i2c"; - status = "disabled"; - reg = <0x00 0x12030000 0x00 0x10000>; - phandle = <0x85>; - }; - - dma-controller@16050000 { - snps,data-width = <0x03>; - snps,priority = <0x00 0x01 0x02 0x03>; - clock-names = "core-clk\0cfgr-clk"; - resets = <0x27 0x05 0x27 0x06>; - interrupts = <0x49>; - clocks = <0x27 0x1b 0x27 0x1c>; - snps,axi-max-burst-len = <0x10>; - snps,dma-masters = <0x01>; - compatible = "starfive,jh7110-axi-dma"; - snps,block-size = <0x10000 0x10000 0x10000 0x10000>; - reg = <0x00 0x16050000 0x00 0x10000>; - phandle = <0x1e>; - dma-channels = <0x04>; - #dma-cells = <0x01>; - }; - - pwm@120d0000 { - pinctrl-names = "default"; - pinctrl-0 = <0x34>; - resets = <0x03 0x6c>; - clocks = <0x03 0x79>; - #pwm-cells = <0x03>; - compatible = "starfive,jh7110-pwm\0opencores,pwm-v1"; - status = "okay"; - reg = <0x00 0x120d0000 0x00 0x10000>; - phandle = <0x92>; - }; - - syscon@10240000 { - compatible = "starfive,jh7110-stg-syscon\0syscon"; - reg = <0x00 0x10240000 0x00 0x1000>; - phandle = <0x26>; - }; - - timer@13050000 { - clock-names = "apb\0ch0\0ch1\0ch2\0ch3"; - resets = <0x03 0x75 0x03 0x76 0x03 0x77 0x03 0x78 0x03 0x79>; - interrupts = <0x45 0x46 0x47 0x48>; - clocks = <0x03 0x7c 0x03 0x7d 0x03 0x7e 0x03 0x7f 0x03 0x80>; - compatible = "starfive,jh7110-timer"; - reg = <0x00 0x13050000 0x00 0x10000>; - reset-names = "apb\0ch0\0ch1\0ch2\0ch3"; - }; - - spi@10060000 { - arm,primecell-periphid = <0x41022>; - pinctrl-names = "default"; - #address-cells = <0x01>; - num-cs = <0x01>; - pinctrl-0 = <0x1c>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x45>; - interrupts = <0x26>; - clocks = <0x03 0x83 0x03 0x83>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "okay"; - reg = <0x00 0x10060000 0x00 0x10000>; - phandle = <0x76>; - - spi@0 { - spi-max-frequency = <0x989680>; - compatible = "rohm,dh2228fv"; - reg = <0x00>; - phandle = <0x77>; - }; - }; - - pdm@100d0000 { - clock-names = "pdm_mclk\0pdm_apb\0clk_mclk\0mclk_ext"; - reg-names = "pdm"; - resets = <0x03 0x61 0x03 0x62>; - clocks = <0x03 0xb6 0x03 0xb7 0x03 0x12 0x20>; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-pdm"; - status = "disabled"; - reg = <0x00 0x100d0000 0x00 0x1000>; - phandle = <0x7c>; - reset-names = "pdm_dmic\0pdm_apb"; - }; - - pwmdac@100b0000 { - pinctrl-names = "default"; - pinctrl-0 = <0x21>; - clock-names = "apb\0core"; - resets = <0x03 0x60>; - clocks = <0x03 0x9d 0x03 0x9e>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-pwmdac"; - status = "okay"; - reg = <0x00 0x100b0000 0x00 0x1000>; - phandle = <0x64>; - dmas = <0x1e 0x16>; - }; - - can@130d0000 { - syscon,can_or_canfd = <0x00>; - clock-names = "apb_clk\0core_clk\0timer_clk"; - starfive,sys-syscon = <0x22 0x10 0x03 0x08>; - resets = <0x03 0x6f 0x03 0x70 0x03 0x71>; - interrupts = <0x70>; - clocks = <0x03 0x73 0x03 0x75 0x03 0x74>; - compatible = "starfive,jh7110-can\0ipms,can"; - status = "disabled"; - frequency = <0x2625a00>; - reg = <0x00 0x130d0000 0x00 0x1000>; - phandle = <0x98>; - reset-names = "rst_apb\0rst_core\0rst_timer"; - }; - - pinctrl@13040000 { - gpio-controller; - resets = <0x03 0x02>; - interrupts = <0x56>; - clocks = <0x03 0x70>; - compatible = "starfive,jh7110-sys-pinctrl"; - #interrupt-cells = <0x02>; - reg = <0x00 0x13040000 0x00 0x10000>; - phandle = <0x1a>; - #gpio-cells = <0x02>; - interrupt-controller; - - &pinctrl_mmc1_0: mmc1-0 { - phandle = <0x3d>; - - clk-pins { - input-schmitt-disable; - input-disable; - drive-strength = <0x0c>; - pinmux = <0xff37000a>; - slew-rate = <0x00>; - bias-pull-up; - }; - - mmc-pins { - drive-strength = <0x0c>; - pinmux = <0x2c394c09 0x2d3a500b 0x2e3b540c 0x2f3c5807 0x303d5c08>; - input-schmitt-enable; - slew-rate = <0x00>; - bias-pull-up; - input-enable; - }; - }; - - i2c2-0 { - phandle = <0x18>; - - i2c-pins { - bias-disable; - pinmux = <0x3b007803 0x3c007c02>; - input-schmitt-enable; - input-enable; - }; - }; - - i2c5-0 { - phandle = <0x2a>; - - i2c-pins { - bias-disable; - pinmux = <0x4f00a813 0x5000ac14>; - input-schmitt-enable; - input-enable; - }; - }; - - spi0-0 { - phandle = <0x1c>; - - miso-pins { - pinmux = <0x1c000435>; - input-schmitt-enable; - bias-pull-up; - input-enable; - }; - - mosi-pins { - input-schmitt-disable; - input-disable; - bias-disable; - pinmux = <0xff200034>; - }; - - ss-pins { - input-schmitt-disable; - input-disable; - bias-disable; - pinmux = <0x1b1f0031>; - }; - - sck-pins { - input-schmitt-disable; - input-disable; - bias-disable; - pinmux = <0x1a1e0030>; - }; - }; - - &pinctrl_mmc0_0: mmc0-0 { - phandle = <0x3a>; - - mmc-pins { - drive-strength = <0x0c>; - pinmux = <0x440 0x441 0x442 0x443 0x444 0x445 0x446 0x447 0x448 0x449>; - bias-pull-up; - input-enable; - }; - - rst-pins { - input-schmitt-disable; - input-disable; - drive-strength = <0x0c>; - pinmux = <0xff13003e>; - slew-rate = <0x00>; - bias-pull-up; - }; - }; - - i2srx-0 { - phandle = <0x25>; - - clk-sd-pins { - pinmux = <0x1f000426 0x2000043f 0x21000426 0x2200043f 0x1700043d>; - input-enable; - }; - }; - - hdmi-0 { - phandle = <0x53>; - - cec-pins { - pinmux = <0x50a080e>; - bias-pull-up; - input-enable; - }; - - hpd-pins { - bias-disable; - pinmux = <0x800040f>; - input-enable; - }; - - scl-pins { - pinmux = <0x60b0c00>; - bias-pull-up; - input-enable; - }; - - sda-pins { - pinmux = <0x70c1001>; - bias-pull-up; - input-enable; - }; - }; - - pwmdac-0 { - phandle = <0x21>; - - pwmdac-pins { - input-schmitt-disable; - input-disable; - drive-strength = <0x02>; - bias-disable; - pinmux = <0xff1c0021 0xff1d0022>; - slew-rate = <0x00>; - }; - }; - - uart0-0 { - phandle = <0x16>; - - tx-pins { - input-schmitt-disable; - input-disable; - drive-strength = <0x0c>; - bias-disable; - pinmux = <0xff140005>; - slew-rate = <0x00>; - }; - - rx-pins { - drive-strength = <0x02>; - bias-disable; - pinmux = <0xe000406>; - input-schmitt-enable; - slew-rate = <0x00>; - input-enable; - }; - }; - - pcie1-0 { - phandle = <0x61>; - - clkreq-pins { - input-schmitt-disable; - drive-strength = <0x02>; - pinmux = <0xff00041d>; - bias-pull-down; - slew-rate = <0x00>; - input-enable; - }; - - wake-pins { - input-schmitt-disable; - drive-strength = <0x02>; - pinmux = <0xff000415>; - slew-rate = <0x00>; - bias-pull-up; - input-enable; - }; - }; - - i2c0-0 { - phandle = <0x17>; - - i2c-pins { - bias-disable; - pinmux = <0x9001439 0xa00183a>; - input-schmitt-enable; - input-enable; - }; - }; - - tdm-0 { - phandle = <0x1f>; - - pcmclk-pins { - pinmux = <0x23010426>; - input-enable; - }; - - sync-pins { - pinmux = <0x2501043f>; - input-enable; - }; - - tx-pins { - input-schmitt-disable; - input-disable; - drive-strength = <0x02>; - pinmux = <0xff29002c>; - slew-rate = <0x00>; - bias-pull-up; - }; - - rx-pins { - pinmux = <0x2401043d>; - input-enable; - }; - }; - - i2stx1-0 { - phandle = <0x33>; - - sd-pins { - input-disable; - bias-disable; - pinmux = <0xff45002c>; - }; - }; - - i2c6-0 { - phandle = <0x2b>; - - i2c-pins { - bias-disable; - pinmux = <0x5600b810 0x5700bc11>; - input-schmitt-enable; - input-enable; - }; - }; - - pwm-0 { - phandle = <0x34>; - - pwm-pins { - input-schmitt-disable; - input-disable; - drive-strength = <0x0c>; - bias-disable; - pinmux = <0xff18242e 0xff19283b>; - slew-rate = <0x00>; - }; - }; - - pcie0-0 { - phandle = <0x5e>; - - clkreq-pins { - input-schmitt-disable; - drive-strength = <0x02>; - pinmux = <0xff00041b>; - bias-pull-down; - slew-rate = <0x00>; - input-enable; - }; - - wake-pins { - input-schmitt-disable; - drive-strength = <0x02>; - pinmux = <0xff000420>; - slew-rate = <0x00>; - bias-pull-up; - input-enable; - }; - }; - - mclk-ext-0 { - phandle = <0x30>; - - mclk-ext-pins { - pinmux = <0x1e000404>; - input-enable; - }; - }; - }; - - crypto@16000000 { - clock-names = "hclk\0ahb"; - resets = <0x27 0x03>; - interrupts = <0x1c>; - clocks = <0x27 0x0f 0x27 0x10>; - dma-names = "tx\0rx"; - compatible = "starfive,jh7110-crypto"; - reg = <0x00 0x16000000 0x00 0x4000>; - phandle = <0x9a>; - dmas = <0x39 0x01 0x02 0x39 0x00 0x02>; - }; - - vpu_dec@130a0000 { - power-domains = <0x38 0x03>; - dma-coherent; - clock-names = "axi_clk\0bpu_clk\0vce_clk\0apb_clk\0noc_bus\0main_clk"; - resets = <0x03 0x2f 0x03 0x30 0x03 0x31 0x03 0x32 0x03 0x35>; - interrupts = <0x0d>; - clocks = <0x03 0x46 0x03 0x47 0x03 0x48 0x03 0x49 0x03 0x4c 0x03 0x4b>; - compatible = "starfive,vdec"; - status = "okay"; - reg = <0x00 0x130a0000 0x00 0x10000>; - phandle = <0x96>; - starfive,vdec_noc_ctrl; - reset-names = "rst_axi\0rst_bpu\0rst_vce\0rst_apb\0rst_sram"; - }; - - spi@12080000 { - arm,primecell-periphid = <0x41022>; - #address-cells = <0x01>; - num-cs = <0x01>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x49>; - interrupts = <0x35>; - clocks = <0x03 0x87 0x03 0x87>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "disabled"; - reg = <0x00 0x12080000 0x00 0x10000>; - phandle = <0x8e>; - }; - - pcie@9c0000000 { - pinctrl-names = "default"; - #address-cells = <0x03>; - bus-range = <0x00 0xff>; - pinctrl-0 = <0x61>; - clock-names = "noc\0tl\0axi_mst0\0apb"; - reg-names = "cfg\0apb"; - starfive,stg-syscon = <0x26>; - resets = <0x27 0x11 0x27 0x12 0x27 0x13 0x27 0x14 0x27 0x15 0x27 0x16>; - interrupts = <0x39>; - clocks = <0x03 0x60 0x27 0x0d 0x27 0x0b 0x27 0x0c>; - interrupt-map = <0x00 0x00 0x00 0x01 0x5f 0x01 0x00 0x00 0x00 0x02 0x5f 0x02 0x00 0x00 0x00 0x03 0x5f 0x03 0x00 0x00 0x00 0x04 0x5f 0x04>; - #size-cells = <0x02>; - perst-gpios = <0x1a 0x1c 0x01>; - msi-controller; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - compatible = "starfive,jh7110-pcie"; - ranges = <0x82000000 0x00 0x38000000 0x00 0x38000000 0x00 0x8000000 0xc3000000 0x09 0x80000000 0x09 0x80000000 0x00 0x40000000>; - #interrupt-cells = <0x01>; - status = "okay"; - phys = <0x60>; - reg = <0x09 0xc0000000 0x00 0x1000000 0x00 0x2c000000 0x00 0x100000>; - linux,pci-domain = <0x01>; - phandle = <0xaa>; - reset-names = "mst0\0slv0\0slv\0brg\0core\0apb"; - - interrupt-controller { - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - phandle = <0x5f>; - interrupt-controller; - }; - }; - - &mmc0: mmc@16010000 { - compatible = "starfive,jh7110-mmc"; - reg = <0x00 0x16010000 0x00 0x10000>; - phandle = <0x9c>; - - clock-names = "biu", "ciu"; - clocks = <&syscrg 0x5b>, <&syscrg 0x5d>; - - assigned-clocks = <&syscrg 0x5d>; - assigned-clock-rates = <0x2faf080>; // 50MHz - - reset-names = "reset"; - resets = <&syscrg 0x40>; - - interrupts = <0x4a>; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc0_0>; - - fifo-depth = <0x20>; - data-addr = <0x00>; - vqmmc-supply = <0x3c>; - mmc-hs200-1_8v; - bus-width = <0x08>; - non-removable; - vmmc-supply = <0x3b>; - cap-mmc-hw-reset; - mmc-ddr-1_8v; - post-power-on-delay-ms = <0xc8>; - status = "okay"; - fifo-watermark-aligned; - max-frequency = <0x5f5e100>; // 100MHz - cap-mmc-highspeed; - starfive,sysreg = <0x22 0x14 0x1a 0x7c000000>; - }; - - &aoncrg: clock-controller@17000000 { - #reset-cells = <0x01>; - clock-names = - "osc", - "gmac0_rmii_refin", - "gmac0_rgmii_rxin", - "stg_axiahb", - "apb_bus", - "gmac0_gtxclk", - "rtc_osc"; - clocks = <0x29 0x43 0x44 0x03 0x08 0x03 0x0b 0x03 0x6c 0x45>; - #clock-cells = <0x01>; - compatible = "starfive,jh7110-aoncrg"; - reg = <0x00 0x17000000 0x00 0x10000>; - phandle = <0x3e>; - }; - - serial@12010000 { - reg-io-width = <0x04>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x03 0x5b 0x03 0x5c>; - interrupts = <0x2e>; - clocks = <0x03 0x9a 0x03 0x99>; - compatible = "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0x12010000 0x00 0x10000>; - phandle = <0x83>; - reg-shift = <0x02>; - }; - - pcie@940000000 { - pinctrl-names = "default"; - #address-cells = <0x03>; - bus-range = <0x00 0xff>; - pinctrl-0 = <0x5e>; - clock-names = "noc\0tl\0axi_mst0\0apb"; - reg-names = "cfg\0apb"; - starfive,stg-syscon = <0x26>; - resets = <0x27 0x0b 0x27 0x0c 0x27 0x0d 0x27 0x0e 0x27 0x0f 0x27 0x10>; - interrupts = <0x38>; - clocks = <0x03 0x60 0x27 0x0a 0x27 0x08 0x27 0x09>; - interrupt-map = <0x00 0x00 0x00 0x01 0x5c 0x01 0x00 0x00 0x00 0x02 0x5c 0x02 0x00 0x00 0x00 0x03 0x5c 0x03 0x00 0x00 0x00 0x04 0x5c 0x04>; - #size-cells = <0x02>; - perst-gpios = <0x1a 0x1a 0x01>; - msi-controller; - device_type = "pci"; - interrupt-map-mask = <0x00 0x00 0x00 0x07>; - compatible = "starfive,jh7110-pcie"; - ranges = <0x82000000 0x00 0x30000000 0x00 0x30000000 0x00 0x8000000 0xc3000000 0x09 0x00 0x09 0x00 0x00 0x40000000>; - #interrupt-cells = <0x01>; - status = "okay"; - phys = <0x5d>; - reg = <0x09 0x40000000 0x00 0x1000000 0x00 0x2b000000 0x00 0x100000>; - linux,pci-domain = <0x00>; - phandle = <0xa9>; - reset-names = "mst0\0slv0\0slv\0brg\0core\0apb"; - - interrupt-controller { - #address-cells = <0x00>; - #interrupt-cells = <0x01>; - phandle = <0x5c>; - interrupt-controller; - }; - }; - - xrp@10230000 { - #address-cells = <0x01>; - dma-coherent; - clock-names = "core_clk"; - firmware-name = "hifi4_elf"; - starfive,stg-syscon = <0x26>; - resets = <0x27 0x01 0x27 0x02>; - clocks = <0x27 0x00>; - #size-cells = <0x01>; - compatible = "cdns,xrp"; - ranges = <0x40000000 0x00 0x20000000 0x40000 0x69c00000 0x00 0x69c00000 0x3000000>; - status = "disabled"; - reg = <0x00 0x10230000 0x00 0x10000 0x00 0x10240000 0x00 0x10000>; - phandle = <0x81>; - reset-names = "rst_core\0rst_axi"; - - dsp@0 { - }; - }; - - timer@2000000 { - interrupts-extended = <0x11 0x03 0x11 0x07 0x12 0x03 0x12 0x07 0x13 0x03 0x13 0x07 0x14 0x03 0x14 0x07 0x15 0x03 0x15 0x07>; - compatible = "starfive,jh7110-clint\0sifive,clint0"; - reg = <0x00 0x2000000 0x00 0x10000>; - phandle = <0x6e>; - }; - - i2c@12040000 { - #address-cells = <0x01>; - clock-names = "ref"; - resets = <0x03 0x50>; - interrupts = <0x31>; - clocks = <0x03 0x8e>; - #size-cells = <0x00>; - compatible = "snps,designware-i2c"; - status = "disabled"; - reg = <0x00 0x12040000 0x00 0x10000>; - phandle = <0x86>; - }; - - &voutcrg: clock-controller@295c0000 { - power-domains = <0x38 0x04>; - #reset-cells = <0x01>; - clock-names = "vout_src\0vout_top_ahb\0vout_top_axi\0vout_top_hdmitx0_mclk\0i2stx0_bclk\0hdmitx0_pixelclk"; - resets = <0x03 0x2b>; - clocks = <0x03 0x3a 0x03 0x3d 0x03 0x3e 0x03 0x3f 0x03 0xa5 0x4f>; - #clock-cells = <0x01>; - compatible = "starfive,jh7110-voutcrg"; - reg = <0x00 0x295c0000 0x00 0x10000>; - phandle = <0x4e>; - }; - - mipi-dphy@295e0000 { - clock-names = "dphy_txesc"; - resets = <0x4e 0x0a 0x4e 0x0b>; - clocks = <0x4e 0x0e>; - #phy-cells = <0x00>; - compatible = "starfive,jh7110-mipi-dphy-tx\0m31,mipi-dphy-tx"; - status = "okay"; - reg = <0x00 0x295e0000 0x00 0x10000>; - phandle = <0x57>; - reset-names = "dphy_sys\0dphy_txbytehs"; - }; - - spi@10070000 { - arm,primecell-periphid = <0x41022>; - #address-cells = <0x01>; - num-cs = <0x01>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x46>; - interrupts = <0x27>; - clocks = <0x03 0x84 0x03 0x84>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "disabled"; - reg = <0x00 0x10070000 0x00 0x10000>; - phandle = <0x78>; - }; - - i2srx_mst@100e0000 { - clock-names = "i2sclk\0apb\0mclk\0mclk_inner\0mclk_ext"; - resets = <0x03 0x63 0x03 0x64>; - clocks = <0x03 0xb0 0x03 0xaf 0x03 0x12 0x03 0x11 0x20>; - dma-names = "rx"; - #sound-dai-cells = <0x00>; - starfive,syscon = <0x22 0x18 0x02 0x34 0x3fc00 0x24400>; - compatible = "starfive,jh7110-i2srx-master"; - status = "disabled"; - reg = <0x00 0x100e0000 0x00 0x1000>; - phandle = <0x7d>; - dmas = <0x1e 0x18>; - }; - - can@130e0000 { - syscon,can_or_canfd = <0x00>; - clock-names = "apb_clk\0core_clk\0timer_clk"; - starfive,sys-syscon = <0x22 0x88 0x12 0x40000>; - resets = <0x03 0x72 0x03 0x73 0x03 0x74>; - interrupts = <0x71>; - clocks = <0x03 0x76 0x03 0x78 0x03 0x77>; - compatible = "starfive,jh7110-can\0ipms,can"; - status = "disabled"; - frequency = <0x2625a00>; - reg = <0x00 0x130e0000 0x00 0x1000>; - phandle = <0x99>; - reset-names = "rst_apb\0rst_core\0rst_timer"; - }; - - rtc@17040000 { - clock-names = "pclk", "cal_clk"; - clocks = <&aoncrg 0x0a>, <&aoncrg 0x0d>; - reset-names = "rst_osc", "rst_apb", "rst_cal"; - resets = <&aoncrg 0x07>, <&aoncrg 0x05>, <&aoncrg 0x06>; - interrupts = <0x0a 0x0b 0x0c>; - compatible = "starfive,jh7110-rtc"; - interrupt-names = "rtc_ms_pulse\0rtc_sec_pulse\0rtc"; - reg = <0x00 0x17040000 0x00 0x10000>; - phandle = <0xa0>; - rtc,cal-clock-freq = <0xf4240>; - }; - - &usbphy0: phy@10200000 { - clock-names = "125m", "app_125m"; - clocks = < - &syscrg 0x5f /* 125MHz */ - 0x27 0x06 - >; - #phy-cells = <0x00>; - compatible = "starfive,jh7110-usb-phy"; - reg = <0x00 0x10200000 0x00 0x10000>; - phandle = <0x28>; - }; - - spi@12090000 { - arm,primecell-periphid = <0x41022>; - #address-cells = <0x01>; - num-cs = <0x01>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x4a>; - interrupts = <0x36>; - clocks = <0x03 0x88 0x03 0x88>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "disabled"; - reg = <0x00 0x12090000 0x00 0x10000>; - phandle = <0x8f>; - }; - - serial@10000000 { - reg-io-width = <0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x16>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x03 0x53 0x03 0x54>; - interrupts = <0x20>; - clocks = <0x03 0x92 0x03 0x91>; - compatible = "snps,dw-apb-uart"; - status = "okay"; - reg = <0x00 0x10000000 0x00 0x10000>; - phandle = <0x6f>; - reg-shift = <0x02>; - }; - - vpu_enc@130b0000 { - power-domains = <0x38 0x06>; - dma-coherent; - clock-names = "axi_clk\0bpu_clk\0vce_clk\0apb_clk\0noc_bus"; - resets = <0x03 0x36 0x03 0x37 0x03 0x38 0x03 0x39 0x03 0x3a>; - interrupts = <0x0f>; - clocks = <0x03 0x4e 0x03 0x4f 0x03 0x50 0x03 0x51 0x03 0x52>; - compatible = "starfive,venc"; - status = "okay"; - reg = <0x00 0x130b0000 0x00 0x10000>; - phandle = <0x97>; - starfive,venc_noc_ctrl; - reset-names = "rst_axi\0rst_bpu\0rst_vce\0rst_apb\0rst_sram"; - }; - - i2c@10030000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - i2c-sda-hold-time-ns = <0x12c>; - pinctrl-0 = <0x17>; - clock-names = "ref"; - i2c-scl-falling-time-ns = <0x1fe>; - i2c-sda-falling-time-ns = <0x1fe>; - resets = <0x03 0x4c>; - interrupts = <0x23>; - clocks = <0x03 0x8a>; - #size-cells = <0x00>; - clock-frequency = <0x186a0>; - compatible = "snps,designware-i2c"; - status = "okay"; - reg = <0x00 0x10030000 0x00 0x10000>; - phandle = <0x72>; - }; - - &mmc1: mmc@16020000 { - compatible = "starfive,jh7110-mmc"; - phandle = <0x9d>; - reg = <0x00 0x16020000 0x00 0x10000>; - - clock-names = "biu", "ciu"; - clocks = <&syscrg 0x5c>, <&syscrg 0x5e>; - - assigned-clock-rates = <0x2faf080>; // 50MHz - assigned-clocks = <&syscrg 0x5e>; - - resets = <&syscrg 0x41>; - - reset-names = "reset"; - interrupts = <0x4b>; - - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc1_0>; - - fifo-depth = <0x20>; - data-addr = <0x00>; - cap-sd-highspeed; - no-mmc; - bus-width = <0x04>; - no-sdio; - broken-cd; - post-power-on-delay-ms = <0xc8>; - status = "okay"; - fifo-watermark-aligned; - max-frequency = <0x5f5e100>; // 100MHz - starfive,sysreg = <0x22 0x9c 0x01 0x3e>; - }; - - interrupt-controller@c000000 { - #address-cells = <0x00>; - interrupts-extended = <0x11 0x0b 0x12 0x0b 0x12 0x09 0x13 0x0b 0x13 0x09 0x14 0x0b 0x14 0x09 0x15 0x0b 0x15 0x09>; - compatible = "starfive,jh7110-plic\0sifive,plic-1.0.0"; - #interrupt-cells = <0x01>; - reg = <0x00 0xc000000 0x00 0x4000000>; - phandle = <0x10>; - riscv,ndev = <0x88>; - interrupt-controller; - }; - - phy@19820000 { - power-domains = <0x40 0x01>; - clock-names = "cfg\0ref\0tx"; - resets = <0x46 0x02 0x46 0x03>; - clocks = <0x46 0x03 0x46 0x04 0x46 0x05>; - #phy-cells = <0x00>; - compatible = "starfive,jh7110-dphy-rx"; - reg = <0x00 0x19820000 0x00 0x10000>; - phandle = <0x47>; - }; - - serial@12020000 { - reg-io-width = <0x04>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x03 0x5d 0x03 0x5e>; - interrupts = <0x2f>; - clocks = <0x03 0x9c 0x03 0x9b>; - compatible = "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0x12020000 0x00 0x10000>; - phandle = <0x84>; - reg-shift = <0x02>; - }; - - dssctrl@295B0000 { - compatible = "starfive,jh7110-dssctrl\0verisilicon,dss-ctrl\0syscon"; - reg = <0x00 0x295b0000 0x00 0x90>; - phandle = <0x4d>; - }; - - mipi@295d0000 { - phy-names = "dphy"; - clock-names = "dpi\0apb\0txesc\0sys"; - reg-names = "dsi"; - resets = <0x4e 0x03 0x4e 0x04 0x4e 0x05 0x4e 0x06 0x4e 0x07 0x4e 0x08>; - interrupts = <0x62>; - clocks = <0x4e 0x0b 0x4e 0x0a 0x4e 0x0d 0x4e 0x0c>; - compatible = "starfive,jh7110-mipi_dsi\0cdns,dsi"; - status = "okay"; - phys = <0x57>; - reg = <0x00 0x295d0000 0x00 0x10000>; - phandle = <0xa7>; - reset-names = "dsi_dpi\0dsi_apb\0dsi_rxesc\0dsi_sys\0dsi_txbytehs\0dsi_txesc"; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - #address-cells = <0x01>; - #size-cells = <0x00>; - reg = <0x00>; - - endpoint@1 { - remote-endpoint = <0x59>; - reg = <0x01>; - phandle = <0x1b>; - }; - - endpoint@0 { - remote-endpoint = <0x58>; - reg = <0x00>; - phandle = <0x19>; - }; - }; - - port@1 { - reg = <0x01>; - - endpoint { - remote-endpoint = <0x5a>; - phandle = <0x0c>; - }; - }; - }; - }; - - temperature-sensor@120e0000 { - clock-names = "sense\0bus"; - resets = <0x03 0x7c 0x03 0x7b>; - clocks = <0x03 0x82 0x03 0x81>; - #thermal-sensor-cells = <0x00>; - compatible = "starfive,jh7110-temp"; - reg = <0x00 0x120e0000 0x00 0x10000>; - phandle = <0x0e>; - reset-names = "sense\0bus"; - }; - - i2c@12050000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - i2c-sda-hold-time-ns = <0x12c>; - pinctrl-0 = <0x2a>; - clock-names = "ref"; - i2c-scl-falling-time-ns = <0x1fe>; - i2c-sda-falling-time-ns = <0x1fe>; - resets = <0x03 0x51>; - interrupts = <0x32>; - clocks = <0x03 0x8f>; - #size-cells = <0x00>; - clock-frequency = <0x186a0>; - compatible = "snps,designware-i2c"; - status = "okay"; - reg = <0x00 0x12050000 0x00 0x10000>; - phandle = <0x87>; - - pmic@36 { - interrupts = <0x00>; - compatible = "x-powers,axp15060"; - #interrupt-cells = <0x01>; - reg = <0x36>; - phandle = <0x88>; - interrupt-controller; - - regulators { - - ALDO5 { - regulator-max-microvolt = <0xdbba0>; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-name = "hdmi_0p9"; - phandle = <0x54>; - regulator-compatible = "aldo5"; - }; - - dcdc1 { - regulator-max-microvolt = <0x325aa0>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x325aa0>; - regulator-name = "vcc_3v3"; - phandle = <0x3b>; - regulator-compatible = "dcdc1"; - }; - - ALDO3 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "hdmi_1p8"; - phandle = <0x55>; - regulator-compatible = "aldo3"; - }; - - ALDO1 { - regulator-max-microvolt = <0xdbba0>; - regulator-boot-on; - regulator-min-microvolt = <0xdbba0>; - regulator-name = "mipi_0p9"; - phandle = <0x48>; - regulator-compatible = "aldo1"; - }; - - aldo4 { - regulator-max-microvolt = <0x1b7740>; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <0x1b7740>; - regulator-name = "emmc_vdd"; - phandle = <0x3c>; - regulator-compatible = "aldo4"; - }; - - dcdc2 { - regulator-max-microvolt = <0x177fa0>; - regulator-always-on; - regulator-min-microvolt = <0x7a120>; - regulator-name = "vdd-cpu"; - phandle = <0x04>; - regulator-compatible = "dcdc2"; - }; - }; - }; - }; - - ð0: ethernet@16030000 { - snps,multicast-filter-bins = <0x40>; - phy-mode = "rgmii-id"; - snps,txpbl = <0x10>; - clocks = - <&aoncrg CLK_GMAC5_AXI>, // smmaceth - <&aoncrg CLK_GMAC5_AHB>, // pclk - <&syscrg CLK_GMAC0_PTP>, // ptp_ref - <&aoncrg CLK_GMAC5_AXI64_TX_INV>, // tx - <&syscrg CLK_GMAC0_GTXC>; // gtx - clock-names = - "stmmaceth", - "pclk", - "ptp_ref", - "tx", - "gtx"; - assigned-clocks = <0x3e 0x05>; - assigned-clock-parents = <0x3e 0x04>; - snps,en-tx-lpi-clockgating; - local-mac-address = [6c cf 39 00 b1 0c]; - snps,fixed-burst; - resets = <0x3e 0x00 0x3e 0x01>; - interrupts = <0x07 0x06 0x05>; - snps,no-pbl-x8; - snps,tso; - starfive,syscon = <0x40 0x0c 0x12>; - snps,rxpbl = <0x10>; - compatible = "starfive,jh7110-dwmac\0snps,dwmac-5.20"; - status = "okay"; - tx-fifo-depth = <0x800>; - interrupt-names = "macirq\0eth_wake_irq\0eth_lpi"; - snps,force_thresh_dma_mode; - rx-fifo-depth = <0x800>; - reg = <0x00 0x16030000 0x00 0x10000>; - phandle = <0x9e>; - phy-handle = <0x41>; - reset-names = "stmmaceth\0ahb"; - snps,axi-config = <0x3f>; - starfive,tx-use-rgmii-clk; - snps,perfect-filter-entries = <0x100>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - - ethernet-phy@0 { - rx-internal-delay-ps = <0x5dc>; - motorcomm,rx-clk-drv-microamp = <0xf82>; - motorcomm,rx-data-drv-microamp = <0xb5e>; - motorcomm,tx-clk-100-inverted; - reg = <0x00>; - motorcomm,tx-clk-1000-inverted; - phandle = <0x41>; - tx-internal-delay-ps = <0x5dc>; - motorcomm,tx-clk-adj-enabled; - }; - }; - }; - - syscon@17010000 { - #power-domain-cells = <0x01>; - compatible = "starfive,jh7110-aon-syscon\0syscon"; - reg = <0x00 0x17010000 0x00 0x1000>; - phandle = <0x40>; - }; - - tdm@10090000 { - pinctrl-names = "default"; - pinctrl-0 = <0x1f>; - clock-names = "tdm_ahb\0tdm_apb\0tdm_internal\0tdm\0mclk_inner\0tdm_ext"; - resets = <0x03 0x69 0x03 0x6b 0x03 0x6a>; - clocks = <0x03 0xb8 0x03 0xb9 0x03 0xba 0x03 0xbb 0x03 0x11 0x1d>; - dma-names = "rx\0tx"; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-tdm"; - status = "disabled"; - reg = <0x00 0x10090000 0x00 0x1000>; - phandle = <0x7a>; - dmas = <0x1e 0x14 0x1e 0x15>; - }; - - power-controller@17030000 { - interrupts = <0x6f>; - #power-domain-cells = <0x01>; - compatible = "starfive,jh7110-pmu"; - reg = <0x00 0x17030000 0x00 0x10000>; - phandle = <0x38>; - }; - - i2s@120b0000 { - pinctrl-names = "default"; - pinctrl-0 = <0x30>; - clock-names = "i2sclk\0apb\0mclk\0mclk_inner\0mclk_ext"; - resets = <0x03 0x65 0x03 0x66>; - clocks = <0x03 0xa2 0x03 0xa1 0x03 0x12 0x03 0x11 0x20>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-i2stx0"; - status = "okay"; - reg = <0x00 0x120b0000 0x00 0x1000>; - phandle = <0x67>; - dmas = <0x1e 0x2f>; - }; - - spi@10080000 { - arm,primecell-periphid = <0x41022>; - #address-cells = <0x01>; - num-cs = <0x01>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x47>; - interrupts = <0x28>; - clocks = <0x03 0x85 0x03 0x85>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "disabled"; - reg = <0x00 0x10080000 0x00 0x10000>; - phandle = <0x79>; - }; - - rng@1600c000 { - clock-names = "hclk\0ahb"; - resets = <0x27 0x03>; - interrupts = <0x1e>; - clocks = <0x27 0x0f 0x27 0x10>; - compatible = "starfive,jh7110-trng"; - reg = <0x00 0x1600c000 0x00 0x4000>; - phandle = <0x9b>; - }; - - spi@13010000 { - #address-cells = <0x01>; - clock-names = "ref\0ahb\0apb"; - resets = <0x03 0x3e 0x03 0x3d 0x03 0x3f>; - interrupts = <0x19>; - clocks = <0x03 0x5a 0x03 0x57 0x03 0x58>; - cdns,fifo-width = <0x04>; - #size-cells = <0x00>; - cdns,trigger-address = <0x00>; - compatible = "starfive,jh7110-qspi\0cdns,qspi-nor"; - status = "okay"; - reg = <0x00 0x13010000 0x00 0x10000 0x00 0x21000000 0x00 0x400000>; - phandle = <0x93>; - reset-names = "qspi\0qspi-ocp\0rstc_ref"; - cdns,fifo-depth = <0x100>; - - flash@0 { - cdns,tshsl-ns = <0x01>; - spi-max-frequency = <0xb71b00>; - cdns,tsd2d-ns = <0x01>; - cdns,read-delay = <0x05>; - cdns,tslch-ns = <0x01>; - compatible = "jedec,spi-nor"; - reg = <0x00>; - phandle = <0x94>; - cdns,tchsh-ns = <0x01>; - - partitions { - #address-cells = <0x01>; - #size-cells = <0x01>; - compatible = "fixed-partitions"; - - reserved-data@600000 { - reg = <0x600000 0xa00000>; - }; - - uboot-env@f0000 { - reg = <0xf0000 0x10000>; - }; - - spl@0 { - reg = <0x00 0x80000>; - }; - - uboot@100000 { - reg = <0x100000 0x400000>; - }; - }; - }; - }; - - &syscrg: clock-controller@13020000 { - #reset-cells = <0x01>; - clock-names = - "osc", - "gmac1_rmii_refin", - "gmac1_rgmii_rxin", - "i2stx_bclk_ext", - "i2stx_lrck_ext", - "i2srx_bclk_ext", - "i2srx_lrck_ext", - "tdm_ext", - "mclk_ext", - "pll0_out", - "pll1_out", - "pll2_out"; - clocks = < - 0x29 - 0x35 - 0x36 - 0x31 - 0x32 - 0x23 - 0x24 - 0x1d - 0x20 - 0x37 0x00 - 0x37 0x01 - 0x37 0x02 - >; - #clock-cells = <0x01>; - compatible = "starfive,jh7110-syscrg"; - reg = <0x00 0x13020000 0x00 0x10000>; - phandle = <0x03>; - }; - - cache-controller@2010000 { - cache-size = <0x200000>; - cache-level = <0x02>; - cache-sets = <0x800>; - interrupts = <0x01 0x03 0x04 0x02>; - cache-unified; - compatible = "starfive,jh7110-ccache\0sifive,ccache0\0cache"; - reg = <0x00 0x2010000 0x00 0x4000 0x00 0x8000000 0x00 0x2000000 0x00 0xa000000 0x00 0x2000000>; - phandle = <0x01>; - cache-block-size = <0x40>; - }; - - phy@10210000 { - #phy-cells = <0x00>; - compatible = "starfive,jh7110-pcie-phy"; - reg = <0x00 0x10210000 0x00 0x10000>; - phandle = <0x5d>; - }; - - serial@10010000 { - reg-io-width = <0x04>; - clock-names = "baudclk\0apb_pclk"; - resets = <0x03 0x55 0x03 0x56>; - interrupts = <0x21>; - clocks = <0x03 0x94 0x03 0x93>; - compatible = "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x00 0x10010000 0x00 0x10000>; - phandle = <0x70>; - reg-shift = <0x02>; - }; - - pinctrl@17020000 { - gpio-controller; - resets = <0x3e 0x02>; - interrupts = <0x55>; - compatible = "starfive,jh7110-aon-pinctrl"; - #interrupt-cells = <0x02>; - reg = <0x00 0x17020000 0x00 0x10000>; - phandle = <0x62>; - #gpio-cells = <0x02>; - interrupt-controller; - }; - - i2c@10040000 { - #address-cells = <0x01>; - clock-names = "ref"; - resets = <0x03 0x4d>; - interrupts = <0x24>; - clocks = <0x03 0x8b>; - #size-cells = <0x00>; - compatible = "snps,designware-i2c"; - status = "disabled"; - reg = <0x00 0x10040000 0x00 0x10000>; - phandle = <0x73>; - }; - - &stgcrg: clock-controller@10230000 { - #reset-cells = <0x01>; - clock-names = - "osc", - "hifi4_core", - "stg_axiahb", - "usb_125m", - "cpu_bus", - "hifi4_axi", - "nocstg_bus", - "apb_bus"; - clocks = < - &clk_osc - &syscrg 0x36 - &syscrg 0x08 - &syscrg 0x5f - &syscrg 0x02 - &syscrg 0x37 - &syscrg 0x06 - &syscrg 0x0b - >; - #clock-cells = <0x01>; - compatible = "starfive,jh7110-stgcrg"; - reg = <0x00 0x10230000 0x00 0x10000>; - phandle = <0x27>; - }; - - mailbox@13060000 { - clock-names = "clk_apb"; - resets = <0x03 0x44>; - interrupts = <0x1a 0x1b>; - clocks = <0x03 0x71>; - #mbox-cells = <0x02>; - compatible = "starfive,mail_box"; - status = "okay"; - reg = <0x00 0x13060000 0x00 0x1000>; - phandle = <0x0d>; - reset-names = "mbx_rre"; - }; - - clock-controller@19810000 { - power-domains = <0x38 0x05>; - #reset-cells = <0x01>; - clock-names = "isp_top_core\0isp_top_axi\0noc_bus_isp_axi\0dvp_clk"; - resets = <0x03 0x29 0x03 0x2a 0x03 0x1c>; - clocks = <0x03 0x33 0x03 0x34 0x03 0x35 0x4c>; - #clock-cells = <0x01>; - compatible = "starfive,jh7110-ispcrg"; - reg = <0x00 0x19810000 0x00 0x10000>; - phandle = <0x46>; - }; - - i2c@12060000 { - pinctrl-names = "default"; - #address-cells = <0x01>; - i2c-sda-hold-time-ns = <0x12c>; - pinctrl-0 = <0x2b>; - clock-names = "ref"; - i2c-scl-falling-time-ns = <0x1fe>; - i2c-sda-falling-time-ns = <0x1fe>; - resets = <0x03 0x52>; - interrupts = <0x33>; - clocks = <0x03 0x90>; - #size-cells = <0x00>; - clock-frequency = <0x186a0>; - compatible = "snps,designware-i2c"; - status = "okay"; - reg = <0x00 0x12060000 0x00 0x10000>; - phandle = <0x89>; - - ov4689@36 { - clock-names = "xclk"; - clocks = <0x2c>; - rotation = <0xb4>; - compatible = "ovti,ov4689"; - reg = <0x36>; - phandle = <0x8c>; - - port { - - endpoint { - data-lanes = <0x01 0x02>; - clock-lanes = <0x00>; - remote-endpoint = <0x2f>; - bus-type = <0x04>; - phandle = <0x4b>; - }; - }; - }; - - imx708@1a { - clocks = <0x2c>; - reset-gpio = <0x1a 0x12 0x00>; - compatible = "sony,imx708"; - reg = <0x1a>; - phandle = <0x8b>; - - port { - - endpoint { - data-lanes = <0x01 0x02>; - clock-noncontinuous; - remote-endpoint = <0x2e>; - phandle = <0x4a>; - link-frequencies = <0x00 0x1ad27480>; - }; - }; - }; - - imx219@10 { - clock-names = "xclk"; - clocks = <0x2c>; - rotation = <0x00>; - reset-gpio = <0x1a 0x12 0x00>; - compatible = "sony,imx219"; - orientation = <0x01>; - reg = <0x10>; - phandle = <0x8a>; - - port { - - endpoint { - data-lanes = <0x00 0x01>; - clock-lanes = <0x04>; - remote-endpoint = <0x2d>; - bus-type = <0x04>; - lane-polarities = <0x00 0x00 0x00>; - phandle = <0x49>; - link-frequencies = <0x00 0x1b2e0200>; - }; - }; - }; - }; - - ethernet@16040000 { - snps,multicast-filter-bins = <0x40>; - phy-mode = "rgmii-id"; - snps,txpbl = <0x10>; - clock-names = "stmmaceth\0pclk\0ptp_ref\0tx\0gtx"; - assigned-clocks = <0x03 0x69>; - assigned-clock-parents = <0x03 0x65>; - snps,en-tx-lpi-clockgating; - local-mac-address = [6c cf 39 00 b1 0d]; - snps,fixed-burst; - resets = <0x03 0x42 0x03 0x43>; - interrupts = <0x4e 0x4d 0x4c>; - clocks = <0x03 0x62 0x03 0x61 0x03 0x66 0x03 0x6a 0x03 0x6b>; - snps,no-pbl-x8; - snps,tso; - starfive,syscon = <0x22 0x90 0x02>; - snps,rxpbl = <0x10>; - compatible = "starfive,jh7110-dwmac\0snps,dwmac-5.20"; - status = "okay"; - tx-fifo-depth = <0x800>; - interrupt-names = "macirq\0eth_wake_irq\0eth_lpi"; - snps,force_thresh_dma_mode; - rx-fifo-depth = <0x800>; - reg = <0x00 0x16040000 0x00 0x10000>; - phandle = <0x9f>; - phy-handle = <0x42>; - reset-names = "stmmaceth\0ahb"; - snps,axi-config = <0x3f>; - starfive,tx-use-rgmii-clk; - snps,perfect-filter-entries = <0x100>; - - mdio { - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "snps,dwmac-mdio"; - - ethernet-phy@1 { - rx-internal-delay-ps = <0x12c>; - motorcomm,rx-clk-drv-microamp = <0xf82>; - motorcomm,rx-data-drv-microamp = <0xb5e>; - motorcomm,tx-clk-100-inverted; - reg = <0x00>; - phandle = <0x42>; - tx-internal-delay-ps = <0x00>; - motorcomm,tx-clk-adj-enabled; - }; - }; - }; - - spi@120a0000 { - arm,primecell-periphid = <0x41022>; - #address-cells = <0x01>; - num-cs = <0x01>; - clock-names = "sspclk\0apb_pclk"; - resets = <0x03 0x4b>; - interrupts = <0x37>; - clocks = <0x03 0x89 0x03 0x89>; - #size-cells = <0x00>; - compatible = "arm,pl022\0arm,primecell"; - status = "disabled"; - reg = <0x00 0x120a0000 0x00 0x10000>; - phandle = <0x90>; - }; - - i2s@100e0000 { - pinctrl-names = "default"; - pinctrl-0 = <0x25>; - clock-names = "i2sclk\0apb\0mclk\0mclk_inner\0mclk_ext\0bclk\0lrck\0bclk_ext\0lrck_ext"; - resets = <0x03 0x63 0x03 0x64>; - clocks = <0x03 0xb0 0x03 0xaf 0x03 0x12 0x03 0x11 0x20 0x03 0xb3 0x03 0xb5 0x23 0x24>; - dma-names = "tx\0rx"; - #sound-dai-cells = <0x00>; - starfive,syscon = <0x22 0x18 0x02>; - compatible = "starfive,jh7110-i2srx"; - status = "disabled"; - reg = <0x00 0x100e0000 0x00 0x1000>; - phandle = <0x7e>; - dmas = <0x00 0x1e 0x18>; - }; - - watchdog@13070000 { - clock-names = "apb\0core"; - resets = <0x03 0x6d 0x03 0x6e>; - clocks = <0x03 0x7a 0x03 0x7b>; - compatible = "starfive,jh7110-wdt"; - reg = <0x00 0x13070000 0x00 0x10000>; - }; - - gpu@18000000 { - power-domains = <0x38 0x02>; - clock-names = "clk_bv\0clk_apb\0clk_rtc\0clk_core\0clk_sys\0clk_axi"; - current-clock = <0x7a1200>; - resets = <0x03 0x15 0x03 0x16>; - interrupts = <0x52>; - clocks = <0x03 0x2d 0x03 0x30 0x03 0x31 0x03 0x2e 0x03 0x2f 0x03 0x32>; - compatible = "img-gpu"; - status = "okay"; - reg = <0x00 0x18000000 0x00 0x100000 0x00 0x130c000 0x00 0x10000>; - phandle = <0xa1>; - reset-names = "rst_apb\0rst_doma"; - }; - - i2s@120c0000 { - pinctrl-names = "default"; - pinctrl-0 = <0x33>; - clock-names = "i2sclk\0apb\0mclk\0mclk_inner\0mclk_ext\0bclk\0lrck\0bclk_ext\0lrck_ext"; - resets = <0x03 0x67 0x03 0x68>; - clocks = <0x03 0xa9 0x03 0xa8 0x03 0x12 0x03 0x11 0x20 0x03 0xac 0x03 0xae 0x31 0x32>; - dma-names = "tx"; - #sound-dai-cells = <0x00>; - compatible = "starfive,jh7110-i2stx1"; - status = "disabled"; - reg = <0x00 0x120c0000 0x00 0x1000>; - phandle = <0x91>; - dmas = <0x1e 0x30>; - }; - - usb@10100000 { - #address-cells = <0x01>; - #size-cells = <0x01>; - - starfive,stg-syscon = <0x26 0x04>; - reset-names = "pwrup", "apb", "axi", "utmi_apb"; - resets = < - 0x27 0x0a /* PWRUP */ - 0x27 0x08 /* APB */ - 0x27 0x07 /* AXI */ - 0x27 0x09 /* UTMI APB */ - >; - clock-names = "lpm", "stb", "apb", "axi", "utmi_apb"; - clocks = < - 0x27 0x04 /* LPM */ - 0x27 0x05 /* STB */ - 0x27 0x01 /* APB */ - 0x27 0x03 /* AXI */ - 0x27 0x02 /* UTMI APB */ - >; - compatible = "starfive,jh7110-usb"; - ranges = <0x00 0x00 0x10100000 0x100000>; - status = "okay"; - phandle = <0x7f>; - dr_mode = "peripheral"; - - usb@0 { - phy-names = "cdns3,usb2-phy"; - reg-names = "otg", "xhci", "dev"; - reg = < - 0x00000000 0x00010000 /* OTG */ - 0x00010000 0x00010000 /* XHCI */ - 0x00020000 0x00010000 /* DEV */ - >; - interrupt-names = "host", "peripheral", "otg"; - interrupts = < - 0x64 /* HOST */ - 0x6c /* PERIPHERAL */ - 0x6e /* OTG */ - >; - compatible = "cdns,usb3"; - phys = <&usbphy0>; - phandle = <0x80>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-ack { - linux,default-trigger = "heartbeat"; - function = "heartbeat"; - color = <0x02>; - label = "ack"; - gpios = <0x62 0x03 0x00>; - }; - }; - - snd-card1 { - simple-audio-card,name = "Starfive-HDMI-Sound-Card"; - #address-cells = <0x01>; - #size-cells = <0x00>; - compatible = "simple-audio-card"; - phandle = <0xad>; - - simple-audio-card,dai-link@0 { - mclk-fs = <0x100>; - format = "i2s"; - frame-master = <0x66>; - status = "okay"; - bitclock-master = <0x66>; - reg = <0x00>; - - cpu { - phandle = <0x66>; - sound-dai = <0x67>; - }; - - codec { - sound-dai = <0x68>; - }; - }; - }; - - dvp-clock { - clock-output-names = "dvp_clk"; - #clock-cells = <0x00>; - clock-frequency = <0x46cf710>; - compatible = "fixed-clock"; - phandle = <0x4c>; - }; - - i2srx-lrck-ext-clock { - clock-output-names = "i2srx_lrck_ext"; - #clock-cells = <0x00>; - clock-frequency = <0x2ee00>; - compatible = "fixed-clock"; - phandle = <0x24>; - }; - - gpio-restart { - priority = <0xe0>; - compatible = "gpio-restart"; - gpios = <0x1a 0x23 0x00>; - }; - - pwmdac-codec { - #sound-dai-cells = <0x00>; - compatible = "linux,spdif-dit"; - phandle = <0x65>; - }; - - tdm-ext-clock { - clock-output-names = "tdm_ext"; - #clock-cells = <0x00>; - clock-frequency = <0x2ee0000>; - compatible = "fixed-clock"; - phandle = <0x1d>; - }; - - mclk-ext-clock { - clock-output-names = "mclk_ext"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - compatible = "fixed-clock"; - phandle = <0x20>; - }; - - tda988x_pin { - compatible = "starfive,tda998x_rgb_pin"; - status = "disabled"; - phandle = <0x6d>; - }; - - opp-table-0 { - opp-shared; - compatible = "operating-points-v2"; - phandle = <0x02>; - - opp-500000000 { - opp-microvolt = <0xdbba0>; - opp-hz = <0x00 0x1dcd6500>; - }; - - opp-750000000 { - opp-microvolt = <0xdbba0>; - opp-hz = <0x00 0x2cb41780>; - opp-suspend; - }; - - opp-1500000000 { - opp-microvolt = <0x102ca0>; - opp-hz = <0x00 0x59682f00>; - }; - - opp-375000000 { - opp-microvolt = <0xdbba0>; - opp-hz = <0x00 0x165a0bc0>; - }; - }; - - mailbox_client { - compatible = "starfive,mailbox-test"; - status = "okay"; - phandle = <0x6b>; - mboxes = <0x0d 0x00 0x01 0x0d 0x01 0x00>; - mbox-names = "rx\0tx"; - }; - - &hdmitx0_pixelclk: hdmitx0-pixel-clock { - clock-output-names = "hdmitx0_pixelclk"; - #clock-cells = <0x00>; - clock-frequency = <0x11b3dc40>; /* 297MHz */ - compatible = "fixed-clock"; - phandle = <0x4f>; - }; - - aliases { - i2c3 = "/soc/i2c@12030000"; - ethernet0 = "/soc/ethernet@16030000"; - i2c1 = "/soc/i2c@10040000"; - mmc1 = "/soc/mmc@16020000"; - serial3 = "/soc/serial@12000000"; - i2c6 = "/soc/i2c@12060000"; - pcie0 = "/soc/pcie@940000000"; - i2c4 = "/soc/i2c@12040000"; - ethernet1 = "/soc/ethernet@16040000"; - i2c2 = "/soc/i2c@10050000"; - i2c0 = "/soc/i2c@10030000"; - mmc0 = "/soc/mmc@16010000"; - pcie1 = "/soc/pcie@9c0000000"; - i2c5 = "/soc/i2c@12050000"; - serial0 = "/soc/serial@10000000"; - }; - - i2stx-bclk-ext-clock { - clock-output-names = "i2stx_bclk_ext"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - compatible = "fixed-clock"; - phandle = <0x31>; - }; - - ac108_mclk { - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0xae>; - }; - - clk-ext-camera { - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - compatible = "fixed-clock"; - phandle = <0x2c>; - }; - - gmac0-rmii-refin-clock { - clock-output-names = "gmac0_rmii_refin"; - #clock-cells = <0x00>; - clock-frequency = <0x2faf080>; - compatible = "fixed-clock"; - phandle = <0x43>; - }; - - chosen { - linux,initrd-end = <0x00 0x46eb356a>; - bootargs = "root=/dev/mmcblk1p4 rw console=tty0 console=ttyS0,115200 earlycon rootwait stmmaceth=chain_mode:1 selinux=0"; - boot-hartid = <0x01>; - linux,initrd-start = <0x00 0x46100000>; - stdout-path = "serial0:115200n8"; - }; - - wm8960_mclk { - #clock-cells = <0x00>; - clock-frequency = <0x1770000>; - compatible = "fixed-clock"; - phandle = <0xaf>; - }; - - gmac0-rgmii-rxin-clock { - clock-output-names = "gmac0_rgmii_rxin"; - #clock-cells = <0x00>; - clock-frequency = <0x7735940>; - compatible = "fixed-clock"; - phandle = <0x44>; - }; - - cpus { - #address-cells = <0x01>; - #size-cells = <0x00>; - timebase-frequency = "\0=\t"; - - cpu@1 { - i-tlb-sets = <0x01>; - clock-names = "cpu"; - cpu-supply = <0x04>; - clocks = <0x03 0x01>; - d-cache-block-size = <0x40>; - device_type = "cpu"; - compatible = "sifive,u74-mc\0riscv"; - mmu-type = "riscv,sv39"; - d-cache-size = <0x8000>; - next-level-cache = <0x01>; - i-cache-size = <0x8000>; - reg = <0x01>; - phandle = <0x06>; - d-cache-sets = <0x40>; - i-cache-block-size = <0x40>; - operating-points-v2 = <0x02>; - i-cache-sets = <0x40>; - d-tlb-size = <0x28>; - riscv,isa = "rv64imafdc_zba_zbb"; - tlb-split; - i-tlb-size = <0x28>; - d-tlb-sets = <0x01>; - #cooling-cells = <0x02>; - - interrupt-controller { - compatible = "riscv,cpu-intc"; - #interrupt-cells = <0x01>; - phandle = <0x12>; - interrupt-controller; - }; - }; - - cpu@4 { - i-tlb-sets = <0x01>; - clock-names = "cpu"; - cpu-supply = <0x04>; - clocks = <0x03 0x01>; - d-cache-block-size = <0x40>; - device_type = "cpu"; - compatible = "sifive,u74-mc\0riscv"; - mmu-type = "riscv,sv39"; - d-cache-size = <0x8000>; - next-level-cache = <0x01>; - i-cache-size = <0x8000>; - reg = <0x04>; - phandle = <0x09>; - d-cache-sets = <0x40>; - i-cache-block-size = <0x40>; - operating-points-v2 = <0x02>; - i-cache-sets = <0x40>; - d-tlb-size = <0x28>; - riscv,isa = "rv64imafdc_zba_zbb"; - tlb-split; - i-tlb-size = <0x28>; - d-tlb-sets = <0x01>; - #cooling-cells = <0x02>; - - interrupt-controller { - compatible = "riscv,cpu-intc"; - #interrupt-cells = <0x01>; - phandle = <0x15>; - interrupt-controller; - }; - }; - - cpu-map { - - cluster0 { - - core3 { - cpu = <0x08>; - }; - - core1 { - cpu = <0x06>; - }; - - core4 { - cpu = <0x09>; - }; - - core2 { - cpu = <0x07>; - }; - - core0 { - cpu = <0x05>; - }; - }; - }; - - cpu@2 { - i-tlb-sets = <0x01>; - clock-names = "cpu"; - cpu-supply = <0x04>; - clocks = <0x03 0x01>; - d-cache-block-size = <0x40>; - device_type = "cpu"; - compatible = "sifive,u74-mc\0riscv"; - mmu-type = "riscv,sv39"; - d-cache-size = <0x8000>; - next-level-cache = <0x01>; - i-cache-size = <0x8000>; - reg = <0x02>; - phandle = <0x07>; - d-cache-sets = <0x40>; - i-cache-block-size = <0x40>; - operating-points-v2 = <0x02>; - i-cache-sets = <0x40>; - d-tlb-size = <0x28>; - riscv,isa = "rv64imafdc_zba_zbb"; - tlb-split; - i-tlb-size = <0x28>; - d-tlb-sets = <0x01>; - #cooling-cells = <0x02>; - - interrupt-controller { - compatible = "riscv,cpu-intc"; - #interrupt-cells = <0x01>; - phandle = <0x13>; - interrupt-controller; - }; - }; - - cpu@0 { - device_type = "cpu"; - compatible = "sifive,s7\0riscv"; - status = "disabled"; - next-level-cache = <0x01>; - i-cache-size = <0x4000>; - reg = <0x00>; - phandle = <0x05>; - i-cache-block-size = <0x40>; - i-cache-sets = <0x40>; - riscv,isa = "rv64imac_zba_zbb"; - - interrupt-controller { - compatible = "riscv,cpu-intc"; - #interrupt-cells = <0x01>; - phandle = <0x11>; - interrupt-controller; - }; - }; - - cpu@3 { - i-tlb-sets = <0x01>; - clock-names = "cpu"; - cpu-supply = <0x04>; - clocks = <0x03 0x01>; - d-cache-block-size = <0x40>; - device_type = "cpu"; - compatible = "sifive,u74-mc\0riscv"; - mmu-type = "riscv,sv39"; - d-cache-size = <0x8000>; - next-level-cache = <0x01>; - i-cache-size = <0x8000>; - reg = <0x03>; - phandle = <0x08>; - d-cache-sets = <0x40>; - i-cache-block-size = <0x40>; - operating-points-v2 = <0x02>; - i-cache-sets = <0x40>; - d-tlb-size = <0x28>; - riscv,isa = "rv64imafdc_zba_zbb"; - tlb-split; - i-tlb-size = <0x28>; - d-tlb-sets = <0x01>; - #cooling-cells = <0x02>; - - interrupt-controller { - compatible = "riscv,cpu-intc"; - #interrupt-cells = <0x01>; - phandle = <0x14>; - interrupt-controller; - }; - }; - }; - - __symbols__ { - i2c3 = "/soc/i2c@12030000"; - pwm = "/soc/pwm@120d0000"; - i2stx1 = "/soc/i2s@120c0000"; - sndi2s0 = "/snd-card1/simple-audio-card,dai-link@0/cpu"; - dsi0_output = "/soc/mipi@295d0000/ports/port@0/endpoint@0"; - i2srx = "/soc/i2s@100e0000"; - sys_syscon = "/soc/syscon@13030000"; - rgb_output = "/rgb-output"; - U74_1 = "/cpus/cpu@1"; - hdmi_in_lcdc = "/soc/hdmi@29590000/port/endpoint@0"; - clint = "/soc/timer@2000000"; - aongpio = "/soc/pinctrl@17020000"; - dc_out_dpi2 = "/soc/dc8200@29400000/port/endpoint@2"; - cpu_opp = "/opp-table-0"; - ispcrg = "/soc/clock-controller@19810000"; - spi2 = "/soc/spi@10080000"; - dsi1_output = "/soc/mipi@295d0000/ports/port@0/endpoint@1"; - crypto = "/soc/crypto@16000000"; - axp15060 = "/soc/i2c@12050000/pmic@36"; - stg_syscon = "/soc/syscon@10240000"; - pdm = "/soc/pdm@100d0000"; - i2c1 = "/soc/i2c@10040000"; - pciephy0 = "/soc/phy@10210000"; - osc = "/oscillator"; - gmac0 = "/soc/ethernet@16030000"; - cpu1_intc = "/cpus/cpu@1/interrupt-controller"; - hdmi_0p9 = "/soc/i2c@12050000/pmic@36/regulators/ALDO5"; - mclk_ext = "/mclk-ext-clock"; - qspi = "/soc/spi@13010000"; - dc_out_dpi0 = "/soc/dc8200@29400000/port/endpoint@0"; - ccache = "/soc/cache-controller@2010000"; - csi2rx0_from_ov4689 = "/soc/vin_sysctl@19800000/ports/port@1/endpoint@2"; - nor_flash = "/soc/spi@13010000/flash@0"; - gpu = "/soc/gpu@18000000"; - spi0 = "/soc/spi@10060000"; - sfctemp = "/soc/temperature-sensor@120e0000"; - syscrg = "/soc/clock-controller@13020000"; - tinker_ft5406 = "/soc/i2c@10050000/tinker_ft5406@38"; - pwmdac_codec = "/pwmdac-codec"; - mmc1 = "/soc/mmc@16020000"; - vpu_dec = "/soc/vpu_dec@130a0000"; - aoncrg = "/soc/clock-controller@17000000"; - i2srx_pins = "/soc/pinctrl@13040000/i2srx-0"; - csi2rx = "/soc/csi-bridge@19800000"; - stmmac_axi_setup = "/stmmac-axi-config"; - uart4 = "/soc/serial@12010000"; - jpu = "/soc/jpu@13090000"; - stgcrg = "/soc/clock-controller@10230000"; - sdma = "/soc/dma-controller@16008000"; - phy1 = "/soc/ethernet@16040000/mdio/ethernet-phy@1"; - cpu_alert0 = "/thermal-zones/cpu-thermal/trips/cpu_alert0"; - aon_syscon = "/soc/syscon@17010000"; - dma = "/soc/dma-controller@16050000"; - i2stx1_pins = "/soc/pinctrl@13040000/i2stx1-0"; - cpu0_intc = "/cpus/cpu@0/interrupt-controller"; - mipi_in = "/dsi-output/ports/port@0/endpoint"; - imx219 = "/soc/i2c@12060000/imx219@10"; - panel_out0 = "/soc/i2c@10050000/seeed_plane_i2c@45/port/endpoint"; - dc8200 = "/soc/dc8200@29400000"; - pcie_intc0 = "/soc/pcie@940000000/interrupt-controller"; - uart2 = "/soc/serial@10020000"; - sndcpu0 = "/snd-card3/simple-audio-card,dai-link@0/cpu"; - imx708_to_csi2rx0 = "/soc/i2c@12060000/imx708@1a/port/endpoint"; - i2c6 = "/soc/i2c@12060000"; - display = "/display-subsystem"; - imx708 = "/soc/i2c@12060000/imx708@1a"; - pcie0 = "/soc/pcie@940000000"; - mailbox_contrl0 = "/soc/mailbox@13060000"; - pwmdac = "/soc/pwmdac@100b0000"; - hdmi_1p8 = "/soc/i2c@12050000/pmic@36/regulators/ALDO3"; - emmc_vdd = "/soc/i2c@12050000/pmic@36/regulators/aldo4"; - U74_4 = "/cpus/cpu@4"; - gmac0_rmii_refin = "/gmac0-rmii-refin-clock"; - mmc1_pins = "/soc/pinctrl@13040000/mmc1-0"; - spi5 = "/soc/spi@12090000"; - mipi_dphy = "/soc/mipi-dphy@295e0000"; - uart0 = "/soc/serial@10000000"; - i2c2_pins = "/soc/pinctrl@13040000/i2c2-0"; - e24_mem = "/reserved-memory/e24@c0000000"; - i2c4 = "/soc/i2c@12040000"; - vdd_cpu = "/soc/i2c@12050000/pmic@36/regulators/dcdc2"; - xrp = "/soc/xrp@10230000"; - pllclk = "/soc/syscon@13030000/clock-controller"; - spdif = "/soc/spdif@100a0000"; - U74_2 = "/cpus/cpu@2"; - mipi_0p9 = "/soc/i2c@12050000/pmic@36/regulators/ALDO1"; - can0 = "/soc/can@130d0000"; - rng = "/soc/rng@1600c000"; - pwrc = "/soc/power-controller@17030000"; - rtc_osc = "/rtc-oscillator"; - spi3 = "/soc/spi@12070000"; - gmac0_rgmii_rxin = "/gmac0-rgmii-rxin-clock"; - ov4689 = "/soc/i2c@12060000/ov4689@36"; - i2c2 = "/soc/i2c@10050000"; - pciephy1 = "/soc/phy@10220000"; - S7_0 = "/cpus/cpu@0"; - i2stx0 = "/soc/i2s@120b0000"; - dc_out = "/soc/dc8200@29400000/port"; - dsi_in_port = "/soc/mipi@295d0000/ports/port@1/endpoint"; - mailbox_client0 = "/mailbox_client"; - mmc0_pins = "/soc/pinctrl@13040000/mmc0-0"; - gmac1 = "/soc/ethernet@16040000"; - tda988x_pin = "/tda988x_pin"; - pwmdac_pins = "/soc/pinctrl@13040000/pwmdac-0"; - dc_out_dpi1 = "/soc/dc8200@29400000/port/endpoint@1"; - spi_dev0 = "/soc/spi@10060000/spi@0"; - i2stx_bclk_ext = "/i2stx-bclk-ext-clock"; - spi1 = "/soc/spi@10070000"; - usbphy0 = "/soc/phy@10200000"; - i2stx_lrck_ext = "/i2stx-lrck-ext-clock"; - i2c0 = "/soc/i2c@10030000"; - vpu_enc = "/soc/vpu_enc@130b0000"; - hdmi_pins = "/soc/pinctrl@13040000/hdmi-0"; - cpu4_intc = "/cpus/cpu@4/interrupt-controller"; - imx219_to_csi2rx0 = "/soc/i2c@12060000/imx219@10/port/endpoint"; - voutcrg = "/soc/clock-controller@295c0000"; - uart5 = "/soc/serial@12020000"; - co_process = "/soc/e24@6e210000"; - ac108_mclk = "/ac108_mclk"; - dssctrl = "/soc/dssctrl@295B0000"; - sf_dpi_output = "/dsi-output/ports/port@1/endpoint"; - vin_sysctl = "/soc/vin_sysctl@19800000"; - dvp_clk = "/dvp-clock"; - mmc0 = "/soc/mmc@16010000"; - usb0 = "/soc/usb@10100000"; - i2c0_pins = "/soc/pinctrl@13040000/i2c0-0"; - dsi_output = "/dsi-output"; - pcie1_pins = "/soc/pinctrl@13040000/pcie1-0"; - panel_out1 = "/soc/i2c@10050000/panel_radxa@19/port/endpoint"; - pcie_intc1 = "/soc/pcie@9c0000000/interrupt-controller"; - uart3 = "/soc/serial@12000000"; - usb_cdns3 = "/soc/usb@10100000/usb@0"; - hdmi_input0 = "/rgb-output/ports/port@0/endpoint@0"; - xrp_reserved = "/reserved-memory/xrpbuffer@f0000000"; - i2srx_bclk_ext = "/i2srx-bclk-ext-clock"; - csi_phy = "/soc/phy@19820000"; - phy0 = "/soc/ethernet@16030000/mdio/ethernet-phy@0"; - sound3 = "/snd-card3"; - gmac1_rmii_refin = "/gmac1-rmii-refin-clock"; - spi0_pins = "/soc/pinctrl@13040000/spi0-0"; - cpu3_intc = "/cpus/cpu@3/interrupt-controller"; - i2c6_pins = "/soc/pinctrl@13040000/i2c6-0"; - clk_ext_camera = "/clk-ext-camera"; - pcie1 = "/soc/pcie@9c0000000"; - ov4689_to_csi2rx0 = "/soc/i2c@12060000/ov4689@36/port/endpoint"; - i2srx_lrck_ext = "/i2srx-lrck-ext-clock"; - wm8960_mclk = "/wm8960_mclk"; - tdm_pins = "/soc/pinctrl@13040000/tdm-0"; - plic = "/soc/interrupt-controller@c000000"; - spi6 = "/soc/spi@120a0000"; - pwm_pins = "/soc/pinctrl@13040000/pwm-0"; - tdm = "/soc/tdm@10090000"; - uart1 = "/soc/serial@10010000"; - hdmi = "/soc/hdmi@29590000"; - i2srx_mst = "/soc/i2srx_mst@100e0000"; - hdmi_in = "/soc/hdmi@29590000/port"; - sound1 = "/snd-card1"; - i2c5 = "/soc/i2c@12050000"; - mipi_dsi = "/soc/mipi@295d0000"; - hdmitx0_pixelclk = "/hdmitx0-pixel-clock"; - sysgpio = "/soc/pinctrl@13040000"; - pcie0_pins = "/soc/pinctrl@13040000/pcie0-0"; - gmac1_rgmii_rxin = "/gmac1-rgmii-rxin-clock"; - csi2rx0_from_imx219 = "/soc/vin_sysctl@19800000/ports/port@1/endpoint@0"; - U74_3 = "/cpus/cpu@3"; - can1 = "/soc/can@130e0000"; - vcc_3v3 = "/soc/i2c@12050000/pmic@36/regulators/dcdc1"; - rtc = "/soc/rtc@17040000"; - tdm_ext = "/tdm-ext-clock"; - spi4 = "/soc/spi@12080000"; - uart0_pins = "/soc/pinctrl@13040000/uart0-0"; - cpu2_intc = "/cpus/cpu@2/interrupt-controller"; - mclk_ext_pins = "/soc/pinctrl@13040000/mclk-ext-0"; - i2c5_pins = "/soc/pinctrl@13040000/i2c5-0"; - csi2rx0_from_imx708 = "/soc/vin_sysctl@19800000/ports/port@1/endpoint@1"; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - opensbi@40000000 { - reg = <0x00 0x40000000 0x00 0x80000>; - phandle = <0xb0>; - no-map; - }; - - linux,cma { - linux,cma-default; - alignment = <0x00 0x1000>; - alloc-ranges = <0x00 0x70000000 0x00 0x60000000>; - compatible = "shared-dma-pool"; - size = <0x00 0x60000000>; - reusable; - }; - - e24@c0000000 { - reg = <0x00 0x6ce00000 0x00 0x1600000>; - phandle = <0x5b>; - }; - - xrpbuffer@f0000000 { - reg = <0x00 0x69c00000 0x00 0x1ffffff 0x00 0x6bc00000 0x00 0x1000 0x00 0x6bc01000 0x00 0xfff000 0x00 0x6cc00000 0x00 0x1000>; - phandle = <0xab>; - }; - }; - - i2srx-bclk-ext-clock { - clock-output-names = "i2srx_bclk_ext"; - #clock-cells = <0x00>; - clock-frequency = <0xbb8000>; - compatible = "fixed-clock"; - phandle = <0x23>; - }; -}; diff --git a/etc/dtb/riscv64-qemu-virt.dtb b/etc/dtb/riscv64-qemu-virt.dtb deleted file mode 100644 index 4d5b4aed8ce2998264a08db9d3c53d340539e81e..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 5072 zcmbVQJ&Ytr6|OdB7GoRE7!Z~P+Vc?*O#5c>?%o9s1_>f31XzM-uBWL-}kDjr)Svn>0DCvtM}^F_g;Nn zRZ~3=U;N)clzRE0QtGx+FZ~wsE2uA_UPDEB<_l0SrMde^g8DJYXHmb1`V4B+i4pY| z(H?b$)thuvbgpRBJyQkW&p@hS-xz&s8kI`g=FD`>V&T<@o%~U$x8H^>#7cg@*Z&@L z=EQ!^V`R^*Zt8Rh$J~<6%$vrcwZ#JV+1Wtzf?F2Wmf7@(B9J>Dt`Q&Vx?;5v!~rKPJZf8|+imsQ+nC|J_zkj?jKks7hsO zp>n0wN?jEC^mtA&Zz?ZZFD@u_RyCP4iiL>MikI%JpoorM56o@Hk>#2HNs1kJjo~o7@dL985l*)XJ8Z+sm;+lx3eLmP=rxPp#;)1Dvhm4c$x)9 zDSJktIL!xNh)6IBDU8m9Q9OmwL(iRh9`gILrpI=3a!YZ)C0IPB>(;GHah$oXDNEDA z&Jxym!mSne5}U7vzE4B?Ju=4bN`a(%KkQf8gFGW*cw(;G&$;zTl%xSh069dR5?$svE>VX5P+C>^t=b;P$)e2c zYWmf|@fmqn)8NM#ho};R4HhQH@|qV>@8_ZyMJm`^4wI}bGHc|RrQhe!_4k{$(KoH> zimb#WeNoWSFZ0){#+q7!aLgxQ#@VjayTAD-MX)9Rrt;1qpJF5SU$4Zz^NT+RpF_wu zetGcLwSV1u^MxP%{J}f#e*Md5-}~<5*ExLN`_;WaJiq?S34A0Eq={zF&4=9$xXwp| zU#sWBIF9GA$^?VsJ2I^Cnu9E*n~G{tP3wT z`VyDFkC3~#GD~{-26MWO3N9DL#*7Jdglj;rOq9O`!3XQY&(+_?W?beHmKOu`vBWuY z&h(G^aL$7{Uc!Y%W=r1}P)8nr9JbNbF>hTRlk4^gFJbld5t7Gyv>f5YGygE6_uqyCtf5({omj@g!lo@xa8|5!W|7$?U14%)Mz z6IgzKxCy1)ktco8mwW?~-0=LQ9GtoRec?;6$FqcKq(`q$UZ40cHGF0idZG&c(uDZ( zeF8P=$pme3A?KPdao>o)oAmO2!(50%-?;DlInXGDXnq{;G%+`Uj(G)z^O3l%E~Z?M zEF6pyIe4HHfA;$l;wG0!`)9q?H{v@z+_N(V@viULX=8nD&;D$%-|$Cj-y89P!=tt@ z5g#}^_K3fa6Y&qj+KNCCA2_77FA*O&JNAfwxMz>}$a9Cgh!30{d&CFMjy>Y<<3xPq zDg1p4a!l}H;b1A~U;vh>Ja=XABPPqfWOu*D;^GJ_#1Qe$2=bF33W`#XAlVN*t`#X! zKfrpUf%@lBN6=GT$y{piX_GEZjk|^R{b7uJCr6%$$y6er%$av5`qC%X=c*<*rP58+ zX0Di*M%}Q*g-Nw3ORH{VdEOaogW6^F64%JCUZ&QVTy + * Copyright (C) 2022 StarFive Technology Co., Ltd. + */ + +#ifndef __JH7110_PINFUNC_H__ +#define __JH7110_PINFUNC_H__ + +/* + * mux bits: + * | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 | + * | din | dout | doen | function | gpio nr | + * + * dout: output signal + * doen: output enable signal + * din: optional input signal, 0xff = none + * function: function selector + * gpio nr: gpio number, 0 - 63 + */ +#define GPIOMUX(n, dout, doen, din) ( \ + (((din) & 0xff) << 24) | \ + (((dout) & 0xff) << 16) | \ + (((doen) & 0x3f) << 10) | \ + ((n) & 0x3f)) + +#define PINMUX(n, func) ((1 << 10) | (((func) & 0x3) << 8) | ((n) & 0xff)) + +/* sys_iomux dout */ +#define GPOUT_LOW 0 +#define GPOUT_HIGH 1 +#define GPOUT_SYS_WAVE511_UART_TX 2 +#define GPOUT_SYS_CAN0_STBY 3 +#define GPOUT_SYS_CAN0_TST_NEXT_BIT 4 +#define GPOUT_SYS_CAN0_TST_SAMPLE_POINT 5 +#define GPOUT_SYS_CAN0_TXD 6 +#define GPOUT_SYS_USB_DRIVE_VBUS 7 +#define GPOUT_SYS_QSPI_CS1 8 +#define GPOUT_SYS_SPDIF 9 +#define GPOUT_SYS_HDMI_CEC_SDA 10 +#define GPOUT_SYS_HDMI_DDC_SCL 11 +#define GPOUT_SYS_HDMI_DDC_SDA 12 +#define GPOUT_SYS_WATCHDOG 13 +#define GPOUT_SYS_I2C0_CLK 14 +#define GPOUT_SYS_I2C0_DATA 15 +#define GPOUT_SYS_SDIO0_BACK_END_POWER 16 +#define GPOUT_SYS_SDIO0_CARD_POWER_EN 17 +#define GPOUT_SYS_SDIO0_CCMD_OD_PULLUP_EN 18 +#define GPOUT_SYS_SDIO0_RST 19 +#define GPOUT_SYS_UART0_TX 20 +#define GPOUT_SYS_HIFI4_JTAG_TDO 21 +#define GPOUT_SYS_JTAG_TDO 22 +#define GPOUT_SYS_PDM_MCLK 23 +#define GPOUT_SYS_PWM_CHANNEL0 24 +#define GPOUT_SYS_PWM_CHANNEL1 25 +#define GPOUT_SYS_PWM_CHANNEL2 26 +#define GPOUT_SYS_PWM_CHANNEL3 27 +#define GPOUT_SYS_PWMDAC_LEFT 28 +#define GPOUT_SYS_PWMDAC_RIGHT 29 +#define GPOUT_SYS_SPI0_CLK 30 +#define GPOUT_SYS_SPI0_FSS 31 +#define GPOUT_SYS_SPI0_TXD 32 +#define GPOUT_SYS_GMAC_PHYCLK 33 +#define GPOUT_SYS_I2SRX_BCLK 34 +#define GPOUT_SYS_I2SRX_LRCK 35 +#define GPOUT_SYS_I2STX0_BCLK 36 +#define GPOUT_SYS_I2STX0_LRCK 37 +#define GPOUT_SYS_MCLK 38 +#define GPOUT_SYS_TDM_CLK 39 +#define GPOUT_SYS_TDM_SYNC 40 +#define GPOUT_SYS_TDM_TXD 41 +#define GPOUT_SYS_TRACE_DATA0 42 +#define GPOUT_SYS_TRACE_DATA1 43 +#define GPOUT_SYS_TRACE_DATA2 44 +#define GPOUT_SYS_TRACE_DATA3 45 +#define GPOUT_SYS_TRACE_REF 46 +#define GPOUT_SYS_CAN1_STBY 47 +#define GPOUT_SYS_CAN1_TST_NEXT_BIT 48 +#define GPOUT_SYS_CAN1_TST_SAMPLE_POINT 49 +#define GPOUT_SYS_CAN1_TXD 50 +#define GPOUT_SYS_I2C1_CLK 51 +#define GPOUT_SYS_I2C1_DATA 52 +#define GPOUT_SYS_SDIO1_BACK_END_POWER 53 +#define GPOUT_SYS_SDIO1_CARD_POWER_EN 54 +#define GPOUT_SYS_SDIO1_CLK 55 +#define GPOUT_SYS_SDIO1_CMD_OD_PULLUP_EN 56 +#define GPOUT_SYS_SDIO1_CMD 57 +#define GPOUT_SYS_SDIO1_DATA0 58 +#define GPOUT_SYS_SDIO1_DATA1 59 +#define GPOUT_SYS_SDIO1_DATA2 60 +#define GPOUT_SYS_SDIO1_DATA3 61 +#define GPOUT_SYS_SDIO1_DATA4 62 +#define GPOUT_SYS_SDIO1_DATA5 63 +#define GPOUT_SYS_SDIO1_DATA6 64 +#define GPOUT_SYS_SDIO1_DATA7 65 +#define GPOUT_SYS_SDIO1_RST 66 +#define GPOUT_SYS_UART1_RTS 67 +#define GPOUT_SYS_UART1_TX 68 +#define GPOUT_SYS_I2STX1_SDO0 69 +#define GPOUT_SYS_I2STX1_SDO1 70 +#define GPOUT_SYS_I2STX1_SDO2 71 +#define GPOUT_SYS_I2STX1_SDO3 72 +#define GPOUT_SYS_SPI1_CLK 73 +#define GPOUT_SYS_SPI1_FSS 74 +#define GPOUT_SYS_SPI1_TXD 75 +#define GPOUT_SYS_I2C2_CLK 76 +#define GPOUT_SYS_I2C2_DATA 77 +#define GPOUT_SYS_UART2_RTS 78 +#define GPOUT_SYS_UART2_TX 79 +#define GPOUT_SYS_SPI2_CLK 80 +#define GPOUT_SYS_SPI2_FSS 81 +#define GPOUT_SYS_SPI2_TXD 82 +#define GPOUT_SYS_I2C3_CLK 83 +#define GPOUT_SYS_I2C3_DATA 84 +#define GPOUT_SYS_UART3_TX 85 +#define GPOUT_SYS_SPI3_CLK 86 +#define GPOUT_SYS_SPI3_FSS 87 +#define GPOUT_SYS_SPI3_TXD 88 +#define GPOUT_SYS_I2C4_CLK 89 +#define GPOUT_SYS_I2C4_DATA 90 +#define GPOUT_SYS_UART4_RTS 91 +#define GPOUT_SYS_UART4_TX 92 +#define GPOUT_SYS_SPI4_CLK 93 +#define GPOUT_SYS_SPI4_FSS 94 +#define GPOUT_SYS_SPI4_TXD 95 +#define GPOUT_SYS_I2C5_CLK 96 +#define GPOUT_SYS_I2C5_DATA 97 +#define GPOUT_SYS_UART5_RTS 98 +#define GPOUT_SYS_UART5_TX 99 +#define GPOUT_SYS_SPI5_CLK 100 +#define GPOUT_SYS_SPI5_FSS 101 +#define GPOUT_SYS_SPI5_TXD 102 +#define GPOUT_SYS_I2C6_CLK 103 +#define GPOUT_SYS_I2C6_DATA 104 +#define GPOUT_SYS_SPI6_CLK 105 +#define GPOUT_SYS_SPI6_FSS 106 +#define GPOUT_SYS_SPI6_TXD 107 + +/* aon_iomux dout */ +#define GPOUT_AON_CLK_32K_OUT 2 +#define GPOUT_AON_PTC0_PWM4 3 +#define GPOUT_AON_PTC0_PWM5 4 +#define GPOUT_AON_PTC0_PWM6 5 +#define GPOUT_AON_PTC0_PWM7 6 +#define GPOUT_AON_CLK_GCLK0 7 +#define GPOUT_AON_CLK_GCLK1 8 +#define GPOUT_AON_CLK_GCLK2 9 + +/* sys_iomux doen */ +#define GPOEN_ENABLE 0 +#define GPOEN_DISABLE 1 +#define GPOEN_SYS_HDMI_CEC_SDA 2 +#define GPOEN_SYS_HDMI_DDC_SCL 3 +#define GPOEN_SYS_HDMI_DDC_SDA 4 +#define GPOEN_SYS_I2C0_CLK 5 +#define GPOEN_SYS_I2C0_DATA 6 +#define GPOEN_SYS_HIFI4_JTAG_TDO 7 +#define GPOEN_SYS_JTAG_TDO 8 +#define GPOEN_SYS_PWM0_CHANNEL0 9 +#define GPOEN_SYS_PWM0_CHANNEL1 10 +#define GPOEN_SYS_PWM0_CHANNEL2 11 +#define GPOEN_SYS_PWM0_CHANNEL3 12 +#define GPOEN_SYS_SPI0_NSSPCTL 13 +#define GPOEN_SYS_SPI0_NSSP 14 +#define GPOEN_SYS_TDM_SYNC 15 +#define GPOEN_SYS_TDM_TXD 16 +#define GPOEN_SYS_I2C1_CLK 17 +#define GPOEN_SYS_I2C1_DATA 18 +#define GPOEN_SYS_SDIO1_CMD 19 +#define GPOEN_SYS_SDIO1_DATA0 20 +#define GPOEN_SYS_SDIO1_DATA1 21 +#define GPOEN_SYS_SDIO1_DATA2 22 +#define GPOEN_SYS_SDIO1_DATA3 23 +#define GPOEN_SYS_SDIO1_DATA4 24 +#define GPOEN_SYS_SDIO1_DATA5 25 +#define GPOEN_SYS_SDIO1_DATA6 26 +#define GPOEN_SYS_SDIO1_DATA7 27 +#define GPOEN_SYS_SPI1_NSSPCTL 28 +#define GPOEN_SYS_SPI1_NSSP 29 +#define GPOEN_SYS_I2C2_CLK 30 +#define GPOEN_SYS_I2C2_DATA 31 +#define GPOEN_SYS_SPI2_NSSPCTL 32 +#define GPOEN_SYS_SPI2_NSSP 33 +#define GPOEN_SYS_I2C3_CLK 34 +#define GPOEN_SYS_I2C3_DATA 35 +#define GPOEN_SYS_SPI3_NSSPCTL 36 +#define GPOEN_SYS_SPI3_NSSP 37 +#define GPOEN_SYS_I2C4_CLK 38 +#define GPOEN_SYS_I2C4_DATA 39 +#define GPOEN_SYS_SPI4_NSSPCTL 40 +#define GPOEN_SYS_SPI4_NSSP 41 +#define GPOEN_SYS_I2C5_CLK 42 +#define GPOEN_SYS_I2C5_DATA 43 +#define GPOEN_SYS_SPI5_NSSPCTL 44 +#define GPOEN_SYS_SPI5_NSSP 45 +#define GPOEN_SYS_I2C6_CLK 46 +#define GPOEN_SYS_I2C6_DATA 47 +#define GPOEN_SYS_SPI6_NSSPCTL 48 +#define GPOEN_SYS_SPI6_NSSP 49 + +/* aon_iomux doen */ +#define GPOEN_AON_PTC0_OE_N_4 2 +#define GPOEN_AON_PTC0_OE_N_5 3 +#define GPOEN_AON_PTC0_OE_N_6 4 +#define GPOEN_AON_PTC0_OE_N_7 5 + +/* sys_iomux gin */ +#define GPI_NONE 255 + +#define GPI_SYS_WAVE511_UART_RX 0 +#define GPI_SYS_CAN0_RXD 1 +#define GPI_SYS_USB_OVERCURRENT 2 +#define GPI_SYS_SPDIF 3 +#define GPI_SYS_JTAG_RST 4 +#define GPI_SYS_HDMI_CEC_SDA 5 +#define GPI_SYS_HDMI_DDC_SCL 6 +#define GPI_SYS_HDMI_DDC_SDA 7 +#define GPI_SYS_HDMI_HPD 8 +#define GPI_SYS_I2C0_CLK 9 +#define GPI_SYS_I2C0_DATA 10 +#define GPI_SYS_SDIO0_CD 11 +#define GPI_SYS_SDIO0_INT 12 +#define GPI_SYS_SDIO0_WP 13 +#define GPI_SYS_UART0_RX 14 +#define GPI_SYS_HIFI4_JTAG_TCK 15 +#define GPI_SYS_HIFI4_JTAG_TDI 16 +#define GPI_SYS_HIFI4_JTAG_TMS 17 +#define GPI_SYS_HIFI4_JTAG_RST 18 +#define GPI_SYS_JTAG_TDI 19 +#define GPI_SYS_JTAG_TMS 20 +#define GPI_SYS_PDM_DMIC0 21 +#define GPI_SYS_PDM_DMIC1 22 +#define GPI_SYS_I2SRX_SDIN0 23 +#define GPI_SYS_I2SRX_SDIN1 24 +#define GPI_SYS_I2SRX_SDIN2 25 +#define GPI_SYS_SPI0_CLK 26 +#define GPI_SYS_SPI0_FSS 27 +#define GPI_SYS_SPI0_RXD 28 +#define GPI_SYS_JTAG_TCK 29 +#define GPI_SYS_MCLK_EXT 30 +#define GPI_SYS_I2SRX_BCLK 31 +#define GPI_SYS_I2SRX_LRCK 32 +#define GPI_SYS_I2STX1_BCLK 33 +#define GPI_SYS_I2STX1_LRCK 34 +#define GPI_SYS_TDM_CLK 35 +#define GPI_SYS_TDM_RXD 36 +#define GPI_SYS_TDM_SYNC 37 +#define GPI_SYS_CAN1_RXD 38 +#define GPI_SYS_I2C1_CLK 39 +#define GPI_SYS_I2C1_DATA 40 +#define GPI_SYS_SDIO1_CD 41 +#define GPI_SYS_SDIO1_INT 42 +#define GPI_SYS_SDIO1_WP 43 +#define GPI_SYS_SDIO1_CMD 44 +#define GPI_SYS_SDIO1_DATA0 45 +#define GPI_SYS_SDIO1_DATA1 46 +#define GPI_SYS_SDIO1_DATA2 47 +#define GPI_SYS_SDIO1_DATA3 48 +#define GPI_SYS_SDIO1_DATA4 49 +#define GPI_SYS_SDIO1_DATA5 50 +#define GPI_SYS_SDIO1_DATA6 51 +#define GPI_SYS_SDIO1_DATA7 52 +#define GPI_SYS_SDIO1_STRB 53 +#define GPI_SYS_UART1_CTS 54 +#define GPI_SYS_UART1_RX 55 +#define GPI_SYS_SPI1_CLK 56 +#define GPI_SYS_SPI1_FSS 57 +#define GPI_SYS_SPI1_RXD 58 +#define GPI_SYS_I2C2_CLK 59 +#define GPI_SYS_I2C2_DATA 60 +#define GPI_SYS_UART2_CTS 61 +#define GPI_SYS_UART2_RX 62 +#define GPI_SYS_SPI2_CLK 63 +#define GPI_SYS_SPI2_FSS 64 +#define GPI_SYS_SPI2_RXD 65 +#define GPI_SYS_I2C3_CLK 66 +#define GPI_SYS_I2C3_DATA 67 +#define GPI_SYS_UART3_RX 68 +#define GPI_SYS_SPI3_CLK 69 +#define GPI_SYS_SPI3_FSS 70 +#define GPI_SYS_SPI3_RXD 71 +#define GPI_SYS_I2C4_CLK 72 +#define GPI_SYS_I2C4_DATA 73 +#define GPI_SYS_UART4_CTS 74 +#define GPI_SYS_UART4_RX 75 +#define GPI_SYS_SPI4_CLK 76 +#define GPI_SYS_SPI4_FSS 77 +#define GPI_SYS_SPI4_RXD 78 +#define GPI_SYS_I2C5_CLK 79 +#define GPI_SYS_I2C5_DATA 80 +#define GPI_SYS_UART5_CTS 81 +#define GPI_SYS_UART5_RX 82 +#define GPI_SYS_SPI5_CLK 83 +#define GPI_SYS_SPI5_FSS 84 +#define GPI_SYS_SPI5_RXD 85 +#define GPI_SYS_I2C6_CLK 86 +#define GPI_SYS_I2C6_DATA 87 +#define GPI_SYS_SPI6_CLK 88 +#define GPI_SYS_SPI6_FSS 89 +#define GPI_SYS_SPI6_RXD 90 + +/* aon_iomux gin */ +#define GPI_AON_PMU_GPIO_WAKEUP_0 0 +#define GPI_AON_PMU_GPIO_WAKEUP_1 1 +#define GPI_AON_PMU_GPIO_WAKEUP_2 2 +#define GPI_AON_PMU_GPIO_WAKEUP_3 3 + +#endif diff --git a/etc/dtb/riscv64/jh7110-starfive-visionfive-v1.3b.dts b/etc/dtb/riscv64/jh7110-starfive-visionfive-v1.3b.dts new file mode 100644 index 00000000..d91c89e6 --- /dev/null +++ b/etc/dtb/riscv64/jh7110-starfive-visionfive-v1.3b.dts @@ -0,0 +1,1141 @@ +/dts-v1/; + +#include + +/ { + compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; + #address-cells = <0x02>; + #size-cells = <0x02>; + model = "StarFive VisionFive 2 v1.3B"; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + timebase-frequency = "", "=\t"; + + cpu0: cpu@0 { + compatible = "sifive,s7", "riscv"; + reg = <0x00>; + device_type = "cpu"; + i-cache-block-size = <0x40>; + i-cache-sets = <0x40>; + i-cache-size = <0x4000>; + next-level-cache = <0x01>; + riscv,isa = "rv64imac_zba_zbb"; + status = "disabled"; + phandle = <0x05>; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <0x01>; + phandle = <0x11>; + }; + }; + + cpu1: cpu@1 { + compatible = "sifive,u74-mc", "riscv"; + reg = <0x01>; + d-cache-block-size = <0x40>; + d-cache-sets = <0x40>; + d-cache-size = <0x8000>; + d-tlb-sets = <0x01>; + d-tlb-size = <0x28>; + device_type = "cpu"; + i-cache-block-size = <0x40>; + i-cache-sets = <0x40>; + i-cache-size = <0x8000>; + i-tlb-sets = <0x01>; + i-tlb-size = <0x28>; + mmu-type = "riscv,sv39"; + next-level-cache = <0x01>; + riscv,isa = "rv64imafdc_zba_zbb"; + tlb-split; + operating-points-v2 = <0x02>; + clocks = <&syscrg 0x01>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + cpu-supply = <0x04>; + phandle = <0x06>; + + cpu1_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <0x01>; + phandle = <0x12>; + }; + }; + + cpu2: cpu@2 { + compatible = "sifive,u74-mc", "riscv"; + reg = <0x02>; + d-cache-block-size = <0x40>; + d-cache-sets = <0x40>; + d-cache-size = <0x8000>; + d-tlb-sets = <0x01>; + d-tlb-size = <0x28>; + device_type = "cpu"; + i-cache-block-size = <0x40>; + i-cache-sets = <0x40>; + i-cache-size = <0x8000>; + i-tlb-sets = <0x01>; + i-tlb-size = <0x28>; + mmu-type = "riscv,sv39"; + next-level-cache = <0x01>; + riscv,isa = "rv64imafdc_zba_zbb"; + tlb-split; + operating-points-v2 = <0x02>; + clocks = <&syscrg 0x01>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + cpu-supply = <0x04>; + phandle = <0x07>; + + cpu2_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <0x01>; + phandle = <0x13>; + }; + }; + + cpu3: cpu@3 { + compatible = "sifive,u74-mc", "riscv"; + reg = <0x03>; + d-cache-block-size = <0x40>; + d-cache-sets = <0x40>; + d-cache-size = <0x8000>; + d-tlb-sets = <0x01>; + d-tlb-size = <0x28>; + device_type = "cpu"; + i-cache-block-size = <0x40>; + i-cache-sets = <0x40>; + i-cache-size = <0x8000>; + i-tlb-sets = <0x01>; + i-tlb-size = <0x28>; + mmu-type = "riscv,sv39"; + next-level-cache = <0x01>; + riscv,isa = "rv64imafdc_zba_zbb"; + tlb-split; + operating-points-v2 = <0x02>; + clocks = <&syscrg 0x01>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + cpu-supply = <0x04>; + phandle = <0x08>; + + cpu3_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <0x01>; + phandle = <0x14>; + }; + }; + + cpu4: cpu@4 { + compatible = "sifive,u74-mc", "riscv"; + reg = <0x04>; + d-cache-block-size = <0x40>; + d-cache-sets = <0x40>; + d-cache-size = <0x8000>; + d-tlb-sets = <0x01>; + d-tlb-size = <0x28>; + device_type = "cpu"; + i-cache-block-size = <0x40>; + i-cache-sets = <0x40>; + i-cache-size = <0x8000>; + i-tlb-sets = <0x01>; + i-tlb-size = <0x28>; + mmu-type = "riscv,sv39"; + next-level-cache = <0x01>; + riscv,isa = "rv64imafdc_zba_zbb"; + tlb-split; + operating-points-v2 = <0x02>; + clocks = <&syscrg 0x01>; + clock-names = "cpu"; + #cooling-cells = <0x02>; + cpu-supply = <0x04>; + phandle = <0x09>; + + cpu4_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <0x01>; + phandle = <0x15>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + core4 { + cpu = <&cpu4>; + }; + }; + }; + }; + + clk_dvp_clk: dvp-clock { + compatible = "fixed-clock"; + clock-output-names = "dvp_clk"; + #clock-cells = <0x00>; + clock-frequency = <0x46cf710>; + phandle = <0x4c>; + }; + + clk_gmac0_rgmii_rxin: gmac0-rgmii-rxin-clock { + compatible = "fixed-clock"; + clock-output-names = "gmac0_rgmii_rxin"; + #clock-cells = <0x00>; + clock-frequency = <0x7735940>; + phandle = <0x44>; + }; + + clk_gmac0_rmii_refin: gmac0-rmii-refin-clock { + compatible = "fixed-clock"; + clock-output-names = "gmac0_rmii_refin"; + #clock-cells = <0x00>; + clock-frequency = <0x2faf080>; + phandle = <0x43>; + }; + + clk_gmac1_rgmii_rxin: gmac1-rgmii-rxin-clock { + compatible = "fixed-clock"; + clock-output-names = "gmac1_rgmii_rxin"; + #clock-cells = <0x00>; + clock-frequency = <0x7735940>; + phandle = <0x36>; + }; + + clk_gmac1_rmii_refin: gmac1-rmii-refin-clock { + compatible = "fixed-clock"; + clock-output-names = "gmac1_rmii_refin"; + #clock-cells = <0x00>; + clock-frequency = <0x2faf080>; + phandle = <0x35>; + }; + + clk_hdmitx0_pixelclk: hdmitx0-pixel-clock { + compatible = "fixed-clock"; + clock-output-names = "hdmitx0_pixelclk"; + #clock-cells = <0x00>; + clock-frequency = <0x11b3dc40>; + phandle = <0x4f>; + }; + + clk_i2srx_bclk_ext: i2srx-bclk-ext-clock { + compatible = "fixed-clock"; + clock-output-names = "i2srx_bclk_ext"; + #clock-cells = <0x00>; + clock-frequency = <0xbb8000>; + phandle = <0x23>; + }; + + clk_i2srx_lrck_ext: i2srx-lrck-ext-clock { + compatible = "fixed-clock"; + clock-output-names = "i2srx_lrck_ext"; + #clock-cells = <0x00>; + clock-frequency = <0x2ee00>; + phandle = <0x24>; + }; + + clk_i2stx_bclk_ext: i2stx-bclk-ext-clock { + compatible = "fixed-clock"; + clock-output-names = "i2stx_bclk_ext"; + #clock-cells = <0x00>; + clock-frequency = <0xbb8000>; + phandle = <0x31>; + }; + + clk_i2stx_lrck_ext: i2stx-lrck-ext-clock { + compatible = "fixed-clock"; + clock-output-names = "i2stx_lrck_ext"; + #clock-cells = <0x00>; + clock-frequency = <0x2ee00>; + phandle = <0x32>; + }; + + clk_mclk_ext: mclk-ext-clock { + compatible = "fixed-clock"; + clock-output-names = "mclk_ext"; + #clock-cells = <0x00>; + clock-frequency = <0xbb8000>; + phandle = <0x20>; + }; + + clk_osc: oscillator { + compatible = "fixed-clock"; + clock-output-names = "osc"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + phandle = <0x29>; + }; + + clk_rtc_osc: rtc-oscillator { + compatible = "fixed-clock"; + clock-output-names = "rtc_osc"; + #clock-cells = <0x00>; + clock-frequency = <0x8000>; + phandle = <0x45>; + }; + + axi_cfg: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt = <0x0f>; + snps,rd_osr_lmt = <0x0f>; + snps,blen = <0x100 0x80 0x40 0x20 0x00 0x00 0x00>; + phandle = <0x3f>; + }; + + clk_tdm_ext: tdm-ext-clock { + compatible = "fixed-clock"; + clock-output-names = "tdm_ext"; + #clock-cells = <0x00>; + clock-frequency = <0x2ee0000>; + phandle = <0x1d>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <0x10>; + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + clint: timer@2000000 { + compatible = "starfive,jh7110-clint", "sifive,clint0"; + reg = <0x00 0x2000000 0x00 0x10000>; + interrupts-extended = <&cpu0_intc 0x03>, + <&cpu0_intc 0x07>, + <&cpu1_intc 0x03>, + <&cpu1_intc 0x07>, + <&cpu2_intc 0x03>, + <&cpu2_intc 0x07>, + <&cpu3_intc 0x03>, + <&cpu3_intc 0x07>, + <&cpu4_intc 0x03>, + <&cpu4_intc 0x07>; + phandle = <0x6e>; + }; + + ccache: cache-controller@2010000 { + compatible = "starfive,jh7110-ccache", "sifive,ccache0", "cache"; + reg = <0x00 0x2010000 0x00 0x4000 0x00 0x8000000 0x00 0x2000000 0x00 0xa000000 0x00 0x2000000>; + interrupts = <0x01 0x03 0x04 0x02>; + cache-block-size = <0x40>; + cache-level = <0x02>; + cache-sets = <0x800>; + cache-size = <0x200000>; + cache-unified; + phandle = <0x01>; + }; + + plic: interrupt-controller@c000000 { + compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0"; + reg = <0x00 0xc000000 0x00 0x4000000>; + interrupts-extended = <&cpu0_intc 0x0b>, + <&cpu1_intc 0x0b>, + <&cpu1_intc 0x09>, + <&cpu2_intc 0x0b>, + <&cpu2_intc 0x09>, + <&cpu3_intc 0x0b>, + <&cpu3_intc 0x09>, + <&cpu4_intc 0x0b>, + <&cpu4_intc 0x09>; + interrupt-controller; + #interrupt-cells = <0x01>; + #address-cells = <0x00>; + riscv,ndev = <0x88>; + phandle = <0x10>; + }; + + uart0: serial@10000000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x10000000 0x00 0x10000>; + clocks = <&syscrg 0x92>, + <&syscrg 0x91>; + clock-names = "baudclk", + "apb_pclk"; + resets = <&syscrg 0x53>, + <&syscrg 0x54>; + interrupts = <0x20>; + reg-io-width = <0x04>; + reg-shift = <0x02>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + phandle = <0x6f>; + }; + + uart1: serial@10010000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x10010000 0x00 0x10000>; + clocks = <&syscrg 0x94>, + <&syscrg 0x93>; + clock-names = "baudclk", + "apb_pclk"; + resets = <&syscrg 0x55>, + <&syscrg 0x56>; + interrupts = <0x21>; + reg-io-width = <0x04>; + reg-shift = <0x02>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + phandle = <0x70>; + }; + + uart2: serial@10020000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x10020000 0x00 0x10000>; + clocks = <&syscrg 0x96>, + <&syscrg 0x95>; + clock-names = "baudclk", + "apb_pclk"; + resets = <&syscrg 0x57>, + <&syscrg 0x58>; + interrupts = <0x22>; + reg-io-width = <0x04>; + reg-shift = <0x02>; + status = "disabled"; + phandle = <0x71>; + }; + + stgcrg: clock-controller@10230000 { + compatible = "starfive,jh7110-stgcrg"; + reg = <0x00 0x10230000 0x00 0x10000>; + clocks = <&clk_osc>, + <&syscrg 0x36>, + <&syscrg 0x08>, + <&syscrg 0x5f>, + <&syscrg 0x02>, + <&syscrg 0x37>, + <&syscrg 0x06>, + <&syscrg 0x0b>; + clock-names = "osc", + "hifi4_core", + "stg_axiahb", + "usb_125m", + "cpu_bus", + "hifi4_axi", + "nocstg_bus", + "apb_bus"; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + phandle = <0x27>; + }; + + stg_syscon: syscon@10240000 { + compatible = "starfive,jh7110-stg-syscon", "syscon"; + reg = <0x00 0x10240000 0x00 0x1000>; + phandle = <0x26>; + }; + + uart3: serial@12000000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x12000000 0x00 0x10000>; + clocks = <&syscrg 0x98>, + <&syscrg 0x97>; + clock-names = "baudclk", + "apb_pclk"; + resets = <&syscrg 0x59>, + <&syscrg 0x5a>; + interrupts = <0x2d>; + reg-io-width = <0x04>; + reg-shift = <0x02>; + status = "disabled"; + phandle = <0x82>; + }; + + uart4: serial@12010000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x12010000 0x00 0x10000>; + clocks = <&syscrg 0x9a>, + <&syscrg 0x99>; + clock-names = "baudclk", + "apb_pclk"; + resets = <&syscrg 0x5b>, + <&syscrg 0x5c>; + interrupts = <0x2e>; + reg-io-width = <0x04>; + reg-shift = <0x02>; + status = "disabled"; + phandle = <0x83>; + }; + + uart5: serial@12020000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x12020000 0x00 0x10000>; + clocks = <&syscrg 0x9c>, + <&syscrg 0x9b>; + clock-names = "baudclk", + "apb_pclk"; + resets = <&syscrg 0x5d>, + <&syscrg 0x5e>; + interrupts = <0x2f>; + reg-io-width = <0x04>; + reg-shift = <0x02>; + status = "disabled"; + phandle = <0x84>; + }; + + syscrg: clock-controller@13020000 { + compatible = "starfive,jh7110-syscrg"; + reg = <0x00 0x13020000 0x00 0x10000>; + clocks = <&clk_osc>, + <&clk_gmac1_rmii_refin>, + <&clk_gmac1_rgmii_rxin>, + <&clk_i2stx_bclk_ext>, + <&clk_i2stx_lrck_ext>, + <&clk_i2srx_bclk_ext>, + <&clk_i2srx_lrck_ext>, + <&clk_tdm_ext>, + <&clk_mclk_ext>, + <&pll 0x00>, + <&pll 0x01>, + <&pll 0x02>; + clock-names = "osc", + "gmac1_rmii_refin", + "gmac1_rgmii_rxin", + "i2stx_bclk_ext", + "i2stx_lrck_ext", + "i2srx_bclk_ext", + "i2srx_lrck_ext", + "tdm_ext", + "mclk_ext", + "pll0_out", + "pll1_out", + "pll2_out"; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + phandle = <0x03>; + }; + + sys_syscon: syscon@13030000 { + compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; + reg = <0x00 0x13030000 0x00 0x1000>; + phandle = <0x22>; + + pll: clock-controller { + compatible = "starfive,jh7110-pll"; + clocks = <&clk_osc>; + #clock-cells = <0x01>; + phandle = <0x37>; + }; + }; + + sys_pinctrl: pinctrl@13040000 { + compatible = "starfive,jh7110-sys-pinctrl"; + reg = <0x00 0x13040000 0x00 0x10000>; + clocks = <&syscrg 0x70>; + resets = <&syscrg 0x02>; + interrupts = <0x56>; + interrupt-controller; + #interrupt-cells = <0x02>; + gpio-controller; + #gpio-cells = <0x02>; + phandle = <0x1a>; + + uart0_pins: uart0-0 { + phandle = <0x16>; + + tx-pins { + // pinmux = <0xff140005>; + pinmux = ; + bias-disable; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0x00>; + }; + + rx-pins { + // pinmux = <0xe000406>; + pinmux = ; + bias-disable; + drive-strength = <2>; + input-enable; + input-schmitt-enable; + slew-rate = <0x00>; + }; + }; + + uart1_pins: uart1-0 { + tx-pins { + pinmux = ; + bias-disable; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + rx-pins { + pinmux = ; + bias-disable; + drive-strength = <2>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + }; + + timer@13050000 { + compatible = "starfive,jh7110-timer"; + reg = <0x00 0x13050000 0x00 0x10000>; + interrupts = <0x45 0x46 0x47 0x48>; + clocks = <&syscrg 0x7c>, + <&syscrg 0x7d>, + <&syscrg 0x7e>, + <&syscrg 0x7f>, + <&syscrg 0x80>; + clock-names = "apb", + "ch0", + "ch1", + "ch2", + "ch3"; + resets = <&syscrg 0x75>, + <&syscrg 0x76>, + <&syscrg 0x77>, + <&syscrg 0x78>, + <&syscrg 0x79>; + reset-names = "apb", + "ch0", + "ch1", + "ch2", + "ch3"; + }; + + mailbox@13060000 { + compatible = "starfive,mail_box"; + reg = <0x00 0x13060000 0x00 0x1000>; + clocks = <&syscrg 0x71>; + clock-names = "clk_apb"; + resets = <&syscrg 0x44>; + reset-names = "mbx_rre"; + interrupts = <0x1a 0x1b>; + #mbox-cells = <0x02>; + status = "okay"; + phandle = <0x0d>; + }; + + watchdog@13070000 { + compatible = "starfive,jh7110-wdt"; + reg = <0x00 0x13070000 0x00 0x10000>; + clocks = <&syscrg 0x7a>, + <&syscrg 0x7b>; + clock-names = "apb", + "core"; + resets = <&syscrg 0x6d>, + <&syscrg 0x6e>; + }; + + dma-controller@16008000 { + compatible = "arm,pl080", "arm,primecell"; + arm,primecell-periphid = <0x41080>; + reg = <0x00 0x16008000 0x00 0x4000>; + interrupts = <0x1d>; + clocks = <&stgcrg 0x0f>; + clock-names = "apb_pclk"; + resets = <&stgcrg 0x03>; + lli-bus-interface-ahb1; + mem-bus-interface-ahb1; + memcpy-burst-size = <0x100>; + memcpy-bus-width = <0x20>; + #dma-cells = <0x02>; + phandle = <0x39>; + }; + + gmac0: ethernet@16030000 { + compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20"; + reg = <0x00 0x16030000 0x00 0x10000>; + clocks = <&aoncrg 0x03>, + <&aoncrg 0x02>, + <&syscrg 0x6d>, + <&aoncrg 0x06>, + <&syscrg 0x6f>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "tx", + "gtx"; + resets = <&aoncrg 0x00>, + <&aoncrg 0x01>; + reset-names = "stmmaceth", + "ahb"; + interrupts = <0x07 0x06 0x05>; + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; + rx-fifo-depth = <0x800>; + tx-fifo-depth = <0x800>; + snps,multicast-filter-bins = <0x40>; + snps,perfect-filter-entries = <0x100>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config = <&axi_cfg>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,txpbl = <0x10>; + snps,rxpbl = <0x10>; + starfive,syscon = <&aon_syscon 0x0c 0x12>; + status = "okay"; + phy-handle = <&gmac0_phy>; + phy-mode = "rgmii-id"; + starfive,tx-use-rgmii-clk; + assigned-clocks = <&aoncrg 0x05>; + assigned-clock-parents = <&aoncrg 0x04>; + phandle = <0x9e>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + + gmac0_phy: ethernet-phy@0 { + reg = <0x00>; + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; + motorcomm,rx-clk-drv-microamp = <0xf82>; + motorcomm,rx-data-drv-microamp = <0xb5e>; + rx-internal-delay-ps = <0x5dc>; + tx-internal-delay-ps = <0x5dc>; + phandle = <0x41>; + }; + }; + }; + + gmac1: ethernet@16040000 { + compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20"; + reg = <0x00 0x16040000 0x00 0x10000>; + clocks = <&syscrg 0x62>, + <&syscrg 0x61>, + <&syscrg 0x66>, + <&syscrg 0x6a>, + <&syscrg 0x6b>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "tx", + "gtx"; + resets = <&syscrg 0x42>, + <&syscrg 0x43>; + reset-names = "stmmaceth", + "ahb"; + interrupts = <0x4e 0x4d 0x4c>; + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; + rx-fifo-depth = <0x800>; + tx-fifo-depth = <0x800>; + snps,multicast-filter-bins = <0x40>; + snps,perfect-filter-entries = <0x100>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config = <&axi_cfg>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,txpbl = <0x10>; + snps,rxpbl = <0x10>; + starfive,syscon = <&sys_syscon 0x90 0x02>; + status = "okay"; + phy-handle = <&gmac1_phy>; + phy-mode = "rgmii-id"; + starfive,tx-use-rgmii-clk; + assigned-clocks = <&syscrg 0x69>; + assigned-clock-parents = <&syscrg 0x65>; + phandle = <0x9f>; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + + gmac1_phy: ethernet-phy@1 { + reg = <0x00>; + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-100-inverted; + motorcomm,rx-clk-drv-microamp = <0xf82>; + motorcomm,rx-data-drv-microamp = <0xb5e>; + rx-internal-delay-ps = <0x12c>; + tx-internal-delay-ps = <0x00>; + phandle = <0x42>; + }; + }; + }; + + axi_dma: dma-controller@16050000 { + compatible = "starfive,jh7110-axi-dma"; + reg = <0x00 0x16050000 0x00 0x10000>; + clocks = <&stgcrg 0x1b>, + <&stgcrg 0x1c>; + clock-names = "core-clk", + "cfgr-clk"; + resets = <&stgcrg 0x05>, + <&stgcrg 0x06>; + interrupts = <0x49>; + #dma-cells = <0x01>; + dma-channels = <0x04>; + snps,dma-masters = <0x01>; + snps,data-width = <0x03>; + snps,block-size = <0x10000 0x10000 0x10000 0x10000>; + snps,priority = <0x00 0x01 0x02 0x03>; + snps,axi-max-burst-len = <0x10>; + phandle = <0x1e>; + }; + + aoncrg: clock-controller@17000000 { + compatible = "starfive,jh7110-aoncrg"; + reg = <0x00 0x17000000 0x00 0x10000>; + clocks = <&clk_osc>, + <&clk_gmac0_rmii_refin>, + <&clk_gmac0_rgmii_rxin>, + <&syscrg 0x08>, + <&syscrg 0x0b>, + <&syscrg 0x6c>, + <&clk_rtc_osc>; + clock-names = "osc", + "gmac0_rmii_refin", + "gmac0_rgmii_rxin", + "stg_axiahb", + "apb_bus", + "gmac0_gtxclk", + "rtc_osc"; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + phandle = <0x3e>; + }; + + aon_syscon: syscon@17010000 { + compatible = "starfive,jh7110-aon-syscon", "syscon"; + reg = <0x00 0x17010000 0x00 0x1000>; + #power-domain-cells = <0x01>; + phandle = <0x40>; + }; + + aon_pinctrl: pinctrl@17020000 { + compatible = "starfive,jh7110-aon-pinctrl"; + reg = <0x00 0x17020000 0x00 0x10000>; + resets = <&aoncrg 0x02>; + interrupts = <0x55>; + interrupt-controller; + #interrupt-cells = <0x02>; + gpio-controller; + #gpio-cells = <0x02>; + phandle = <0x62>; + }; + + pmu: power-controller@17030000 { + compatible = "starfive,jh7110-pmu"; + reg = <0x00 0x17030000 0x00 0x10000>; + interrupts = <0x6f>; + #power-domain-cells = <0x01>; + phandle = <0x38>; + }; + + rtc: rtc@17040000 { + compatible = "starfive,jh7110-rtc"; + reg = <0x00 0x17040000 0x00 0x10000>; + interrupts = <0x0a 0x0b 0x0c>; + interrupt-names = "rtc_ms_pulse", "rtc_sec_pulse", "rtc"; + clocks = <&aoncrg 0x0a>, + <&aoncrg 0x0d>; + clock-names = "pclk", + "cal_clk"; + resets = <&aoncrg 0x07>, + <&aoncrg 0x05>, + <&aoncrg 0x06>; + reset-names = "rst_osc", + "rst_apb", + "rst_cal"; + rtc,cal-clock-freq = <0xf4240>; + phandle = <0xa0>; + }; + + voutcrg: clock-controller@295c0000 { + compatible = "starfive,jh7110-voutcrg"; + reg = <0x00 0x295c0000 0x00 0x10000>; + clocks = <&syscrg 0x3a>, + <&syscrg 0x3d>, + <&syscrg 0x3e>, + <&syscrg 0x3f>, + <&syscrg 0xa5>, + <&clk_hdmitx0_pixelclk>; + clock-names = "vout_src", + "vout_top_ahb", + "vout_top_axi", + "vout_top_hdmitx0_mclk", + "i2stx0_bclk", + "hdmitx0_pixelclk"; + resets = <&syscrg 0x2b>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + power-domains = <&pmu 0x04>; + phandle = <0x4e>; + }; + }; + + aliases { + ethernet0 = "/soc/ethernet@16030000"; + ethernet1 = "/soc/ethernet@16040000"; + serial0 = "/soc/serial@10000000"; + serial3 = "/soc/serial@12000000"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x00 0x40000000 0x01 0x00>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00 0x20000000>; + alignment = <0x00 0x1000>; + alloc-ranges = <0x00 0x70000000 0x00 0x20000000>; + linux,cma-default; + }; + + e24@c0000000 { + reg = <0x00 0x6ce00000 0x00 0x1600000>; + phandle = <0x5b>; + }; + + xrpbuffer@f0000000 { + reg = <0x00 0x69c00000 0x00 0x1ffffff 0x00 0x6bc00000 0x00 0x1000 0x00 0x6bc01000 0x00 0xfff000 0x00 0x6cc00000 0x00 0x1000>; + phandle = <0xab>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-ack { + gpios = <&aon_pinctrl 0x03 0x00>; + color = <0x02>; + function = "heartbeat"; + linux,default-trigger = "heartbeat"; + label = "ack"; + }; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&sys_pinctrl 0x23 0x00>; + priority = <0xe0>; + }; + + ac108_mclk { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + phandle = <0xae>; + }; + + clk-ext-camera { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + phandle = <0x2c>; + }; + + wm8960_mclk { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x1770000>; + phandle = <0xaf>; + }; + + __symbols__ { + S7_0 = "/cpus/cpu@0"; + cpu0_intc = "/cpus/cpu@0/interrupt-controller"; + U74_1 = "/cpus/cpu@1"; + cpu1_intc = "/cpus/cpu@1/interrupt-controller"; + U74_2 = "/cpus/cpu@2"; + cpu2_intc = "/cpus/cpu@2/interrupt-controller"; + U74_3 = "/cpus/cpu@3"; + cpu3_intc = "/cpus/cpu@3/interrupt-controller"; + U74_4 = "/cpus/cpu@4"; + cpu4_intc = "/cpus/cpu@4/interrupt-controller"; + cpu_opp = "/opp-table-0"; + display = "/display-subsystem"; + dsi_output = "/dsi-output"; + mipi_in = "/dsi-output/ports/port@0/endpoint"; + sf_dpi_output = "/dsi-output/ports/port@1/endpoint"; + mailbox_client0 = "/mailbox_client"; + rgb_output = "/rgb-output"; + hdmi_input0 = "/rgb-output/ports/port@0/endpoint@0"; + tda988x_pin = "/tda988x_pin"; + cpu_alert0 = "/thermal-zones/cpu-thermal/trips/cpu_alert0"; + dvp_clk = "/dvp-clock"; + gmac0_rgmii_rxin = "/gmac0-rgmii-rxin-clock"; + gmac0_rmii_refin = "/gmac0-rmii-refin-clock"; + gmac1_rgmii_rxin = "/gmac1-rgmii-rxin-clock"; + gmac1_rmii_refin = "/gmac1-rmii-refin-clock"; + hdmitx0_pixelclk = "/hdmitx0-pixel-clock"; + i2srx_bclk_ext = "/i2srx-bclk-ext-clock"; + i2srx_lrck_ext = "/i2srx-lrck-ext-clock"; + i2stx_bclk_ext = "/i2stx-bclk-ext-clock"; + i2stx_lrck_ext = "/i2stx-lrck-ext-clock"; + mclk_ext = "/mclk-ext-clock"; + osc = "/oscillator"; + rtc_osc = "/rtc-oscillator"; + stmmac_axi_setup = "/stmmac-axi-config"; + tdm_ext = "/tdm-ext-clock"; + clint = "/soc/timer@2000000"; + ccache = "/soc/cache-controller@2010000"; + plic = "/soc/interrupt-controller@c000000"; + uart0 = "/soc/serial@10000000"; + uart1 = "/soc/serial@10010000"; + uart2 = "/soc/serial@10020000"; + i2c0 = "/soc/i2c@10030000"; + i2c1 = "/soc/i2c@10040000"; + i2c2 = "/soc/i2c@10050000"; + panel_out0 = "/soc/i2c@10050000/seeed_plane_i2c@45/port/endpoint"; + tinker_ft5406 = "/soc/i2c@10050000/tinker_ft5406@38"; + panel_out1 = "/soc/i2c@10050000/panel_radxa@19/port/endpoint"; + spi0 = "/soc/spi@10060000"; + spi_dev0 = "/soc/spi@10060000/spi@0"; + spi1 = "/soc/spi@10070000"; + spi2 = "/soc/spi@10080000"; + tdm = "/soc/tdm@10090000"; + spdif = "/soc/spdif@100a0000"; + pwmdac = "/soc/pwmdac@100b0000"; + pdm = "/soc/pdm@100d0000"; + i2srx_mst = "/soc/i2srx_mst@100e0000"; + i2srx = "/soc/i2s@100e0000"; + usb0 = "/soc/usb@10100000"; + usb_cdns3 = "/soc/usb@10100000/usb@0"; + usbphy0 = "/soc/phy@10200000"; + pciephy0 = "/soc/phy@10210000"; + pciephy1 = "/soc/phy@10220000"; + stgcrg = "/soc/clock-controller@10230000"; + xrp = "/soc/xrp@10230000"; + stg_syscon = "/soc/syscon@10240000"; + uart3 = "/soc/serial@12000000"; + uart4 = "/soc/serial@12010000"; + uart5 = "/soc/serial@12020000"; + i2c3 = "/soc/i2c@12030000"; + i2c4 = "/soc/i2c@12040000"; + i2c5 = "/soc/i2c@12050000"; + axp15060 = "/soc/i2c@12050000/pmic@36"; + mipi_0p9 = "/soc/i2c@12050000/pmic@36/regulators/ALDO1"; + hdmi_0p9 = "/soc/i2c@12050000/pmic@36/regulators/ALDO5"; + hdmi_1p8 = "/soc/i2c@12050000/pmic@36/regulators/ALDO3"; + vcc_3v3 = "/soc/i2c@12050000/pmic@36/regulators/dcdc1"; + vdd_cpu = "/soc/i2c@12050000/pmic@36/regulators/dcdc2"; + emmc_vdd = "/soc/i2c@12050000/pmic@36/regulators/aldo4"; + i2c6 = "/soc/i2c@12060000"; + imx219 = "/soc/i2c@12060000/imx219@10"; + imx219_to_csi2rx0 = "/soc/i2c@12060000/imx219@10/port/endpoint"; + imx708 = "/soc/i2c@12060000/imx708@1a"; + imx708_to_csi2rx0 = "/soc/i2c@12060000/imx708@1a/port/endpoint"; + ov4689 = "/soc/i2c@12060000/ov4689@36"; + ov4689_to_csi2rx0 = "/soc/i2c@12060000/ov4689@36/port/endpoint"; + spi3 = "/soc/spi@12070000"; + spi4 = "/soc/spi@12080000"; + spi5 = "/soc/spi@12090000"; + spi6 = "/soc/spi@120a0000"; + i2stx0 = "/soc/i2s@120b0000"; + i2stx1 = "/soc/i2s@120c0000"; + pwm = "/soc/pwm@120d0000"; + sfctemp = "/soc/temperature-sensor@120e0000"; + qspi = "/soc/spi@13010000"; + nor_flash = "/soc/spi@13010000/flash@0"; + syscrg = "/soc/clock-controller@13020000"; + sys_syscon = "/soc/syscon@13030000"; + pllclk = "/soc/syscon@13030000/clock-controller"; + sysgpio = "/soc/pinctrl@13040000"; + i2c0_pins = "/soc/pinctrl@13040000/i2c0-0"; + i2c2_pins = "/soc/pinctrl@13040000/i2c2-0"; + i2c5_pins = "/soc/pinctrl@13040000/i2c5-0"; + i2c6_pins = "/soc/pinctrl@13040000/i2c6-0"; + i2srx_pins = "/soc/pinctrl@13040000/i2srx-0"; + i2stx1_pins = "/soc/pinctrl@13040000/i2stx1-0"; + mclk_ext_pins = "/soc/pinctrl@13040000/mclk-ext-0"; + mmc0_pins = "/soc/pinctrl@13040000/mmc0-0"; + mmc1_pins = "/soc/pinctrl@13040000/mmc1-0"; + pcie0_pins = "/soc/pinctrl@13040000/pcie0-0"; + pcie1_pins = "/soc/pinctrl@13040000/pcie1-0"; + pwm_pins = "/soc/pinctrl@13040000/pwm-0"; + pwmdac_pins = "/soc/pinctrl@13040000/pwmdac-0"; + spi0_pins = "/soc/pinctrl@13040000/spi0-0"; + tdm_pins = "/soc/pinctrl@13040000/tdm-0"; + uart0_pins = "/soc/pinctrl@13040000/uart0-0"; + hdmi_pins = "/soc/pinctrl@13040000/hdmi-0"; + mailbox_contrl0 = "/soc/mailbox@13060000"; + jpu = "/soc/jpu@13090000"; + vpu_dec = "/soc/vpu_dec@130a0000"; + vpu_enc = "/soc/vpu_enc@130b0000"; + can0 = "/soc/can@130d0000"; + can1 = "/soc/can@130e0000"; + crypto = "/soc/crypto@16000000"; + sdma = "/soc/dma-controller@16008000"; + rng = "/soc/rng@1600c000"; + mmc0 = "/soc/mmc@16010000"; + mmc1 = "/soc/mmc@16020000"; + gmac0 = "/soc/ethernet@16030000"; + phy0 = "/soc/ethernet@16030000/mdio/ethernet-phy@0"; + gmac1 = "/soc/ethernet@16040000"; + phy1 = "/soc/ethernet@16040000/mdio/ethernet-phy@1"; + dma = "/soc/dma-controller@16050000"; + aoncrg = "/soc/clock-controller@17000000"; + aon_syscon = "/soc/syscon@17010000"; + aongpio = "/soc/pinctrl@17020000"; + pwrc = "/soc/power-controller@17030000"; + rtc = "/soc/rtc@17040000"; + gpu = "/soc/gpu@18000000"; + csi2rx = "/soc/csi-bridge@19800000"; + vin_sysctl = "/soc/vin_sysctl@19800000"; + csi2rx0_from_imx219 = "/soc/vin_sysctl@19800000/ports/port@1/endpoint@0"; + csi2rx0_from_imx708 = "/soc/vin_sysctl@19800000/ports/port@1/endpoint@1"; + csi2rx0_from_ov4689 = "/soc/vin_sysctl@19800000/ports/port@1/endpoint@2"; + ispcrg = "/soc/clock-controller@19810000"; + csi_phy = "/soc/phy@19820000"; + dc8200 = "/soc/dc8200@29400000"; + dc_out = "/soc/dc8200@29400000/port"; + dc_out_dpi0 = "/soc/dc8200@29400000/port/endpoint@0"; + dc_out_dpi1 = "/soc/dc8200@29400000/port/endpoint@1"; + dc_out_dpi2 = "/soc/dc8200@29400000/port/endpoint@2"; + hdmi = "/soc/hdmi@29590000"; + hdmi_in = "/soc/hdmi@29590000/port"; + hdmi_in_lcdc = "/soc/hdmi@29590000/port/endpoint@0"; + dssctrl = "/soc/dssctrl@295B0000"; + voutcrg = "/soc/clock-controller@295c0000"; + mipi_dsi = "/soc/mipi@295d0000"; + dsi0_output = "/soc/mipi@295d0000/ports/port@0/endpoint@0"; + dsi1_output = "/soc/mipi@295d0000/ports/port@0/endpoint@1"; + dsi_in_port = "/soc/mipi@295d0000/ports/port@1/endpoint"; + mipi_dphy = "/soc/mipi-dphy@295e0000"; + co_process = "/soc/e24@6e210000"; + e24_mem = "/reserved-memory/e24@c0000000"; + xrp_reserved = "/reserved-memory/xrpbuffer@f0000000"; + pwmdac_codec = "/pwmdac-codec"; + sound3 = "/snd-card3"; + sndcpu0 = "/snd-card3/simple-audio-card,dai-link@0/cpu"; + sound1 = "/snd-card1"; + sndi2s0 = "/snd-card1/simple-audio-card,dai-link@0/cpu"; + ac108_mclk = "/ac108_mclk"; + clk_ext_camera = "/clk-ext-camera"; + wm8960_mclk = "/wm8960_mclk"; + }; +}; diff --git a/etc/dtb/riscv64-qemu-virt.dts b/etc/dtb/riscv64/riscv64-qemu-virt.dts similarity index 95% rename from etc/dtb/riscv64-qemu-virt.dts rename to etc/dtb/riscv64/riscv64-qemu-virt.dts index 22a68c53..396968f7 100644 --- a/etc/dtb/riscv64-qemu-virt.dts +++ b/etc/dtb/riscv64/riscv64-qemu-virt.dts @@ -38,7 +38,7 @@ #size-cells = <0x00>; timebase-frequency = <0x989680>; - cpu@0 { + cpu0: cpu@0 { phandle = <0x01>; device_type = "cpu"; reg = <0x00>; @@ -52,7 +52,7 @@ riscv,isa = "rv64imafdch_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ziccrse_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zmmul_za64rs_zaamo_zalrsc_zawrs_zfa_zca_zcd_zba_zbb_zbc_zbs_shcounterenw_shgatpa_shtvala_shvsatpa_shvstvala_shvstvecd_ssccptr_sscounterenw_sstc_sstvala_sstvecd_ssu64xl_svadu_svvptc"; mmu-type = "riscv,sv57"; - interrupt-controller { + cpu0_intc: interrupt-controller { #interrupt-cells = <0x01>; interrupt-controller; compatible = "riscv,cpu-intc"; @@ -61,11 +61,9 @@ }; cpu-map { - cluster0 { - core0 { - cpu = <0x01>; + cpu = <&cpu0>; }; }; }; @@ -186,7 +184,8 @@ phandle = <0x03>; riscv,ndev = <0x5f>; reg = <0x00 0xc000000 0x00 0x600000>; - interrupts-extended = <0x02 0x0b 0x02 0x09>; + interrupts-extended = <&cpu0_intc 0x0b>, + <&cpu0_intc 0x09>; interrupt-controller; compatible = "sifive,plic-1.0.0", "riscv,plic0"; #address-cells = <0x00>; @@ -194,7 +193,8 @@ }; clint@2000000 { - interrupts-extended = <0x02 0x03 0x02 0x07>; + interrupts-extended = <&cpu0_intc 0x03>, + <&cpu0_intc 0x07>; reg = <0x00 0x2000000 0x00 0x10000>; compatible = "sifive,clint0", "riscv,clint0"; }; diff --git a/kernel/Cargo.toml b/kernel/Cargo.toml index db02c72f..0cea6ecc 100644 --- a/kernel/Cargo.toml +++ b/kernel/Cargo.toml @@ -35,6 +35,7 @@ ygg_driver_ahci = { path = "driver/block/ahci" } ygg_driver_input = { path = "driver/input" } ygg_driver_usb_xhci.path = "driver/usb/xhci" ygg_driver_net_rtl81xx.path = "driver/net/rtl81xx" +ygg_driver_serial_8250.path = "driver/serial/uart8250" memfs = { path = "driver/fs/memfs" } ext2 = { path = "driver/fs/ext2" } diff --git a/kernel/arch/hosted/src/lib.rs b/kernel/arch/hosted/src/lib.rs index 8662a426..9a0420db 100644 --- a/kernel/arch/hosted/src/lib.rs +++ b/kernel/arch/hosted/src/lib.rs @@ -16,7 +16,7 @@ use kernel_arch_interface::{ }; use libk_mm_interface::{ address::PhysicalAddress, - process::ProcessAddressSpaceManager, + process::{PageAttributeUpdate, ProcessAddressSpaceManager}, table::{MapAttributes, TableAllocator}, }; use yggdrasil_abi::{ @@ -164,6 +164,14 @@ impl ProcessAddressSpaceManager for ProcessAddressSpaceI unimplemented!() } + unsafe fn update_page_attributes( + &mut self, + _address: usize, + _update: &PageAttributeUpdate, + ) -> Result<(), Error> { + unimplemented!() + } + fn translate(&self, _address: usize) -> Result<(PhysicalAddress, MapAttributes), Error> { unimplemented!() } diff --git a/kernel/driver/bsp/arm/src/pl011.rs b/kernel/driver/bsp/arm/src/pl011.rs index cb9c2bf1..3f0f2f69 100644 --- a/kernel/driver/bsp/arm/src/pl011.rs +++ b/kernel/driver/bsp/arm/src/pl011.rs @@ -1,3 +1,4 @@ +// TODO baud rate configuration use alloc::sync::Arc; use device_api::{ device::{Device, DeviceInitContext}, @@ -16,7 +17,10 @@ use tock_registers::{ register_bitfields, register_structs, registers::{ReadOnly, ReadWrite, WriteOnly}, }; -use yggdrasil_abi::{error::Error, io::TerminalOptions}; +use yggdrasil_abi::{ + error::Error, + io::{TerminalOptions, TerminalOutputOptions}, +}; register_bitfields! { u32, @@ -89,14 +93,25 @@ impl Io { } impl TerminalOutput for Pl011Inner { - fn write(&self, byte: u8) -> Result<(), Error> { - self.io.lock().send(byte); + fn write(&self, byte: u8, options: &TerminalOutputOptions) -> Result<(), Error> { + let mut lock = self.io.lock(); + if byte == b'\n' && options.contains(TerminalOutputOptions::NL_TO_CRNL) { + lock.send(b'\r'); + } + lock.send(b'\n'); Ok(()) } - fn write_multiple(&self, bytes: &[u8]) -> Result { + fn write_multiple( + &self, + bytes: &[u8], + options: &TerminalOutputOptions, + ) -> Result { let mut lock = self.io.lock(); for &byte in bytes { + if byte == b'\n' && options.contains(TerminalOutputOptions::NL_TO_CRNL) { + lock.send(b'\r'); + } lock.send(byte); } Ok(bytes.len()) @@ -117,6 +132,11 @@ impl DebugSink for Pl011 { self.inner.get().putc_to_output(byte) } + fn puts(&self, s: &str) -> Result<(), Error> { + self.inner.get().write_to_output(s.as_bytes())?; + Ok(()) + } + fn supports_control_sequences(&self) -> bool { true } diff --git a/kernel/driver/bsp/bcm283x/src/aux_uart.rs b/kernel/driver/bsp/bcm283x/src/aux_uart.rs index 4d0ac333..e262ea67 100644 --- a/kernel/driver/bsp/bcm283x/src/aux_uart.rs +++ b/kernel/driver/bsp/bcm283x/src/aux_uart.rs @@ -68,10 +68,6 @@ pub struct Bcm2835AuxUart { impl Regs { fn write_byte(&self, byte: u8) -> Result<(), Error> { - if byte == b'\n' { - self.write_byte(b'\r').ok(); - } - while !self .AUX_MU_LSR_REG .matches_all(AUX_MU_LSR_REG::TX_EMPTY::SET) @@ -81,22 +77,29 @@ impl Regs { self.AUX_MU_IO_REG.set(byte as u32); Ok(()) } - - fn write_bytes(&self, bytes: &[u8]) -> Result<(), Error> { - for &byte in bytes { - self.write_byte(byte)?; - } - Ok(()) - } } impl TerminalOutput for Inner { - fn write(&self, byte: u8) -> Result<(), Error> { - self.regs.lock().write_byte(byte) + fn write(&self, byte: u8, options: &TerminalOutputOptions) -> Result<(), Error> { + let regs = self.regs.lock(); + if byte == b'\n' && options.contains(TerminalOutputOptions::NL_TO_CRNL) { + regs.write_byte(b'\r')?; + } + regs.write_byte(byte) } - fn write_multiple(&self, bytes: &[u8]) -> Result { - self.regs.lock().write_bytes(bytes)?; + fn write_multiple( + &self, + bytes: &[u8], + options: &TerminalOutputOptions, + ) -> Result { + let regs = self.regs.lock(); + for &byte in bytes { + if byte == b'\n' && options.contains(TerminalOutputOptions::NL_TO_CRNL) { + regs.write_byte(b'\r')?; + } + regs.write_byte(byte)?; + } Ok(bytes.len()) } } diff --git a/kernel/driver/bsp/jh7110/src/clocks.rs b/kernel/driver/bsp/jh7110/src/clocks.rs index 360c7d7f..34fbc347 100644 --- a/kernel/driver/bsp/jh7110/src/clocks.rs +++ b/kernel/driver/bsp/jh7110/src/clocks.rs @@ -57,6 +57,16 @@ const SYSCRG_GMAC0_GTXC: usize = 0x1BC / 4; // uart const SYSCRG_UART0_APB: usize = 0x244 / 4; const SYSCRG_UART0_CORE: usize = 0x248 / 4; +const SYSCRG_UART1_APB: usize = 0x24C / 4; +const SYSCRG_UART1_CORE: usize = 0x250 / 4; +const SYSCRG_UART2_APB: usize = 0x254 / 4; +const SYSCRG_UART2_CORE: usize = 0x258 / 4; +const SYSCRG_UART3_APB: usize = 0x25C / 4; +const SYSCRG_UART3_CORE: usize = 0x260 / 4; +const SYSCRG_UART4_APB: usize = 0x264 / 4; +const SYSCRG_UART4_CORE: usize = 0x268 / 4; +const SYSCRG_UART5_APB: usize = 0x26C / 4; +const SYSCRG_UART5_CORE: usize = 0x270 / 4; // jtag const SYSCRG_JTAG_CERTIFICATION_TRNG: usize = 0x2F4 / 4; const SYSCRG_CLOCK_COUNT: usize = SYSCRG_JTAG_CERTIFICATION_TRNG + 1; @@ -226,6 +236,16 @@ const SYSCRG_CLOCKS: &[Option<(&'static str, ClockDef)>] = &const { // uart t[SYSCRG_UART0_APB] = Some(("clk_uart0_apb", Gate(SYSCRG_APB0))); t[SYSCRG_UART0_CORE] = Some(("clk_uart0_core", Gate(SYSCRG_OSC))); + t[SYSCRG_UART1_APB] = Some(("clk_uart1_apb", Gate(SYSCRG_APB0))); + t[SYSCRG_UART1_CORE] = Some(("clk_uart1_core", Gate(SYSCRG_OSC))); + t[SYSCRG_UART2_APB] = Some(("clk_uart2_apb", Gate(SYSCRG_APB0))); + t[SYSCRG_UART2_CORE] = Some(("clk_uart2_core", Gate(SYSCRG_OSC))); + t[SYSCRG_UART3_APB] = Some(("clk_uart3_apb", Gate(SYSCRG_APB0))); + t[SYSCRG_UART3_CORE] = Some(("clk_uart3_core", GateDiv(10, SYSCRG_PERH_ROOT))); + t[SYSCRG_UART4_APB] = Some(("clk_uart4_apb", Gate(SYSCRG_APB0))); + t[SYSCRG_UART4_CORE] = Some(("clk_uart4_core", GateDiv(10, SYSCRG_PERH_ROOT))); + t[SYSCRG_UART5_APB] = Some(("clk_uart5_apb", Gate(SYSCRG_APB0))); + t[SYSCRG_UART5_CORE] = Some(("clk_uart5_core", GateDiv(10, SYSCRG_PERH_ROOT))); t }; diff --git a/kernel/driver/serial/uart8250/Cargo.toml b/kernel/driver/serial/uart8250/Cargo.toml new file mode 100644 index 00000000..70023762 --- /dev/null +++ b/kernel/driver/serial/uart8250/Cargo.toml @@ -0,0 +1,21 @@ +[package] +name = "ygg_driver_serial_8250" +version = "0.1.0" +edition = "2024" + +[dependencies] +device-tree.workspace = true +device-api.workspace = true +yggdrasil-abi.workspace = true +libk-mm.workspace = true +libk-util.workspace = true +libk.workspace = true + +[target.'cfg(any(target_arch = "x86", target_arch = "x86_64"))'.dependencies] +kernel-arch-x86.workspace = true + +[dev-dependencies] +kernel-arch-x86.workspace = true + +[lints] +workspace = true diff --git a/kernel/driver/serial/uart8250/src/fdt.rs b/kernel/driver/serial/uart8250/src/fdt.rs new file mode 100644 index 00000000..1766e479 --- /dev/null +++ b/kernel/driver/serial/uart8250/src/fdt.rs @@ -0,0 +1,180 @@ +use alloc::{sync::Arc, vec::Vec}; +use device_api::{ + clock::{ClockHandle, Hertz, ResetHandle}, + device::Device, + interrupt::{InterruptHandler, IrqHandle}, +}; +use device_tree::driver::{Node, ProbeContext, device_tree_driver}; +use libk::error::Error; +use libk_mm::{address::PhysicalAddress, device::RawDeviceMemoryMapping}; + +use crate::{Access, Config, PortConfig, Uart8250, Vendor}; + +pub struct Fdt8250Access { + mapping: RawDeviceMemoryMapping, + offset: usize, + shift: usize, + io_width: usize, +} + +pub struct Fdt8250Config { + irq: IrqHandle, + ports: [Fdt8250PortConfig; 1], +} + +pub struct Fdt8250PortConfig { + base: PhysicalAddress, + reg_offset: usize, + reg_shift: usize, + reg_io_width: usize, + + resets: Vec, + clock_frequency: Option, + clk_baud: Option, + clk_apb: Option, +} + +impl Access for Fdt8250Access { + type Config = Fdt8250Config; + + unsafe fn map(config: &Fdt8250PortConfig) -> Result { + let mapping = unsafe { + RawDeviceMemoryMapping::map(config.base.into_u64(), 0x1000, Default::default()) + }?; + Ok(Self { + offset: config.reg_offset, + shift: config.reg_shift, + io_width: config.reg_io_width, + mapping, + }) + } + + fn read(&self, reg: u8) -> u8 { + let addr = ((reg as usize) << self.shift) + self.offset; + assert!(addr + self.io_width <= 0x1000); + let ptr = unsafe { self.mapping.as_non_null::().add(addr) }; + match self.io_width { + 4 => unsafe { ptr.cast::().read_volatile() as u8 }, + 1 => unsafe { ptr.cast::().read_volatile() }, + _ => unimplemented!(), + } + } + + fn write(&mut self, reg: u8, val: u8) { + let addr = ((reg as usize) << self.shift) + self.offset; + assert!(addr + self.io_width <= 0x1000); + let ptr = unsafe { self.mapping.as_non_null::().add(addr) }; + match self.io_width { + 4 => unsafe { ptr.cast::().write_volatile(val as u32) }, + 1 => unsafe { ptr.cast::().write_volatile(val) }, + _ => unimplemented!(), + } + } + + // fn read(&self, reg: usize) -> u32 { + // } + + // fn write(&mut self, reg: usize, val: u32) { + // } +} + +impl PortConfig for Fdt8250PortConfig { + fn input_clock_frequency(&self) -> Result { + if let Some(clock_frequency) = self.clock_frequency { + Ok(clock_frequency) + } else if let Some(clk_baud) = self.clk_baud.as_ref() { + clk_baud.rate() + } else { + Err(Error::InvalidArgument) + } + } + + fn deassert_resets(&self) -> Result<(), Error> { + for reset in self.resets.iter() { + reset.deassert()?; + } + Ok(()) + } + + fn enable_clocks(&self) -> Result<(), Error> { + if let Some(clk_apb) = self.clk_apb.as_ref() { + clk_apb.enable()?; + } + if let Some(clk_baud) = self.clk_baud.as_ref() { + clk_baud.enable()?; + } + Ok(()) + } +} + +impl Config for Fdt8250Config { + type Port = Fdt8250PortConfig; + + fn ports(&self) -> &[Self::Port] { + &self.ports[..] + } + + fn enable_interrupt(&self, handler: Arc) -> Result<(), Error> { + self.irq.register(handler)?; + self.irq.enable()?; + Ok(()) + } +} + +impl Fdt8250Config { + fn from_device_tree(node: &Arc, context: &mut ProbeContext) -> Option<(Self, Vendor)> { + let vendor = if node.is_compatible("snps,dw-apb-uart") { + Vendor::DwApbUart + } else if node.is_compatible("ns16550a") { + Vendor::Generic16550 + } else { + Vendor::Generic8250 + }; + + let base = node.map_base(context, 0)?; + let irq = node.interrupt(0)?; + let resets = node.resets().map(|r| r.collect()).unwrap_or_default(); + let clock_frequency = node + .prop_usize("clock-frequency") + .map(|clk| Hertz(clk as _)); + let clk_baud = node.named_clock("baudclk"); + let clk_apb = node.named_clock("apb_pclk"); + + let reg_io_width = node.prop_usize("reg-io-width").unwrap_or(1); + let reg_offset = node.prop_usize("reg-offset").unwrap_or(0); + let reg_shift = node.prop_usize("reg-shift").unwrap_or(0); + + Some(( + Self { + irq, + ports: [Fdt8250PortConfig { + clk_apb, + clk_baud, + resets, + clock_frequency, + + reg_io_width, + reg_offset, + reg_shift, + + base, + }], + }, + vendor, + )) + } +} + +device_tree_driver! { + compatible: [ + "snps,dw-apb-uart", + "ns16550a", + ], + driver: { + fn probe(&self, node: &Arc, context: &mut ProbeContext) -> Option> { + let (config, vendor) = Fdt8250Config::from_device_tree(node, context)?; + let uart = Arc::new(Uart8250::::new(config, vendor)); + Some(uart) + } + } +} diff --git a/kernel/driver/serial/uart8250/src/io.rs b/kernel/driver/serial/uart8250/src/io.rs new file mode 100644 index 00000000..7d70e028 --- /dev/null +++ b/kernel/driver/serial/uart8250/src/io.rs @@ -0,0 +1,81 @@ +use alloc::sync::Arc; +use device_api::{ + clock::Hertz, + interrupt::{InterruptHandler, Irq}, +}; +use kernel_arch_x86::intrinsics; +use libk::{device::external_interrupt_controller, error::Error}; + +use crate::{Access, Config, PortConfig}; + +pub struct Io8250Access { + io_base: u16, +} + +pub struct Io8250Config { + ports: [Io8250PortConfig; 2], + irq: Irq, +} + +pub struct Io8250PortConfig { + io_base: u16, +} + +impl Io8250Config { + pub fn new(port_a: u16, port_b: u16, irq: Irq) -> Self { + Self { + ports: [ + Io8250PortConfig { io_base: port_a }, + Io8250PortConfig { io_base: port_b }, + ], + irq, + } + } +} + +impl Access for Io8250Access { + type Config = Io8250Config; + + unsafe fn map(config: &Io8250PortConfig) -> Result { + Ok(Self { + io_base: config.io_base, + }) + } + + fn read(&self, reg: u8) -> u8 { + unsafe { intrinsics::inb(self.io_base + reg as u16) } + } + + fn write(&mut self, reg: u8, val: u8) { + unsafe { intrinsics::outb(self.io_base + reg as u16, val) }; + } +} + +impl Config for Io8250Config { + type Port = Io8250PortConfig; + + fn ports(&self) -> &[Self::Port] { + &self.ports + } + + fn enable_interrupt(&self, handler: Arc) -> Result<(), Error> { + let intc = external_interrupt_controller()?; + intc.register_irq(self.irq, Default::default(), handler)?; + intc.enable_irq(self.irq)?; + Ok(()) + } +} + +impl PortConfig for Io8250PortConfig { + fn input_clock_frequency(&self) -> Result { + Ok(Hertz(115200 * 16)) + } + + fn enable_clocks(&self) -> Result<(), Error> { + Ok(()) + } + + fn deassert_resets(&self) -> Result<(), Error> { + Ok(()) + } +} diff --git a/kernel/driver/serial/uart8250/src/lib.rs b/kernel/driver/serial/uart8250/src/lib.rs new file mode 100644 index 00000000..ed57a17d --- /dev/null +++ b/kernel/driver/serial/uart8250/src/lib.rs @@ -0,0 +1,120 @@ +#![no_std] + +use core::iter; + +use alloc::{sync::Arc, vec::Vec}; +use device_api::{ + clock::Hertz, + device::{Device, DeviceInitContext}, + interrupt::{InterruptHandler, IrqVector}, +}; +use libk::error::Error; +use libk_util::OneTimeInit; + +use crate::port::Port8250; + +extern crate alloc; + +#[cfg(any(rust_analyzer, target_arch = "aarch64", target_arch = "riscv64"))] +pub mod fdt; +#[cfg(any(rust_analyzer, target_arch = "x86_64", target_arch = "x86"))] +pub mod io; +pub mod port; + +pub trait Config: Sync + Send { + type Port: PortConfig; + + fn ports(&self) -> &[Self::Port]; + fn enable_interrupt(&self, handler: Arc) -> Result<(), Error>; +} + +pub trait PortConfig: Sync + Send { + fn input_clock_frequency(&self) -> Result; + fn enable_clocks(&self) -> Result<(), Error>; + fn deassert_resets(&self) -> Result<(), Error>; +} + +pub trait Access: Sized + Send + 'static { + type Config: Config; + + unsafe fn map(config: &::Port) -> Result; + + fn read(&self, reg: u8) -> u8; + fn write(&mut self, reg: u8, val: u8); +} + +#[derive(Debug, PartialEq, Eq, Clone, Copy)] +pub enum Vendor { + DwApbUart, + Generic8250, + Generic16550, +} + +pub struct Uart8250 { + config: A::Config, + vendor: Vendor, + ports: Vec>>, +} + +impl Uart8250 { + pub fn new(config: A::Config, vendor: Vendor) -> Self { + let ports = config + .ports() + .iter() + .map(|_| { + Arc::new(Port8250 { + vendor, + inner: OneTimeInit::new(), + }) + }) + .collect(); + Self { + config, + vendor, + ports, + } + } + + pub unsafe fn init_inner(self: &Arc) -> Result<(), Error> { + let ports = self.ports.iter(); + let port_configs = self.config.ports().iter(); + for (port, config) in iter::zip(ports, port_configs) { + port.clone().init(config)?; + } + + Ok(()) + } +} + +impl Device for Uart8250 { + unsafe fn init(self: Arc, _cx: DeviceInitContext) -> Result<(), Error> { + unsafe { self.init_inner() } + } + + unsafe fn init_irq(self: Arc) -> Result<(), Error> { + self.config.enable_interrupt(self.clone())?; + for port in self.ports.iter() { + port.enable_irq(); + } + Ok(()) + } + + fn display_name(&self) -> &str { + match self.vendor { + Vendor::DwApbUart => "Synopsys DesignWare 16550 UART", + Vendor::Generic16550 => "16550 UART", + Vendor::Generic8250 => "8250 UART", + } + } +} + +impl InterruptHandler for Uart8250 { + fn handle_irq(self: Arc, _vector: IrqVector) -> bool { + for port in self.ports.iter() { + if port.handle_irq() { + return true; + } + } + false + } +} diff --git a/kernel/driver/serial/uart8250/src/port.rs b/kernel/driver/serial/uart8250/src/port.rs new file mode 100644 index 00000000..f19832e8 --- /dev/null +++ b/kernel/driver/serial/uart8250/src/port.rs @@ -0,0 +1,257 @@ +use core::ops::{Deref, DerefMut}; + +use alloc::sync::Arc; +use device_api::clock::Hertz; +use libk::{ + debug::{self, DebugSink}, + device::manager::DEVICE_REGISTRY, + error::Error, + vfs::{Terminal, TerminalInput, TerminalOutput}, +}; +use libk_util::{OneTimeInit, sync::IrqSafeSpinlock}; +use yggdrasil_abi::io::{TerminalOptions, TerminalOutputOptions}; + +use crate::{Access, Config, PortConfig, Vendor}; + +const REG_RBR: u8 = 0; +const REG_THR: u8 = 0; +const REG_DLL: u8 = 0; +const REG_IER: u8 = 1; +const REG_DLH: u8 = 1; +const REG_IIR: u8 = 2; +const REG_FCR: u8 = 2; +const REG_LCR: u8 = 3; +const REG_MCR: u8 = 4; +const REG_LSR: u8 = 5; + +// Vendor-specific +const DW_REG_USR: u8 = 31; +const DW_REG_SRR: u8 = 34; +const DW_REG_HTX: u8 = 41; + +/// Received Data available interrupt +const IER_RXDE: u8 = 1 << 0; +/// Received Data available +const IIR_RXDA: u8 = 0b100; +const IIR_MASK: u8 = 0x7; +const FCR_FIFO_ENABLE: u8 = 1 << 0; +const FCR_RX_FIFO_RESET: u8 = 1 << 1; +const FCR_TX_FIFO_RESET: u8 = 1 << 2; +const LCR_BITS_8: u8 = 0x3; +const LCR_DLAB: u8 = 1 << 7; +const MCR_DTR: u8 = 1 << 0; +const MCR_RTS: u8 = 1 << 1; +const LSR_TEMT: u8 = 1 << 6; + +pub struct Port8250 { + pub(crate) vendor: Vendor, + pub(crate) inner: OneTimeInit>>>, +} + +struct PortRegs { + regs: A, + baud_rate: u32, + input_clock: Hertz, +} + +pub(crate) struct Inner { + regs: IrqSafeSpinlock>, +} + +impl Port8250 { + pub(crate) fn init(self: Arc, config: &::Port) -> Result<(), Error> { + let _guard = debug::MuteGuard::acquire(); + // Deassert reset signal and enable clocks + config.enable_clocks()?; + config.deassert_resets()?; + + let input_clock = config.input_clock_frequency()?; + + let mut regs = PortRegs { + regs: unsafe { A::map(config) }?, + baud_rate: 0, + input_clock, + }; + + regs.init(self.vendor, 115200)?; + + let input = TerminalInput::with_capacity(64)?; + let output = Inner { + regs: IrqSafeSpinlock::new(regs), + }; + + let terminal = self.inner.init(Arc::new(Terminal::from_parts( + TerminalOptions::const_default(), + input, + output, + ))); + + DEVICE_REGISTRY + .serial_terminal + .register(terminal.clone(), Some(self.clone())) + .ok(); + + Ok(()) + } + + pub(crate) fn enable_irq(&self) { + let mut regs = self.inner.get().output().regs.lock(); + regs.write(REG_IER, IER_RXDE); + } + + pub(crate) fn handle_irq(&self) -> bool { + let inner = self.inner.get(); + let byte = { + let regs = inner.output().regs.lock(); + let iir = regs.read(REG_IIR) & IIR_MASK; + if iir == IIR_RXDA { + Some(regs.read(REG_RBR) as u8) + } else { + None + } + }; + + if let Some(byte) = byte { + inner.write_to_input(byte); + true + } else { + false + } + } +} + +impl DebugSink for Port8250 { + fn putc(&self, c: u8) -> Result<(), Error> { + self.inner.get().putc_to_output(c) + } + + fn supports_control_sequences(&self) -> bool { + true + } +} + +impl TerminalOutput for Inner { + fn write(&self, byte: u8, options: &TerminalOutputOptions) -> Result<(), Error> { + let mut regs = self.regs.lock(); + if byte == b'\n' && options.contains(TerminalOutputOptions::NL_TO_CRNL) { + regs.serial_out(b'\r')?; + } + regs.serial_out(byte) + } + + fn write_multiple( + &self, + bytes: &[u8], + options: &TerminalOutputOptions, + ) -> Result { + let mut regs = self.regs.lock(); + for &byte in bytes { + if byte == b'\n' && options.contains(TerminalOutputOptions::NL_TO_CRNL) { + regs.serial_out(b'\r')?; + } + regs.serial_out(byte)?; + } + Ok(bytes.len()) + } + + fn set_baud_rate(&self, baud: u32) -> Result<(), Error> { + let mut regs = self.regs.lock(); + regs.set_baud_rate(baud) + } + + fn baud_rate(&self) -> u32 { + let regs = self.regs.lock(); + regs.baud_rate + } +} + +impl PortRegs { + fn init(&mut self, vendor: Vendor, baud_rate: u32) -> Result<(), Error> { + if vendor == Vendor::DwApbUart { + self.write(DW_REG_SRR, 1); + delay(); + self.write(DW_REG_HTX, 0); + delay(); + + // wait while DW USR.BUSY == 1 + while self.read(DW_REG_USR) & (1 << 0) != 0 { + core::hint::spin_loop(); + } + } + + self.set_baud_rate(baud_rate) + } + + fn serial_out(&mut self, byte: u8) -> Result<(), Error> { + let mut timeout = 1000000; + while timeout > 0 && self.read(REG_LSR) & LSR_TEMT == 0 { + timeout -= 1; + } + if timeout == 0 { + return Err(Error::TimedOut); + } + self.write(REG_THR, byte); + Ok(()) + } + + fn set_baud_rate(&mut self, baud_rate: u32) -> Result<(), Error> { + // TODO check that the divisor actually fits + + self.baud_rate = baud_rate; + + let divisor = (self.input_clock.0 / (baud_rate as u64 * 16)) as u32; + + // Disable interrupts, clear FCR/MCR + self.write(REG_IER, 0x00); + self.write(REG_MCR, 0x00); + self.write(REG_FCR, 0x00); + + // Program divisor + // DLAB=1 + let lcr = self.read(REG_LCR); + self.write(REG_LCR, lcr | LCR_DLAB); + self.write(REG_DLH, ((divisor >> 8) & 0xFF) as u8); + self.write(REG_DLL, (divisor & 0xFF) as u8); + delay(); + let lcr = self.read(REG_LCR); + self.write(REG_LCR, lcr & !LCR_DLAB); + delay(); + + // 8n1 setting + let lcr = self.read(REG_LCR); + self.write(REG_LCR, lcr | LCR_BITS_8); + delay(); + + // DTR+RTS + self.write(REG_MCR, MCR_DTR | MCR_RTS); + + // Enable and drain FIFO + self.write(REG_FCR, FCR_FIFO_ENABLE); + delay(); + let fcr = self.read(REG_FCR); + self.write(REG_FCR, fcr | FCR_RX_FIFO_RESET | FCR_TX_FIFO_RESET); + delay(); + // TODO flush Rx + Ok(()) + } +} + +impl Deref for PortRegs { + type Target = A; + + fn deref(&self) -> &Self::Target { + &self.regs + } +} + +impl DerefMut for PortRegs { + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.regs + } +} + +fn delay() { + for _ in 0..10000 { + core::hint::spin_loop(); + } +} diff --git a/kernel/lib/device-tree/src/driver/tree.rs b/kernel/lib/device-tree/src/driver/tree.rs index 55a78b65..511e8e87 100644 --- a/kernel/lib/device-tree/src/driver/tree.rs +++ b/kernel/lib/device-tree/src/driver/tree.rs @@ -105,18 +105,18 @@ impl Node { .as_str_list() .find_map(|c| drivers.iter().find(|d| d.matches(c))); - if libk::config::get().device_tree.log_missing && driver.is_none() { - // FIXME don't spam virtio missing stuff - if !name.is_some_and(|n| n.starts_with("virtio_mmio")) { - for (i, compatible) in compatible.as_str_list().enumerate() { - if i == 0 { - log::warn!("No driver for {name:?} ({compatible:?})"); - } else { - log::warn!(" also {compatible:?}"); - } - } - } - } + // if libk::config::get().device_tree.log_missing && driver.is_none() { + // // FIXME don't spam virtio missing stuff + // if !name.is_some_and(|n| n.starts_with("virtio_mmio")) { + // for (i, compatible) in compatible.as_str_list().enumerate() { + // if i == 0 { + // log::warn!("No driver for {name:?} ({compatible:?})"); + // } else { + // log::warn!(" also {compatible:?}"); + // } + // } + // } + // } let driver = driver?; // Initialize default pinctrl before probing diff --git a/kernel/libk/src/device/display/console.rs b/kernel/libk/src/device/display/console.rs index 6fd97d58..8be07ca3 100644 --- a/kernel/libk/src/device/display/console.rs +++ b/kernel/libk/src/device/display/console.rs @@ -8,7 +8,11 @@ use libk_util::{ StaticVector, sync::{IrqSafeSpinlock, spin_rwlock::IrqSafeRwLock}, }; -use yggdrasil_abi::{error::Error, io::TerminalSize, primitive_enum}; +use yggdrasil_abi::{ + error::Error, + io::{TerminalOutputOptions, TerminalSize}, + primitive_enum, +}; use crate::{task::runtime, vfs::TerminalOutput}; @@ -520,7 +524,8 @@ impl TerminalOutput for ConsoleWrapper { TerminalSize { rows, columns } } - fn write(&self, byte: u8) -> Result<(), Error> { + fn write(&self, byte: u8, _options: &TerminalOutputOptions) -> Result<(), Error> { + // TODO handle options self.0.write_char(byte); Ok(()) } diff --git a/kernel/libk/src/vfs/pty.rs b/kernel/libk/src/vfs/pty.rs index 40e7b320..07e9205a 100644 --- a/kernel/libk/src/vfs/pty.rs +++ b/kernel/libk/src/vfs/pty.rs @@ -11,7 +11,7 @@ use async_trait::async_trait; use libk_util::{ring::BlockingRingQueue, sync::spin_rwlock::IrqSafeRwLock}; use yggdrasil_abi::{ error::Error, - io::{TerminalOptions, TerminalSize}, + io::{TerminalOptions, TerminalOutputOptions, TerminalSize}, }; use super::{ @@ -28,11 +28,16 @@ struct PtyOutput { } impl TerminalOutput for PtyOutput { - fn write(&self, byte: u8) -> Result<(), Error> { + // TODO options + fn write(&self, byte: u8, _options: &TerminalOutputOptions) -> Result<(), Error> { block!(self.ring.write(byte).await) } - fn write_multiple(&self, bytes: &[u8]) -> Result { + fn write_multiple( + &self, + bytes: &[u8], + _options: &TerminalOutputOptions, + ) -> Result { block!(self.ring.write_all(bytes).await)?; Ok(bytes.len()) } diff --git a/kernel/libk/src/vfs/terminal.rs b/kernel/libk/src/vfs/terminal.rs index e4c2a119..077b26b3 100644 --- a/kernel/libk/src/vfs/terminal.rs +++ b/kernel/libk/src/vfs/terminal.rs @@ -41,7 +41,7 @@ pub struct TerminalInput { // Program -> screen, PTY master, terminal, etc. pub trait TerminalOutput: Sync + Send { - fn write(&self, byte: u8) -> Result<(), Error>; + fn write(&self, byte: u8, options: &TerminalOutputOptions) -> Result<(), Error>; fn notify_readers(&self) {} @@ -56,10 +56,14 @@ pub trait TerminalOutput: Sync + Send { Err(Error::InvalidOperation) } - fn write_multiple(&self, bytes: &[u8]) -> Result { + fn write_multiple( + &self, + bytes: &[u8], + options: &TerminalOutputOptions, + ) -> Result { let mut written = 0; for &byte in bytes { - self.write(byte)?; + self.write(byte, options)?; written += 1; } Ok(written) @@ -126,12 +130,14 @@ impl Terminal { } pub fn putc_to_output(&self, byte: u8) -> Result<(), Error> { - self.output.write(byte) + let options = self.config.read().output; + self.output.write(byte, &options) } pub fn write_to_output(&self, buffer: &[u8]) -> Result { + let options = self.config.read().output; // TODO handle options - self.output.write_multiple(buffer) + self.output.write_multiple(buffer, &options) } pub fn write_to_input(&self, mut byte: u8) { @@ -151,7 +157,9 @@ impl Terminal { buffer.erase_pending() && config.line.contains(TerminalLineOptions::ECHO_ERASE); if echo { - self.output.write_multiple(b"\x1B[D \x1B[D").ok(); + self.output + .write_multiple(b"\x1B[D \x1B[D", &config.output) + .ok(); } return; @@ -160,17 +168,16 @@ impl Terminal { if byte == b'\n' { // TODO NL_TO_CRNL if config.is_echo_newline() { - if config.output.contains(TerminalOutputOptions::NL_TO_CRNL) { - self.output.write(b'\r').ok(); - } - self.output.write(byte).ok(); + self.output.write(byte, &config.output).ok(); } } else if byte.is_ascii_control() { if config.line.contains(TerminalLineOptions::ECHO) { - self.output.write_multiple(&[b'^', byte + 0x40]).ok(); + self.output + .write_multiple(&[b'^', byte + 0x40], &config.output) + .ok(); } } else if config.line.contains(TerminalLineOptions::ECHO) { - self.output.write(byte).ok(); + self.output.write(byte, &config.output).ok(); } if byte == config.chars.interrupt { diff --git a/kernel/src/arch/riscv64/mod.rs b/kernel/src/arch/riscv64/mod.rs index 36c6a492..343f569b 100644 --- a/kernel/src/arch/riscv64/mod.rs +++ b/kernel/src/arch/riscv64/mod.rs @@ -168,6 +168,11 @@ impl Riscv64 { if is_bsp { call_init_array(); + unsafe extern "C" { + static __kernel_start: u8; + } + log::info!("Boot address: {:#x}", (&raw const __kernel_start).addr()); + atomic::compiler_fence(Ordering::SeqCst); libk::debug::init(); diff --git a/kernel/src/arch/x86/mod.rs b/kernel/src/arch/x86/mod.rs index 9e7e79df..38c7e298 100644 --- a/kernel/src/arch/x86/mod.rs +++ b/kernel/src/arch/x86/mod.rs @@ -20,8 +20,12 @@ use libk_mm::{ phys::{self, PhysicalMemoryRegion}, table::EntryLevelExt, }; -use peripherals::{i8253::I8253, ps2::PS2Controller, rtc::Rtc, serial::ComPort}; +use peripherals::{i8253::I8253, ps2::PS2Controller, rtc::Rtc}; use ygg_driver_pci::PciBusManager; +use ygg_driver_serial_8250::{ + Uart8250, + io::{Io8250Access, Io8250Config}, +}; use crate::fs::{INITRD_DATA, Initrd}; @@ -43,8 +47,8 @@ struct ProbeClockSource { } pub struct EarlyPlatformDevices { - pub com1_3: Arc, - + com1_3: Arc>, + com2_4: Arc>, clock_sources: Vec, } @@ -72,12 +76,18 @@ pub fn init_platform_early(cmdline: &str) -> Result // Initialize async executor queue runtime::init_task_queue(); - let com1_3 = ComPort::setup( - dummy_init_context(), - 0x3F8, - 0x3E8, - Irq::External(ISA_IRQ_OFFSET + 4), - )?; + let com1_3_config = Io8250Config::new(0x3F8, 0x3E8, Irq::External(ISA_IRQ_OFFSET + 4)); + let com2_4_config = Io8250Config::new(0x2F8, 0x2E8, Irq::External(ISA_IRQ_OFFSET + 3)); + + let com1_3 = Arc::new(Uart8250::::new( + com1_3_config, + ygg_driver_serial_8250::Vendor::Generic8250, + )); + unsafe { com1_3.init_inner() }?; + let com2_4 = Arc::new(Uart8250::::new( + com2_4_config, + ygg_driver_serial_8250::Vendor::Generic8250, + )); // let i8259 = I8259::setup().expect("Could not initialize i8259 PIC"); // disable_i8259(); @@ -85,6 +95,7 @@ pub fn init_platform_early(cmdline: &str) -> Result Ok(EarlyPlatformDevices { com1_3, + com2_4, clock_sources: Vec::new(), }) } @@ -116,8 +127,14 @@ pub fn init_platform_devices(early: EarlyPlatformDevices) { if let Err(error) = Rtc::setup() { log::error!("RTC init error: {error:?}"); } - if let Err(error) = unsafe { early.com1_3.port_a().clone().init_irq() } { - log::error!("COM port IRQ init error: {error:?}"); + if let Err(error) = unsafe { early.com2_4.init_inner() } { + log::error!("COM port 2/4 init error: {error:?}"); + } + if let Err(error) = unsafe { early.com1_3.init_irq() } { + log::error!("COM port 1/3 IRQ init error: {error:?}"); + } + if let Err(error) = unsafe { early.com2_4.init_irq() } { + log::error!("COM port 2/4 IRQ init error: {error:?}"); } if let Err(error) = PciBusManager::probe_bus_devices() { diff --git a/kernel/src/arch/x86/peripherals/mod.rs b/kernel/src/arch/x86/peripherals/mod.rs index 6c3b4653..e80d38ab 100644 --- a/kernel/src/arch/x86/peripherals/mod.rs +++ b/kernel/src/arch/x86/peripherals/mod.rs @@ -1,7 +1,6 @@ pub mod i8253; pub mod ps2; pub mod rtc; -pub mod serial; #[cfg(any(target_arch = "x86_64", rust_analyzer))] pub mod hpet; diff --git a/kernel/src/arch/x86/peripherals/serial.rs b/kernel/src/arch/x86/peripherals/serial.rs deleted file mode 100644 index c9ed5298..00000000 --- a/kernel/src/arch/x86/peripherals/serial.rs +++ /dev/null @@ -1,218 +0,0 @@ -//! Driver for x86 COM ports -use abi::{error::Error, io::TerminalOptions}; -use alloc::sync::Arc; -use device_api::{ - device::{Device, DeviceInitContext}, - interrupt::{InterruptHandler, Irq, IrqVector}, -}; -use kernel_arch_x86::intrinsics::{IoPort, IoPortAccess}; -use libk::{ - debug::DebugSink, - device::{external_interrupt_controller, manager::DEVICE_REGISTRY}, - vfs::{Terminal, TerminalInput, TerminalOutput}, -}; -use libk_util::sync::IrqSafeSpinlock; - -// Single port -struct Regs { - dr: IoPort, - lsr: IoPort, - lcr: IoPort, - ier: IoPort, - isr: IoPort, - - baud_rate: u32, -} - -struct PortInner { - regs: IrqSafeSpinlock, -} - -/// Single port of the COM port pair -pub struct Port { - terminal: Arc>, - irq: Irq, -} - -/// COM port pair -#[allow(unused)] -pub struct ComPort { - port_a: Arc, - port_b: Arc, -} - -impl Regs { - fn write(&mut self, byte: u8) -> Result<(), Error> { - while self.lsr.read() & Port::LSR_THRE == 0 { - core::hint::spin_loop(); - } - - self.dr.write(byte); - Ok(()) - } -} - -impl PortInner { - fn handle_irq(&self) -> Option { - let (status, value) = { - let inner = self.regs.lock(); - let status = inner.isr.read(); - let value = inner.dr.read(); - (status, value) - }; - - if status & Port::ISR_IRQ_MASK != 0 { - Some(value) - } else { - None - } - } -} - -impl TerminalOutput for PortInner { - fn write(&self, byte: u8) -> Result<(), Error> { - self.regs.lock().write(byte) - } - - fn write_multiple(&self, bytes: &[u8]) -> Result { - let mut regs = self.regs.lock(); - for &b in bytes { - regs.write(b)?; - } - Ok(bytes.len()) - } - - fn baud_rate(&self) -> u32 { - self.regs.lock().baud_rate - } - - fn set_baud_rate(&self, baud: u32) -> Result<(), Error> { - if baud > 115200 { - log::warn!("Tried to set baud rate for COM port beyond 115200: {baud}"); - return Err(Error::InvalidArgument); - } - - let div = 115200 / baud; - - let mut regs = self.regs.lock(); - - regs.lcr.write(regs.lcr.read() | (1 << 7)); - regs.dr.write(div as u8); - regs.ier.write((div >> 8) as u8); - regs.lcr.write(regs.lcr.read() & !(1 << 7)); - - regs.baud_rate = baud; - - Ok(()) - } -} - -impl DebugSink for Port { - fn putc(&self, c: u8) -> Result<(), Error> { - self.terminal.putc_to_output(c).ok(); - Ok(()) - } - - fn puts(&self, s: &str) -> Result<(), Error> { - self.terminal.write_to_output(s.as_bytes()).ok(); - Ok(()) - } - - fn supports_control_sequences(&self) -> bool { - true - } -} - -impl InterruptHandler for Port { - fn handle_irq(self: Arc, _vector: IrqVector) -> bool { - let inner = self.terminal.output(); - if let Some(byte) = inner.handle_irq() { - self.terminal.write_to_input(byte); - true - } else { - false - } - } -} - -impl Device for Port { - fn display_name(&self) -> &'static str { - "COM port" - } - - unsafe fn init(self: Arc, _cx: DeviceInitContext) -> Result<(), Error> { - self.terminal.output().set_baud_rate(115200)?; - - DEVICE_REGISTRY - .serial_terminal - .register(self.terminal.clone(), Some(self.clone())) - .ok(); - Ok(()) - } - - unsafe fn init_irq(self: Arc) -> Result<(), Error> { - let intc = external_interrupt_controller()?; - - // TODO check that the same IRQ is not bound already for another port - intc.register_irq(self.irq, Default::default(), self.clone())?; - intc.enable_irq(self.irq)?; - - let regs = self.terminal.output().regs.lock(); - - regs.ier.modify(|v| v | Self::IER_RXDA); - - Ok(()) - } -} - -impl Port { - const LSR_THRE: u8 = 1 << 5; - const IER_RXDA: u8 = 1 << 0; - const ISR_IRQ_MASK: u8 = 3 << 1; - - fn new(base: u16, irq: Irq) -> Result { - let input = TerminalInput::with_capacity(64)?; - let output = PortInner { - regs: IrqSafeSpinlock::new(Regs { - dr: IoPort::new(base), - lsr: IoPort::new(base + 5), - ier: IoPort::new(base + 1), - isr: IoPort::new(base + 2), - lcr: IoPort::new(base + 3), - - baud_rate: 0, - }), - }; - let terminal = Terminal::from_parts(TerminalOptions::const_default(), input, output); - Ok(Self { - terminal: Arc::new(terminal), - irq, - }) - } -} - -impl ComPort { - /// Constructs a COM port pair - fn new(port_a: u16, port_b: u16, irq: Irq) -> Result { - Ok(Self { - port_a: Arc::new(Port::new(port_a, irq)?), - port_b: Arc::new(Port::new(port_b, irq)?), - }) - } - - pub fn setup( - cx: DeviceInitContext, - port_a: u16, - port_b: u16, - irq: Irq, - ) -> Result, Error> { - let this = Arc::new(Self::new(port_a, port_b, irq)?); - unsafe { this.port_a().clone().init(cx) }?; - Ok(this) - } - - /// Returns a reference to the A port of this COM pair - pub fn port_a(&self) -> &Arc { - &self.port_a - } -} diff --git a/kernel/src/device/mod.rs b/kernel/src/device/mod.rs index a8b5ef0a..4cdc61f0 100644 --- a/kernel/src/device/mod.rs +++ b/kernel/src/device/mod.rs @@ -7,7 +7,6 @@ pub mod bus; pub mod clock; pub mod display; pub mod power; -pub mod serial; // pub mod timer; #[cfg(any(rust_analyzer, not(target_arch = "x86_64")))] diff --git a/kernel/src/device/serial/mod.rs b/kernel/src/device/serial/mod.rs deleted file mode 100644 index 7a3c5a5a..00000000 --- a/kernel/src/device/serial/mod.rs +++ /dev/null @@ -1,6 +0,0 @@ -//! Serial device interfaces - -#[cfg(any(target_arch = "riscv64", rust_analyzer))] -pub mod ns16550a; -#[cfg(any(target_arch = "riscv64", rust_analyzer))] -pub mod snps_dw_apb_uart; diff --git a/kernel/src/device/serial/ns16550a.rs b/kernel/src/device/serial/ns16550a.rs deleted file mode 100644 index 6d3752c8..00000000 --- a/kernel/src/device/serial/ns16550a.rs +++ /dev/null @@ -1,204 +0,0 @@ -//! 16550-style UART device driver -use abi::{error::Error, io::TerminalOptions}; -use alloc::sync::Arc; -use device_api::{ - device::{Device, DeviceInitContext}, - interrupt::{InterruptHandler, IrqHandle, IrqVector}, -}; -use device_tree::driver::{Node, ProbeContext, device_tree_driver}; -use libk::{ - debug::DebugSink, - device::manager::DEVICE_REGISTRY, - vfs::{Terminal, TerminalInput, TerminalOutput}, -}; -use libk_mm::{address::PhysicalAddress, device::DeviceMemoryIo}; -use libk_util::{OneTimeInit, sync::IrqSafeSpinlock}; -use tock_registers::{ - interfaces::{ReadWriteable, Readable, Writeable}, - register_bitfields, register_structs, - registers::{ReadOnly, ReadWrite, WriteOnly}, -}; - -register_bitfields!( - u8, - IER [ - /// Received data ready - RDR OFFSET(0) NUMBITS(1) [], - /// Trasmitter holding register empty - THRE OFFSET(1) NUMBITS(1) [], - /// Receiver line status - RLS OFFSET(2) NUMBITS(1) [], - /// Modem status - MS OFFSET(3) NUMBITS(1) [], - ], - LSR [ - /// Data ready indicator - DR OFFSET(0) NUMBITS(1) [], - /// Transmitter FIFO empty - TFE OFFSET(5) NUMBITS(1) [], - ], - LCR [ - BITS OFFSET(0) NUMBITS(2) [ - Bits8 = 3 - ], - STOPBITS OFFSET(2) NUMBITS(1) [], - PARITY OFFSET(3) NUMBITS(1) [], - PARITY_EVEN OFFSET(4) NUMBITS(1) [], - PARITY_STICK OFFSET(5) NUMBITS(1) [], - BREAK OFFSET(6) NUMBITS(1) [], - DLAB OFFSET(7) NUMBITS(1) [], - ] -); - -register_structs! { - #[allow(non_snake_case)] - Regs { - // Read: receive buffer, write: transmit buffer - (0x00 => DR: ReadWrite), - (0x01 => IER: ReadWrite), - // Read: interrupt idenditication, write: FIFO control - (0x02 => FCR: ReadWrite), - (0x03 => LCR: ReadWrite), - (0x04 => MCR: WriteOnly), - (0x05 => LSR: ReadOnly), - (0x06 => MSR: ReadOnly), - (0x07 => _0), - (0x08 => @END), - } -} - -struct Io { - regs: DeviceMemoryIo<'static, Regs>, -} - -struct Inner { - io: IrqSafeSpinlock, -} - -/// ns16550a-style UART driver -pub struct Ns16550a { - inner: OneTimeInit>>, - base: PhysicalAddress, - irq: IrqHandle, -} - -impl Io { - fn init(&mut self) { - self.regs.LCR.write( - LCR::BITS::Bits8 + LCR::BREAK::CLEAR + LCR::STOPBITS::CLEAR + LCR::PARITY::CLEAR, - ); - self.regs.IER.set(0); - } - - fn send(&mut self, byte: u8) { - while self.regs.LSR.matches_all(LSR::TFE::CLEAR) { - core::hint::spin_loop(); - } - self.regs.DR.set(byte); - } - - fn handle_irq(&self) -> Option { - let status = self.regs.FCR.get() & 0xF; - if status == 0b1100 || status == 0b0100 { - Some(self.regs.DR.get()) - } else { - None - } - } -} - -impl Device for Ns16550a { - unsafe fn init(self: Arc, _cx: DeviceInitContext) -> Result<(), Error> { - log::info!("Init ns16550a @ {:#x}", self.base); - let mut io = Io { - regs: DeviceMemoryIo::map(self.base, Default::default())?, - }; - io.init(); - - let input = TerminalInput::with_capacity(64)?; - let output = Inner { - io: IrqSafeSpinlock::new(io), - }; - - let terminal = self.inner.init(Arc::new(Terminal::from_parts( - TerminalOptions::const_default(), - input, - output, - ))); - - DEVICE_REGISTRY - .serial_terminal - .register(terminal.clone(), Some(self.clone())) - .ok(); - - Ok(()) - } - - unsafe fn init_irq(self: Arc) -> Result<(), Error> { - self.irq.register(self.clone())?; - self.irq.enable()?; - let io = self.inner.get().output().io.lock(); - io.regs.IER.modify(IER::RDR::SET); - Ok(()) - } - - fn display_name(&self) -> &str { - "ns16550a UART" - } -} - -impl InterruptHandler for Ns16550a { - fn handle_irq(self: Arc, _vector: IrqVector) -> bool { - let inner = self.inner.get(); - let output = inner.output(); - let byte = output.io.lock().handle_irq(); - if let Some(byte) = byte { - inner.write_to_input(byte); - true - } else { - false - } - } -} - -impl TerminalOutput for Inner { - fn write(&self, byte: u8) -> Result<(), Error> { - self.io.lock().send(byte); - Ok(()) - } - - fn write_multiple(&self, bytes: &[u8]) -> Result { - let mut lock = self.io.lock(); - for &byte in bytes { - lock.send(byte); - } - Ok(bytes.len()) - } -} - -impl DebugSink for Ns16550a { - fn putc(&self, c: u8) -> Result<(), Error> { - self.inner.get().putc_to_output(c) - } - - fn supports_control_sequences(&self) -> bool { - true - } -} - -device_tree_driver!( - compatible: ["ns16550a"], - driver: { - fn probe(&self, node: &Arc, context: &mut ProbeContext) -> Option> { - let base = node.map_base(context, 0)?; - log::debug!("ns16550a base = {base:#x}"); - let irq = node.interrupt(0)?; - - Some(Arc::new(Ns16550a { - base, - irq, - inner: OneTimeInit::new(), - })) - } - } -); diff --git a/kernel/src/device/serial/snps_dw_apb_uart.rs b/kernel/src/device/serial/snps_dw_apb_uart.rs deleted file mode 100644 index c19bf55c..00000000 --- a/kernel/src/device/serial/snps_dw_apb_uart.rs +++ /dev/null @@ -1,304 +0,0 @@ -//! Synopsys DesignWare 8250 driver -use abi::{error::Error, io::TerminalOptions}; -use alloc::sync::Arc; -use device_api::{ - clock::{ClockHandle, Hertz, ResetHandle}, - device::{Device, DeviceInitContext}, - interrupt::{InterruptHandler, IrqHandle, IrqVector}, -}; -use device_tree::driver::{Node, ProbeContext, device_tree_driver}; -use libk::{ - debug::{self, DebugSink}, - device::manager::DEVICE_REGISTRY, - vfs::{Terminal, TerminalInput, TerminalOutput}, -}; -use libk_mm::{address::PhysicalAddress, device::DeviceMemoryIo}; -use libk_util::{OneTimeInit, sync::IrqSafeSpinlock}; -use tock_registers::{ - interfaces::{ReadWriteable, Readable, Writeable}, - register_bitfields, register_structs, - registers::{ReadOnly, ReadWrite, WriteOnly}, -}; - -register_bitfields! { - u32, - LCR [ - DLAB OFFSET(7) NUMBITS(1) [], - DLS OFFSET(0) NUMBITS(2) [ - DL8b = 0b11, - ], - ], - IER [ - PTIME OFFSET(7) NUMBITS(1) [], - EDSSI OFFSET(3) NUMBITS(1) [], - ELSI OFFSET(2) NUMBITS(1) [], - // Transmit buffer available - ETBEI OFFSET(1) NUMBITS(1) [], - // Receive data available - ERBFI OFFSET(0) NUMBITS(1) [], - ], - LSR [ - // Data ready bit - DR OFFSET(0) NUMBITS(1) [], - // Transmitter holding register empty - THRE OFFSET(5) NUMBITS(1) [], - ], - USR [ - BUSY OFFSET(0) NUMBITS(1) [], - ] -} - -register_structs! { - #[allow(non_snake_case)] - Regs { - // DLAB=0, Write: transmitter holding register/Read: receiver buffer register - // DLAB=1, Read/Write: divisor latch low - (0x000 => DR: ReadWrite), - // DLAB=0: Interrupt enable register - // DLAB=1: Divisor latch high - (0x004 => IER: ReadWrite), - // Read: interrupt identification register/Write: frame control register - (0x008 => IIR: ReadWrite), - // Line control register - (0x00C => LCR: ReadWrite), - // Modem control register - (0x010 => MCR: ReadWrite), - // Line status register - (0x014 => LSR: ReadOnly), - // Modem status register - (0x018 => MSR: ReadOnly), - // Scratchpad - (0x01C => SCR: ReadWrite), - // Low-power divisor latch low - (0x020 => LPDLL: ReadWrite), - // Low-power divisor latch high - (0x024 => LPDLH: ReadWrite), - (0x028 => _0), - // Shadow receive/transmit buffer - (0x030 => SDR: [ReadWrite; 16]), - (0x070 => FAR: ReadWrite), - (0x074 => TFR: ReadOnly), - (0x078 => RFW: WriteOnly), - (0x07C => USR: ReadOnly), - (0x080 => TFL: ReadOnly), - (0x084 => RFL: ReadOnly), - (0x088 => SRR: WriteOnly), - (0x08C => SRTS: ReadWrite), - (0x090 => SBCR: ReadWrite), - (0x094 => SDMAM: ReadWrite), - (0x098 => SFE: ReadWrite), - (0x09C => SRT: ReadWrite), - (0x0A0 => STET: ReadWrite), - (0x0A4 => HTX: ReadWrite), - (0x0A8 => DMASA: WriteOnly), - (0x0AC => _1), - (0x0F4 => CPR: ReadOnly), - (0x0F8 => UCV: ReadOnly), - (0x0FC => CTR: ReadOnly), - (0x100 => @END), - } -} - -struct Io { - regs: DeviceMemoryIo<'static, Regs>, -} - -struct Inner { - io: IrqSafeSpinlock, -} - -/// Synopsys DesignWare 8250 UART -pub struct DwUart { - base: PhysicalAddress, - irq: IrqHandle, - clk_baud: ClockHandle, - #[allow(unused)] - clk_apb: Option, - rst: Option, - - inner: OneTimeInit>>, -} - -impl Io { - fn send(&mut self, byte: u8) { - // TODO - if byte == b'\n' { - self.send(b'\r'); - } - - while !self.regs.LSR.matches_all(LSR::THRE::SET) { - core::hint::spin_loop(); - } - self.regs.DR.set(byte as u32); - } - - fn init(&mut self, baud_clock: Hertz, baud_rate: u64) { - let divisor = (baud_clock.0 / (baud_rate * 16)) as u32; - - self.wait_busy(); - self.regs.IER.set(0); - for _ in 0..100 { - let _ = self.regs.LSR.get(); - } - for _ in 0..100 { - let _ = self.regs.DR.get(); - } - self.wait_busy(); - self.regs.LCR.write(LCR::DLAB::SET); - self.wait_busy(); - self.regs.DR.set(divisor & 0xFF); - self.regs.IER.set((divisor >> 8) & 0xFF); - self.wait_busy(); - self.regs.LCR.write(LCR::DLS::DL8b); - self.wait_busy(); - self.regs.IIR.set(0x01); - self.wait_busy(); - self.regs.MCR.set(0x00); - let _ = self.regs.LSR.get(); - for _ in 0..100 { - let _ = self.regs.DR.get(); - } - self.regs.SCR.set(0x00); - } - - fn handle_irq(&mut self) -> Option { - let status = self.regs.IIR.get(); - - if status & 0xF == 4 { - Some(self.regs.DR.get() as u8) - } else { - None - } - } - - fn wait_busy(&self) { - for _ in 0..100000 { - core::hint::spin_loop(); - } - let mut timeout = 1000000; - while timeout > 0 && self.regs.USR.matches_all(USR::BUSY::SET) { - core::hint::spin_loop(); - timeout -= 1; - } - } -} - -impl InterruptHandler for DwUart { - fn handle_irq(self: Arc, _vector: IrqVector) -> bool { - let inner = self.inner.get(); - let output = inner.output(); - let byte = output.io.lock().handle_irq(); - - if let Some(byte) = byte { - inner.write_to_input(byte); - true - } else { - false - } - } -} - -impl Device for DwUart { - unsafe fn init(self: Arc, _cx: DeviceInitContext) -> Result<(), Error> { - let baud_rate = 115200; - let clk_baud_rate = self.clk_baud.rate()?; - - // Prevent firmware (SBI in riscv64) from printing to UART while it's being - // reset/initialized - let guard = debug::MuteGuard::acquire(); - - let regs = DeviceMemoryIo::::map(self.base, Default::default())?; - let mut io = Io { regs }; - - if let Some(reset) = self.rst.as_ref() { - reset.assert_for_cycles(100000)?; - } - - io.init(clk_baud_rate, baud_rate); - - io.send(b'\r'); - io.send(b'\n'); - - drop(guard); - - let input = TerminalInput::with_capacity(64)?; - let output = Inner { - io: IrqSafeSpinlock::new(io), - }; - - let terminal = self.inner.init(Arc::new(Terminal::from_parts( - TerminalOptions::const_default(), - input, - output, - ))); - - DEVICE_REGISTRY - .serial_terminal - .register(terminal.clone(), Some(self.clone())) - .ok(); - - Ok(()) - } - - unsafe fn init_irq(self: Arc) -> Result<(), Error> { - self.irq.register(self.clone())?; - self.irq.enable()?; - - let output = self.inner.get().output(); - let io = output.io.lock(); - io.regs.IER.modify(IER::ERBFI::SET); - Ok(()) - } - - fn display_name(&self) -> &str { - "Synopsys DesignWare 8250 UART" - } -} - -impl DebugSink for DwUart { - fn putc(&self, c: u8) -> Result<(), Error> { - self.inner.get().putc_to_output(c) - } - - fn supports_control_sequences(&self) -> bool { - true - } -} - -impl TerminalOutput for Inner { - fn write(&self, byte: u8) -> Result<(), Error> { - self.io.lock().send(byte); - Ok(()) - } - - fn write_multiple(&self, bytes: &[u8]) -> Result { - let mut lock = self.io.lock(); - for &byte in bytes { - lock.send(byte); - } - Ok(bytes.len()) - } -} - -device_tree_driver! { - compatible: ["snps,dw-apb-uart"], - driver: { - fn probe(&self, node: &Arc, context: &mut ProbeContext) -> Option> { - let base = node.map_base(context, 0)?; - let irq = node.interrupt(0)?; - let clk_baud = node.named_clock("baudclk")?; - let clk_apb = node.named_clock("apb_pclk"); - let rst = node.reset(0); - - Some(Arc::new(DwUart { - base, - irq, - clk_baud, - clk_apb, - rst, - - inner: OneTimeInit::new() - })) - } - } -} diff --git a/kernel/src/main.rs b/kernel/src/main.rs index 1f7cb4f8..2a0f843e 100644 --- a/kernel/src/main.rs +++ b/kernel/src/main.rs @@ -65,6 +65,7 @@ extern crate compiler_builtins; extern crate ygg_driver_ahci; extern crate ygg_driver_net_rtl81xx; extern crate ygg_driver_nvme; +extern crate ygg_driver_serial_8250; extern crate ygg_driver_usb_xhci; extern crate ygg_driver_virtio_blk; extern crate ygg_driver_virtio_gpu; diff --git a/userspace/lib/cross/src/io.rs b/userspace/lib/cross/src/io.rs index b5fe2ed9..7ce58ac8 100644 --- a/userspace/lib/cross/src/io.rs +++ b/userspace/lib/cross/src/io.rs @@ -154,6 +154,14 @@ impl RawStdin { pub fn set_options(&mut self, options: TerminalOptionsImpl) -> io::Result { self.0.set_options(options) } + + pub fn options(&mut self) -> io::Result { + self.0.options() + } + + pub fn saved_options(&self) -> &TerminalOptionsImpl { + self.0.saved_options() + } } impl Read for RawStdin { diff --git a/userspace/lib/cross/src/sys/mod.rs b/userspace/lib/cross/src/sys/mod.rs index bd7cd323..4f17da87 100644 --- a/userspace/lib/cross/src/sys/mod.rs +++ b/userspace/lib/cross/src/sys/mod.rs @@ -48,6 +48,8 @@ pub(crate) trait Pipe: Read + Write + AsRawFd + Sized { pub(crate) trait RawStdin: Sized + Read + AsRawFd { fn open() -> io::Result; fn set_options(&mut self, options: TerminalOptionsImpl) -> io::Result; + fn options(&mut self) -> io::Result; + fn saved_options(&self) -> &TerminalOptionsImpl; // fn new(stdin: &'a mut Stdin) -> io::Result; } @@ -66,6 +68,10 @@ pub trait TerminalOptions: Copy { fn normal() -> Self; fn raw() -> Self; + // Output + fn set_nl_to_crnl(&mut self, set: bool); + + // Chars fn erase_char(&self) -> u8; fn word_erase_char(&self) -> u8; fn eof_char(&self) -> u8; diff --git a/userspace/lib/cross/src/sys/unix/mod.rs b/userspace/lib/cross/src/sys/unix/mod.rs index 8850df78..95a8f18a 100644 --- a/userspace/lib/cross/src/sys/unix/mod.rs +++ b/userspace/lib/cross/src/sys/unix/mod.rs @@ -23,7 +23,7 @@ pub use mem::{FileMappingImpl, SharedMemoryImpl}; pub use pid::PidFdImpl; pub use pipe::PipeImpl; pub use poll::PollImpl; -pub use pty::{open as open_pty, PtyMasterImpl, PtySlaveImpl, TerminalOptionsImpl}; +pub use pty::{PtyMasterImpl, PtySlaveImpl, TerminalOptionsImpl, open as open_pty}; pub use serial::SerialPortImpl; pub use socket::{BorrowedAddressImpl, LocalPacketSocketImpl, OwnedAddressImpl}; pub use term::RawStdinImpl; diff --git a/userspace/lib/cross/src/sys/unix/poll.rs b/userspace/lib/cross/src/sys/unix/poll.rs index e30552aa..13fa3bac 100644 --- a/userspace/lib/cross/src/sys/unix/poll.rs +++ b/userspace/lib/cross/src/sys/unix/poll.rs @@ -1,5 +1,5 @@ use std::{ - collections::{hash_map::Entry, HashMap}, + collections::{HashMap, hash_map::Entry}, io, mem::MaybeUninit, os::fd::{AsRawFd, FromRawFd, OwnedFd, RawFd}, diff --git a/userspace/lib/cross/src/sys/unix/pty.rs b/userspace/lib/cross/src/sys/unix/pty.rs index cc8e2a16..f2b86f62 100644 --- a/userspace/lib/cross/src/sys/unix/pty.rs +++ b/userspace/lib/cross/src/sys/unix/pty.rs @@ -56,6 +56,14 @@ impl TerminalOptions for TerminalOptionsImpl { this } + fn set_nl_to_crnl(&mut self, set: bool) { + if set { + self.c_oflag |= libc::ONLCR; + } else { + self.c_oflag &= !libc::ONLCR; + } + } + fn eof_char(&self) -> u8 { self.c_cc[libc::VEOF] } diff --git a/userspace/lib/cross/src/sys/unix/term.rs b/userspace/lib/cross/src/sys/unix/term.rs index 903c67fd..d9268322 100644 --- a/userspace/lib/cross/src/sys/unix/term.rs +++ b/userspace/lib/cross/src/sys/unix/term.rs @@ -78,6 +78,14 @@ impl RawStdin for RawStdinImpl { *t = options; }) } + + fn options(&mut self) -> io::Result { + todo!() + } + + fn saved_options(&self) -> &TerminalOptionsImpl { + todo!() + } } impl io::Read for RawStdinImpl { diff --git a/userspace/lib/cross/src/sys/yggdrasil/mod.rs b/userspace/lib/cross/src/sys/yggdrasil/mod.rs index 492e8c7c..a7d0eb82 100644 --- a/userspace/lib/cross/src/sys/yggdrasil/mod.rs +++ b/userspace/lib/cross/src/sys/yggdrasil/mod.rs @@ -18,7 +18,7 @@ use std::{ fd::RawFd, yggdrasil::{ process::CommandExt, - signal::{set_signal_handler, SignalHandler}, + signal::{SignalHandler, set_signal_handler}, }, }, process::Command, @@ -29,7 +29,7 @@ pub use mem::{FileMappingImpl, SharedMemoryImpl}; pub use pid::PidFdImpl; pub use pipe::PipeImpl; pub use poll::PollImpl; -pub use pty::{open as open_pty, PtyMasterImpl, PtySlaveImpl, TerminalOptionsImpl}; +pub use pty::{PtyMasterImpl, PtySlaveImpl, TerminalOptionsImpl, open as open_pty}; pub use serial::SerialPortImpl; pub use socket::{BorrowedAddressImpl, LocalPacketSocketImpl, OwnedAddressImpl}; pub use term::RawStdinImpl; diff --git a/userspace/lib/cross/src/sys/yggdrasil/pty.rs b/userspace/lib/cross/src/sys/yggdrasil/pty.rs index 594b6f2a..be1a7039 100644 --- a/userspace/lib/cross/src/sys/yggdrasil/pty.rs +++ b/userspace/lib/cross/src/sys/yggdrasil/pty.rs @@ -47,6 +47,14 @@ impl TerminalOptions for TerminalOptionsImpl { } } + fn set_nl_to_crnl(&mut self, set: bool) { + if set { + self.output |= TerminalOutputOptions::NL_TO_CRNL; + } else { + self.output &= !TerminalOutputOptions::NL_TO_CRNL; + } + } + fn eof_char(&self) -> u8 { self.chars.eof } diff --git a/userspace/lib/cross/src/sys/yggdrasil/socket.rs b/userspace/lib/cross/src/sys/yggdrasil/socket.rs index 28be530b..5b96f9cf 100644 --- a/userspace/lib/cross/src/sys/yggdrasil/socket.rs +++ b/userspace/lib/cross/src/sys/yggdrasil/socket.rs @@ -5,7 +5,7 @@ use std::{ }; use runtime::{ - abi::net::{types::LocalSocketAddress, AncillaryMessage, MessageHeader, MessageHeaderMut}, + abi::net::{AncillaryMessage, MessageHeader, MessageHeaderMut, types::LocalSocketAddress}, abi_serde::wire, rt as yggdrasil_rt, }; diff --git a/userspace/lib/cross/src/sys/yggdrasil/term.rs b/userspace/lib/cross/src/sys/yggdrasil/term.rs index ea54cdfe..91d897d6 100644 --- a/userspace/lib/cross/src/sys/yggdrasil/term.rs +++ b/userspace/lib/cross/src/sys/yggdrasil/term.rs @@ -37,6 +37,13 @@ impl Inner { let old = runtime::rt::io::terminal::update_terminal_options(fd, f)?; Ok(old) } + + fn options(&self) -> io::Result { + let fd = self.as_raw_fd(); + let options = runtime::rt::io::terminal::get_terminal_options(fd)?; + + Ok(options) + } } impl Read for Inner { @@ -67,6 +74,14 @@ impl RawStdin for RawStdinImpl { fn set_options(&mut self, options: TerminalOptions) -> io::Result { self.inner.update_options(|_| options) } + + fn options(&mut self) -> io::Result { + self.inner.options() + } + + fn saved_options(&self) -> &TerminalOptions { + &self.saved + } } impl io::Read for RawStdinImpl { diff --git a/userspace/lib/cross/src/term.rs b/userspace/lib/cross/src/term.rs index f1dc2959..2c179f99 100644 --- a/userspace/lib/cross/src/term.rs +++ b/userspace/lib/cross/src/term.rs @@ -79,6 +79,14 @@ impl TerminalInput { self.stdin.set_options(options) } + pub fn options(&mut self) -> io::Result { + self.stdin.options() + } + + pub fn saved_options(&self) -> &TerminalOptionsImpl { + self.stdin.saved_options() + } + fn take(&mut self, count: usize) { self.buffer.copy_within(count..self.buffer_len, 0); self.buffer_len -= count; diff --git a/userspace/sysutils/src/login.rs b/userspace/sysutils/src/login.rs index 9f7b3753..ba3f81ff 100644 --- a/userspace/sysutils/src/login.rs +++ b/userspace/sysutils/src/login.rs @@ -1,17 +1,38 @@ #![feature(yggdrasil_os, rustc_private)] use std::{ - env, - io::{self, BufRead, Write, stdin, stdout}, - os::{ - fd::AsRawFd, - yggdrasil::{io::terminal::start_terminal_session, rt::io::device}, - }, + io::{self, BufRead, Stdout, Write, stdin, stdout}, + os::{fd::AsRawFd, yggdrasil::io::terminal::start_terminal_session}, + path::PathBuf, process::{Command, ExitCode}, thread, time::Duration, }; +use clap::Parser; +use cross::io::{TerminalOptions, TerminalOptionsImpl}; +use runtime::rt::io::terminal; + +#[derive(Debug, Parser)] +struct Args { + #[clap( + short, + long, + help = "Serial terminal baud rate", + default_value_t = 115200 + )] + baud: u32, + #[clap( + short = 'N', + long, + help = "Convert NL to CR+NL", + default_value_t = true + )] + nl_to_crnl: bool, + + terminal: PathBuf, +} + fn login_readline( reader: &mut R, buf: &mut String, @@ -20,14 +41,26 @@ fn login_readline( reader.read_line(buf) } -fn login_as(username: &str, _password: &str) -> Result<(), io::Error> { +fn login_as_inner(username: &str, _password: &str) -> Result<(), io::Error> { let mut shell = Command::new("/bin/sh").arg("-l").spawn()?; println!("Hello {:?}", username); shell.wait()?; Ok(()) } -fn login_attempt(erase: bool) -> Result<(), io::Error> { +fn login_as( + stdout: Stdout, + options: &TerminalOptionsImpl, + username: &str, + password: &str, +) -> Result<(), io::Error> { + let old_termios = terminal::update_terminal_options(stdout.as_raw_fd(), |_| *options)?; + let result = login_as_inner(username, password); + terminal::set_terminal_options(stdout.as_raw_fd(), &old_termios)?; + result +} + +fn login_attempt(erase: bool, options: &TerminalOptionsImpl) -> Result<(), io::Error> { let stdin = stdin(); let mut stdout = stdout(); @@ -44,25 +77,29 @@ fn login_attempt(erase: bool) -> Result<(), io::Error> { return Ok(()); } - login_as(username.trim(), "") + login_as(stdout, options, username.trim(), "") } fn main() -> ExitCode { logsink::setup_logging(false); - let args: Vec<_> = env::args().skip(1).collect(); - if args.len() != 1 { - eprintln!("Usage: /sbin/login TTY"); - return ExitCode::FAILURE; - } - let terminal = args[0].as_str(); + let args = Args::parse(); + // let args: Vec<_> = env::args().skip(1).collect(); + // if args.len() != 1 { + // eprintln!("Usage: /sbin/login TTY"); + // return ExitCode::FAILURE; + // } // TODO check that `terminal` is a terminal - log::info!("Starting a session at {}", terminal); + log::info!("Starting a session at {}", args.terminal.display()); let mut success = false; for _ in 0..3 { - if let Err(err) = unsafe { start_terminal_session(terminal) } { - log::error!("{terminal}: {err:?}"); - eprintln!("Could not setup a session at {terminal}: {err:?}"); + if let Err(err) = unsafe { start_terminal_session(&args.terminal) } { + log::error!("{}: {:?}", args.terminal.display(), err); + eprintln!( + "Could not setup a session at {}: {:?}", + args.terminal.display(), + err + ); } else { success = true; break; @@ -74,21 +111,19 @@ fn main() -> ExitCode { return ExitCode::FAILURE; } + let mut terminal_options = TerminalOptionsImpl::normal(); + terminal_options.set_nl_to_crnl(args.nl_to_crnl); + let mut attempt_number = 0; loop { log::debug!("Login attempt {}", attempt_number); // "Attach" the terminal let group_id = std::os::yggdrasil::process::group_id(); - let mut buffer = [0; 8]; - device::device_request::( - stdin().as_raw_fd(), - &mut buffer, - &group_id, - ) - .expect("Could not attach the terminal"); + terminal::set_terminal_group(stdin().as_raw_fd(), group_id) + .expect("Could not set terminal group id"); - if let Err(err) = login_attempt(attempt_number % 3 == 0) { + if let Err(err) = login_attempt(attempt_number % 3 == 0, &terminal_options) { eprintln!("login: {}", err); } attempt_number += 1; diff --git a/userspace/tools/crypt/src/lib.rs b/userspace/tools/crypt/src/lib.rs index a5f81181..82276307 100644 --- a/userspace/tools/crypt/src/lib.rs +++ b/userspace/tools/crypt/src/lib.rs @@ -1,6 +1,6 @@ use std::{ fs::File, - io::{self, stdin, stdout, BufRead, BufReader, BufWriter, Read, Stdin, Stdout, Write}, + io::{self, BufRead, BufReader, BufWriter, Read, Stdin, Stdout, Write, stdin, stdout}, path::{Path, PathBuf}, }; diff --git a/userspace/tools/crypt/src/main.rs b/userspace/tools/crypt/src/main.rs index 1f84d22c..afae84f3 100644 --- a/userspace/tools/crypt/src/main.rs +++ b/userspace/tools/crypt/src/main.rs @@ -2,8 +2,8 @@ use std::process::ExitCode; use clap::Parser; use crypt::{ - rsa::RsaKeyOptions, AsymmetricDecryptOptions, AsymmetricEncryptOptions, AsymmetricKeyOptions, - Error, + AsymmetricDecryptOptions, AsymmetricEncryptOptions, AsymmetricKeyOptions, Error, + rsa::RsaKeyOptions, }; use rsa::pkcs8::{EncodePrivateKey, EncodePublicKey, LineEnding}; diff --git a/userspace/tools/crypt/src/rsa/mod.rs b/userspace/tools/crypt/src/rsa/mod.rs index cdc0904f..2b0b0f5e 100644 --- a/userspace/tools/crypt/src/rsa/mod.rs +++ b/userspace/tools/crypt/src/rsa/mod.rs @@ -4,9 +4,9 @@ use std::{ }; use rsa::{ + Pkcs1v15Encrypt, RsaPrivateKey, RsaPublicKey, pkcs1::{DecodeRsaPrivateKey, DecodeRsaPublicKey, EncodeRsaPrivateKey, EncodeRsaPublicKey}, pkcs8::LineEnding, - Pkcs1v15Encrypt, RsaPrivateKey, RsaPublicKey, }; use crate::{ diff --git a/userspace/tools/md2txt/src/main.rs b/userspace/tools/md2txt/src/main.rs index 995400a8..42ed2acf 100644 --- a/userspace/tools/md2txt/src/main.rs +++ b/userspace/tools/md2txt/src/main.rs @@ -2,7 +2,7 @@ use std::{ fs, - io::{self, stdout, IsTerminal}, + io::{self, IsTerminal, stdout}, path::PathBuf, process::ExitCode, }; diff --git a/userspace/tools/rdb/src/debugger.rs b/userspace/tools/rdb/src/debugger.rs index 3ac42b06..453f4f47 100644 --- a/userspace/tools/rdb/src/debugger.rs +++ b/userspace/tools/rdb/src/debugger.rs @@ -13,14 +13,14 @@ use std::{ sync::Arc, }; -use elf::{endian::AnyEndian, segment::ProgramHeader, symbol::Symbol, ElfStream}; +use elf::{ElfStream, endian::AnyEndian, segment::ProgramHeader, symbol::Symbol}; use libterm::{Color, Term, TermKey}; use rangemap::RangeMap; use yggdrasil_rt::{debug::DebugFrame, process::ProcessId}; -use crate::state::State; use crate::InstructionFormatter; -use crate::{comm::Comm, Error, Target}; +use crate::state::State; +use crate::{Error, Target, comm::Comm}; pub struct SymbolResolver { image: Arc, diff --git a/userspace/tools/rdb/src/state.rs b/userspace/tools/rdb/src/state.rs index 87686805..2e88d7b0 100644 --- a/userspace/tools/rdb/src/state.rs +++ b/userspace/tools/rdb/src/state.rs @@ -40,18 +40,20 @@ impl State { pub fn set_breakpoint(&mut self, address: u64) -> Result<(), Error> { unsafe { - yggdrasil_rt::sys::debug_control(self.pid, &mut DebugOperation::SetBreakpoint(address.try_into().unwrap())).map_err(Error::DebugError) + yggdrasil_rt::sys::debug_control( + self.pid, + &mut DebugOperation::SetBreakpoint(address.try_into().unwrap()), + ) + .map_err(Error::DebugError) } } pub fn read_memory(&mut self, address: u64, buffer: &mut [u8]) -> Result<(), Error> { - let mut op = DebugOperation::ReadMemory { address: address.try_into().unwrap(), buffer }; - unsafe { - yggdrasil_rt::sys::debug_control( - self.pid, - &mut op - ).map_err(Error::DebugError) - } + let mut op = DebugOperation::ReadMemory { + address: address.try_into().unwrap(), + buffer, + }; + unsafe { yggdrasil_rt::sys::debug_control(self.pid, &mut op).map_err(Error::DebugError) } } pub fn update_ip(&mut self, ip: usize) { diff --git a/userspace/tools/rdb/src/x86.rs b/userspace/tools/rdb/src/x86.rs index 3b9521c5..231b480b 100644 --- a/userspace/tools/rdb/src/x86.rs +++ b/userspace/tools/rdb/src/x86.rs @@ -3,7 +3,7 @@ use std::fmt::{self, Display}; use iced_x86::{Decoder, DecoderOptions, Formatter, GasFormatter, Instruction}; use yggdrasil_abi::arch::SavedFrame; -use crate::{debugger::SymbolResolver, InstructionFormatter, Target}; +use crate::{InstructionFormatter, Target, debugger::SymbolResolver}; #[cfg(any(target_pointer_width = "32", rust_analyzer))] const BITNESS: u32 = 32; diff --git a/userspace/tools/red/src/command.rs b/userspace/tools/red/src/command.rs index 7e4c1e2a..a0f1014e 100644 --- a/userspace/tools/red/src/command.rs +++ b/userspace/tools/red/src/command.rs @@ -1,10 +1,10 @@ use std::ops::RangeInclusive; use crate::{ + State, buffer::{Buffer, SetMode}, config::Config, error::Error, - State, }; pub type CommandFn = fn(&mut State, &[&str]) -> Result<(), Error>; diff --git a/userspace/tools/red/src/config.rs b/userspace/tools/red/src/config.rs index b98ab74e..fc91e8bb 100644 --- a/userspace/tools/red/src/config.rs +++ b/userspace/tools/red/src/config.rs @@ -3,7 +3,7 @@ use libterm::TermKey; use crate::{ buffer::Mode, command::Action, - keymap::{bind1, bindn, KeyMap, KeySeq, PrefixNode}, + keymap::{KeyMap, KeySeq, PrefixNode, bind1, bindn}, }; pub struct Config { diff --git a/userspace/tools/rsh/src/crypt/client.rs b/userspace/tools/rsh/src/crypt/client.rs index 47503cee..de16c075 100644 --- a/userspace/tools/rsh/src/crypt/client.rs +++ b/userspace/tools/rsh/src/crypt/client.rs @@ -8,19 +8,19 @@ use x25519_dalek::{EphemeralSecret, PublicKey}; use crate::{ crypt::{ - self, + self, V1_CLIENT_RANDOM_LEN, signature::VerificationMethod, stream::ClientSocket, - symmetric::{data::Iv, SymmetricCipher}, - V1_CLIENT_RANDOM_LEN, + symmetric::{SymmetricCipher, data::Iv}, }, proto::{Decode, DecodeError, Decoder, Encode, EncodeError, Encoder}, }; use super::{ + ClientNegotiationMessage, ServerNegotiationMessage, config::ClientConfig, signature::{self, SignatureMethod}, - symmetric, ClientNegotiationMessage, ServerNegotiationMessage, + symmetric, }; pub(crate) struct Negotiation { diff --git a/userspace/tools/rsh/src/crypt/config.rs b/userspace/tools/rsh/src/crypt/config.rs index 63b3096d..5eb7e8a6 100644 --- a/userspace/tools/rsh/src/crypt/config.rs +++ b/userspace/tools/rsh/src/crypt/config.rs @@ -1,16 +1,15 @@ use std::{collections::HashSet, path::PathBuf}; use crate::crypt::{ - symmetric::{V1_CIPHER_AES_128_GCM, V1_CIPHER_AES_256_GCM, V1_CIPHER_CHACHA20POLY1305}, V1_KEX_X25519_DALEK, + symmetric::{V1_CIPHER_AES_128_GCM, V1_CIPHER_AES_256_GCM, V1_CIPHER_CHACHA20POLY1305}, }; use super::{ - sig_algo_name, + V1_SIG_ED25519, sig_algo_name, signature::{ - fingerprint_sha256, SignEd25519, SignatureKeyStore, SignatureMethod, VerificationMethod, + SignEd25519, SignatureKeyStore, SignatureMethod, VerificationMethod, fingerprint_sha256, }, - V1_SIG_ED25519, }; fn default_select_kex_algorithm(offer: &[u8]) -> Option { diff --git a/userspace/tools/rsh/src/crypt/server.rs b/userspace/tools/rsh/src/crypt/server.rs index 9d69ec3b..7f44b27d 100644 --- a/userspace/tools/rsh/src/crypt/server.rs +++ b/userspace/tools/rsh/src/crypt/server.rs @@ -10,17 +10,17 @@ use x25519_dalek::{EphemeralSecret, PublicKey}; use crate::{ crypt::{ - sig_algo_name, signature::fingerprint_sha256, stream::ClientSocket, symmetric::data::Iv, - ServerHello, ServerNegotiationMessage, V1_CLIENT_RANDOM_LEN, + ServerHello, ServerNegotiationMessage, V1_CLIENT_RANDOM_LEN, sig_algo_name, + signature::fingerprint_sha256, stream::ClientSocket, symmetric::data::Iv, }, proto::{Decode, DecodeError, Decoder, Encode, EncodeError, Encoder}, }; use super::{ + ClientNegotiationMessage, config::ServerConfig, signature::{SignatureMethod, VerificationMethod}, symmetric::{self, SymmetricCipher}, - ClientNegotiationMessage, }; pub struct ServerSocket { diff --git a/userspace/tools/rsh/src/crypt/stream.rs b/userspace/tools/rsh/src/crypt/stream.rs index 2055d0e8..62ef4da6 100644 --- a/userspace/tools/rsh/src/crypt/stream.rs +++ b/userspace/tools/rsh/src/crypt/stream.rs @@ -11,9 +11,8 @@ use crate::{ config::ClientConfig, signature::{SignatureMethod, VerificationMethod}, symmetric::{ - self, + self, SymmetricCipher, data::{InboundEncryptedMessage, OutboundPlainMessage}, - SymmetricCipher, }, }, proto::{Decode, DecodeError, Decoder, Encode, EncodeError, Encoder}, diff --git a/userspace/tools/rsh/src/crypt/symmetric/aes_gcm.rs b/userspace/tools/rsh/src/crypt/symmetric/aes_gcm.rs index 672bc5b7..6e158c4a 100644 --- a/userspace/tools/rsh/src/crypt/symmetric/aes_gcm.rs +++ b/userspace/tools/rsh/src/crypt/symmetric/aes_gcm.rs @@ -2,15 +2,16 @@ use std::marker::PhantomData; use aead::{KeyInit, KeySizeUser}; use aes::cipher::{BlockCipher, BlockEncrypt}; -use aes_gcm::{aead::AeadMutInPlace, AesGcm}; -use crypto_common::{typenum, BlockSizeUser}; +use aes_gcm::{AesGcm, aead::AeadMutInPlace}; +use crypto_common::{BlockSizeUser, typenum}; use crate::crypt::symmetric::{ + CiphersuiteAlgorithm, Decrypter, Encrypter, Error, data::{ DecryptionBuffer, EncryptionBuffer, InboundEncryptedMessage, InboundPlainMessage, Iv, Nonce, NonceSize, OutboundEncryptedMessage, OutboundPlainMessage, PrefixedPayload, }, - make_aad, CiphersuiteAlgorithm, Decrypter, Encrypter, Error, + make_aad, }; pub struct AesGcmAlgorithm(PhantomData); @@ -93,9 +94,9 @@ where #[cfg(test)] mod tests { use crate::crypt::symmetric::{ + CiphersuiteAlgorithm, aes_gcm::{AES128GCM, AES256GCM}, data::{InboundEncryptedMessage, Iv, OutboundPlainMessage}, - CiphersuiteAlgorithm, }; #[test] diff --git a/userspace/tools/rsh/src/crypt/symmetric/chacha20poly1305.rs b/userspace/tools/rsh/src/crypt/symmetric/chacha20poly1305.rs index 62937812..1df6b89b 100644 --- a/userspace/tools/rsh/src/crypt/symmetric/chacha20poly1305.rs +++ b/userspace/tools/rsh/src/crypt/symmetric/chacha20poly1305.rs @@ -2,11 +2,12 @@ use aead::{AeadMutInPlace, KeyInit, KeySizeUser}; use chacha20poly1305::ChaCha20Poly1305; use crate::crypt::symmetric::{ + CiphersuiteAlgorithm, Decrypter, Encrypter, Error, data::{ DecryptionBuffer, EncryptionBuffer, InboundEncryptedMessage, InboundPlainMessage, Iv, Nonce, OutboundEncryptedMessage, OutboundPlainMessage, PrefixedPayload, }, - make_aad, CiphersuiteAlgorithm, Decrypter, Encrypter, Error, + make_aad, }; pub struct Chacha20Poly1305Algorithm; @@ -78,9 +79,9 @@ impl Decrypter for Chacha20Poly1305Cipher { #[cfg(test)] mod tests { use crate::crypt::symmetric::{ + CiphersuiteAlgorithm, chacha20poly1305::CHACHA20POLY1305, data::{InboundEncryptedMessage, Iv, OutboundPlainMessage}, - CiphersuiteAlgorithm, }; #[test] diff --git a/userspace/tools/rsh/src/lib.rs b/userspace/tools/rsh/src/lib.rs index 368cb528..b2378f11 100644 --- a/userspace/tools/rsh/src/lib.rs +++ b/userspace/tools/rsh/src/lib.rs @@ -2,10 +2,10 @@ #![feature(generic_const_exprs, portable_simd, if_let_guard, let_chains)] #![allow(incomplete_features)] -pub mod socket; pub mod crypt; pub mod proto; pub mod server; +pub mod socket; pub enum Message { None, diff --git a/userspace/tools/rsh/src/main.rs b/userspace/tools/rsh/src/main.rs index 67d2995f..d25b1034 100644 --- a/userspace/tools/rsh/src/main.rs +++ b/userspace/tools/rsh/src/main.rs @@ -2,7 +2,7 @@ #![feature(let_chains)] use std::{ - io::{stderr, stdout, IsTerminal, Read, Stderr, Write}, + io::{IsTerminal, Read, Stderr, Write, stderr, stdout}, ops::{Deref, DerefMut}, os::fd::AsRawFd, }; @@ -20,7 +20,7 @@ use rsh::{ }; use std::{ - io::{self, stdin, Stdin, Stdout}, + io::{self, Stdin, Stdout, stdin}, net::{IpAddr, SocketAddr}, path::PathBuf, process::ExitCode, diff --git a/userspace/tools/rsh/src/server.rs b/userspace/tools/rsh/src/server.rs index eafa5fa2..c2b36983 100644 --- a/userspace/tools/rsh/src/server.rs +++ b/userspace/tools/rsh/src/server.rs @@ -1,5 +1,5 @@ use std::{ - collections::{hash_map::Entry, HashMap}, + collections::{HashMap, hash_map::Entry}, fmt, hint::unreachable_unchecked, io::{self, Read, Write}, diff --git a/userspace/tools/rsh/src/socket.rs b/userspace/tools/rsh/src/socket.rs index e69de29b..8b137891 100644 --- a/userspace/tools/rsh/src/socket.rs +++ b/userspace/tools/rsh/src/socket.rs @@ -0,0 +1 @@ + diff --git a/userspace/tools/shell/src/command/eval.rs b/userspace/tools/shell/src/command/eval.rs index 37b912d2..e16cbd89 100644 --- a/userspace/tools/shell/src/command/eval.rs +++ b/userspace/tools/shell/src/command/eval.rs @@ -3,11 +3,11 @@ use std::{io::BufReader, marker::PhantomData, process::ExitCode}; use crate::{ builtin::{self, Envs}, error::Error, - exec::{exec_pipeline, wait_for_pipeline, Execution, InheritStdout, Input, Outcome, Output}, + exec::{Execution, InheritStdout, Input, Outcome, Output, exec_pipeline, wait_for_pipeline}, syntax::parse::{BinaryOperator, ConditionalExpression, Expression}, }; -use super::{env::Environment, ExpandedPipeline, ExpandedPipelineElement}; +use super::{ExpandedPipeline, ExpandedPipelineElement, env::Environment}; pub fn evaluate_pipeline( pipeline: &ExpandedPipeline, diff --git a/userspace/tools/shell/src/env.rs b/userspace/tools/shell/src/env.rs index 714dc509..6623dfbc 100644 --- a/userspace/tools/shell/src/env.rs +++ b/userspace/tools/shell/src/env.rs @@ -1,5 +1,5 @@ use std::{ - collections::{hash_map::Entry, HashMap}, + collections::{HashMap, hash_map::Entry}, fmt, path::PathBuf, }; diff --git a/userspace/tools/shell/src/exec.rs b/userspace/tools/shell/src/exec.rs index fa0c9822..937fa10e 100644 --- a/userspace/tools/shell/src/exec.rs +++ b/userspace/tools/shell/src/exec.rs @@ -12,7 +12,7 @@ use std::{ #[cfg(any(rust_analyzer, target_os = "yggdrasil"))] use std::os::yggdrasil::{ io::terminal::set_terminal_group, - process::{create_process_group, CommandExt}, + process::{CommandExt, create_process_group}, }; #[cfg(any(rust_analyzer, unix))] diff --git a/userspace/tools/shell/src/main.rs b/userspace/tools/shell/src/main.rs index aedf1dd5..190425a6 100644 --- a/userspace/tools/shell/src/main.rs +++ b/userspace/tools/shell/src/main.rs @@ -18,7 +18,6 @@ use std::{ use clap::Parser; use command::env::Environment; -use cross::io::{TerminalOptions, TerminalOptionsImpl}; use error::Error; use exec::Outcome; use stuff::readline::Readline; @@ -135,8 +134,8 @@ fn run(mut input: ShellInput, env: &mut Environment) -> Result<(), Error> { } }; let old_termios = if let ShellInput::Interactive(interactive) = &mut input { - let new = TerminalOptionsImpl::normal(); - Some(interactive.stdin_mut().set_options(new)?) + let termios = *interactive.stdin_mut().saved_options(); + Some(interactive.stdin_mut().set_options(termios)?) } else { None }; diff --git a/userspace/tools/shell/src/syntax/lex.rs b/userspace/tools/shell/src/syntax/lex.rs index 91396df3..8d69a906 100644 --- a/userspace/tools/shell/src/syntax/lex.rs +++ b/userspace/tools/shell/src/syntax/lex.rs @@ -1,6 +1,7 @@ use std::fmt; use nom::{ + IResult, branch::alt, bytes::{ complete::{self, tag}, @@ -10,7 +11,6 @@ use nom::{ combinator::{map, recognize, value, verify}, multi::{many0, many1}, sequence::{delimited, preceded, terminated, tuple}, - IResult, }; #[derive(Debug, PartialEq)] @@ -493,9 +493,9 @@ impl fmt::Display for Token<'_> { #[cfg(test)] mod tests { use crate::syntax::lex::{ - lex_double_quote_word_segment, lex_literal_word_segment, lex_single_quote_word_segment, - lex_token, lex_word, DoubleQuotedSegment, Escape, Keyword, OutputRedirect, - OutputRedirectTarget, Punct, Redirect, Token, WordSegment, WordToken, + DoubleQuotedSegment, Escape, Keyword, OutputRedirect, OutputRedirectTarget, Punct, + Redirect, Token, WordSegment, WordToken, lex_double_quote_word_segment, + lex_literal_word_segment, lex_single_quote_word_segment, lex_token, lex_word, }; use super::lex_tokens; diff --git a/userspace/tools/shell/src/syntax/parse.rs b/userspace/tools/shell/src/syntax/parse.rs index 06fe3c32..7f464343 100644 --- a/userspace/tools/shell/src/syntax/parse.rs +++ b/userspace/tools/shell/src/syntax/parse.rs @@ -217,7 +217,7 @@ fn parse_if(input: &str) -> Result<(&str, Expression), Error> { return Err(Error::Expected { expected: Token::Keyword(Keyword::Then), got: then_or_semicolon, - }) + }); } } } @@ -269,7 +269,7 @@ fn parse_while(input: &str) -> Result<(&str, Expression), Error> { return Err(Error::Expected { expected: Token::Keyword(Keyword::Do), got: do_or_semicolon, - }) + }); } } } @@ -319,7 +319,7 @@ fn parse_for(input: &str) -> Result<(&str, Expression), Error> { return Err(Error::Expected { expected: Token::Keyword(Keyword::Do), got: do_or_semicolon, - }) + }); } } } @@ -628,8 +628,8 @@ mod tests { InputRedirect, OutputRedirect, OutputRedirectTarget, Redirect, WordSegment, WordToken, }, parse::{ - parse_expression, parse_pipeline, parse_pipeline_element, BinaryOperator, Expression, - IfExpression, PipelineElement, PipelineExpression, + BinaryOperator, Expression, IfExpression, PipelineElement, PipelineExpression, + parse_expression, parse_pipeline, parse_pipeline_element, }, }; diff --git a/userspace/tools/strace/src/tracer.rs b/userspace/tools/strace/src/tracer.rs index d1139019..93bc8750 100644 --- a/userspace/tools/strace/src/tracer.rs +++ b/userspace/tools/strace/src/tracer.rs @@ -13,7 +13,7 @@ use runtime::{ rt::{ debug::debug_control, process::ThreadEvent, - time::{get_monotonic_time, SystemTime}, + time::{SystemTime, get_monotonic_time}, }, }; diff --git a/xtask/Cargo.toml b/xtask/Cargo.toml index f2407263..74b09083 100644 --- a/xtask/Cargo.toml +++ b/xtask/Cargo.toml @@ -22,3 +22,4 @@ semver = { version = "1.0.22", features = ["serde"] } fatfs = "0.3.6" fscommon = "0.1.1" indicatif = "0.17.9" +tempfile = "3.24.0" diff --git a/xtask/src/build/device_tree.rs b/xtask/src/build/device_tree.rs new file mode 100644 index 00000000..68c42a0a --- /dev/null +++ b/xtask/src/build/device_tree.rs @@ -0,0 +1,95 @@ +use std::fs; + +use tempfile::NamedTempFile; + +use crate::{env::BuildEnv, error::Error, util::run_external_command}; + +const DTC_ARCHITECTURES: &[&str] = &["aarch64", "riscv64"]; + +fn find_all_device_trees(env: &BuildEnv) -> Vec { + let mut res = vec![]; + for &arch in DTC_ARCHITECTURES { + let Ok(dir) = fs::read_dir(env.workspace_root.join("etc/dtb").join(arch)) else { + continue; + }; + + for entry in dir { + let Ok(entry) = entry else { + continue; + }; + let Ok(file_type) = entry.file_type() else { + continue; + }; + if !file_type.is_file() { + continue; + } + let name = entry.file_name(); + let Some(name) = name.to_str() else { + continue; + }; + if !name.ends_with(".dts") { + continue; + } + res.push(format!("etc/dtb/{arch}/{name}")); + } + } + res +} + +pub fn build_device_tree(env: &BuildEnv, name: &str) -> Result { + let Some((head, filename)) = name.rsplit_once("/") else { + log::error!("Invalid device tree path: {name:?}"); + return Err(Error::UsageError); + }; + let Some(filename) = filename.strip_suffix(".dts") else { + log::error!("Invalid device tree filename: {name:?}"); + return Err(Error::UsageError); + }; + let Some((_, arch)) = head.rsplit_once("/") else { + log::error!("Invalid device tree path: {name:?}"); + return Err(Error::UsageError); + }; + if !DTC_ARCHITECTURES.contains(&arch) { + log::error!("Unexpected dtb architecture {arch:?}: {name:?}"); + return Err(Error::UsageError); + } + log::info!("Building device tree: {arch}/{filename}.dts"); + let cpp_output = NamedTempFile::new()?.into_temp_path(); + // let _ = env; + let output = format!("target/{arch}-unknown-none/dtb/{filename}.dtb"); + fs::create_dir_all(format!("target/{arch}-unknown-none/dtb"))?; + run_external_command( + "cpp", + [ + "-undef", + "-x", + "assembler-with-cpp", + &format!("-I{}/etc/dtb", env.workspace_root.display()), + name, + &format!("{}", cpp_output.display()), + ], + false, + )?; + run_external_command( + "dtc", + [ + "-O", + "dtb", + "-o", + &output, + &format!("{}", cpp_output.display()), + ], + false, + )?; + drop(cpp_output); + + Ok(output) +} + +pub fn build_device_trees(env: &BuildEnv) -> Result<(), Error> { + let device_trees = find_all_device_trees(env); + for device_tree in device_trees { + build_device_tree(env, &device_tree)?; + } + Ok(()) +} diff --git a/xtask/src/build/mod.rs b/xtask/src/build/mod.rs index f052c6a7..03014ab0 100644 --- a/xtask/src/build/mod.rs +++ b/xtask/src/build/mod.rs @@ -11,6 +11,7 @@ pub mod x86_64; pub mod c; mod cargo; +pub mod device_tree; pub mod ports; pub mod ygglibc; // mod module; @@ -39,8 +40,8 @@ pub struct KernelBin(pub PathBuf); pub struct InitrdGenerated(pub PathBuf); pub struct ImageBuilt(pub PathBuf); pub enum AllBuilt { - Riscv64(KernelBin, InitrdGenerated), - AArch64(KernelBin, InitrdGenerated), + Riscv64(KernelBin, InitrdGenerated, Option), + AArch64(KernelBin, InitrdGenerated, Option), X86_64(ImageBuilt), } @@ -71,6 +72,15 @@ pub fn build_all(env: &BuildEnv) -> Result { let check = check::check_build_env(env.arch)?; + let device_tree = if let Some(device_tree) = env.board.device_tree() { + Some(device_tree::build_device_tree( + env, + &format!("etc/dtb/{device_tree}.dts"), + )?) + } else { + None + }; + // Kernel stuff let kernel = build_kernel(env, check)?; // Userspace stuff @@ -78,8 +88,12 @@ pub fn build_all(env: &BuildEnv) -> Result { // Build target-specific image let image = match env.arch { - Arch::riscv64 => AllBuilt::Riscv64(make_kernel_bin(env, kernel, check)?, initrd), - Arch::aarch64 => AllBuilt::AArch64(make_kernel_bin(env, kernel, check)?, initrd), + Arch::riscv64 => { + AllBuilt::Riscv64(make_kernel_bin(env, kernel, check)?, initrd, device_tree) + } + Arch::aarch64 => { + AllBuilt::AArch64(make_kernel_bin(env, kernel, check)?, initrd, device_tree) + } Arch::x86_64 => AllBuilt::X86_64(x86_64::build_image(env, kernel, initrd)?), }; @@ -172,6 +186,15 @@ pub fn clean_all(env: &BuildEnv, clean_toolchain: bool, repos: bool) -> Result<( Ok(()) } +pub fn build_device_tree(env: &BuildEnv, name: &str) -> Result<(), Error> { + device_tree::build_device_tree(env, name)?; + Ok(()) +} + +pub fn build_device_trees(env: &BuildEnv) -> Result<(), Error> { + device_tree::build_device_trees(env) +} + pub fn build_toolchain(env: &BuildEnv, branch: &str) -> Result<(), Error> { toolchain::fetch(env, branch)?; toolchain::build(env) diff --git a/xtask/src/build/x86_64.rs b/xtask/src/build/x86_64.rs index 805631f9..75aa4498 100644 --- a/xtask/src/build/x86_64.rs +++ b/xtask/src/build/x86_64.rs @@ -7,7 +7,7 @@ use std::{ use fscommon::BufStream; use crate::{ - build::{cargo::CargoBuilder, KernelBuilt}, + build::{KernelBuilt, cargo::CargoBuilder}, env::BuildEnv, error::Error, util, diff --git a/xtask/src/env.rs b/xtask/src/env.rs index 01657975..1785f8fc 100644 --- a/xtask/src/env.rs +++ b/xtask/src/env.rs @@ -223,3 +223,12 @@ impl Arch { } } } + +impl Board { + pub fn device_tree(&self) -> Option<&str> { + match self { + Self::raspi4b => Some("aarch64/bcm2711-rpi-4-b"), + _ => None, + } + } +} diff --git a/xtask/src/error.rs b/xtask/src/error.rs index 7b0c40b8..220adc14 100644 --- a/xtask/src/error.rs +++ b/xtask/src/error.rs @@ -10,6 +10,8 @@ use crate::{build::ports::BuildStep, env::Board}; pub enum Error { #[error("{0}")] SystemError(#[from] io::Error), + #[error("Invalid command usage")] + UsageError, #[error("Cargo command failed")] CargoFailed, #[error("Could not generate a processed kernel image")] diff --git a/xtask/src/main.rs b/xtask/src/main.rs index eb24bad1..4c7f6e39 100644 --- a/xtask/src/main.rs +++ b/xtask/src/main.rs @@ -66,6 +66,12 @@ enum SubArgs { #[clap(short, long, help = "Clean cloned repositories")] repos: bool, }, + Dtc { + #[clap(short, long, help = "Build all device trees")] + all: bool, + #[clap(short, long, help = "Device tree to compile")] + name: Option, + }, // #[clap(about = "Print `git status` for the components", alias = "gst")] // GitStatus, @@ -136,6 +142,15 @@ fn run(args: Args) -> Result<(), Error> { SubArgs::Clippy => build::check_all(env, CheckAction::Clippy), SubArgs::Test => build::test_all(env), SubArgs::Clean { toolchain, repos } => build::clean_all(&env, toolchain, repos), + SubArgs::Dtc { all: true, .. } => build::build_device_trees(&env), + SubArgs::Dtc { all: false, name } => { + let Some(name) = name else { + eprintln!("No device tree specified"); + return Err(Error::UsageError); + }; + + build::build_device_tree(&env, &name) + } // SubArgs::GitStatus => util::git_status_all(&env), SubArgs::Qemu { qemu, diff --git a/xtask/src/qemu.rs b/xtask/src/qemu.rs index 345806a1..b86eb49c 100644 --- a/xtask/src/qemu.rs +++ b/xtask/src/qemu.rs @@ -5,9 +5,9 @@ use std::{ }; use qemu::{ - aarch64, + Qemu, aarch64, device::{IntelGigabitRev, QemuDevice, QemuDrive, QemuNic, QemuSerialTarget}, - riscv64, x86_64, Qemu, + riscv64, x86_64, }; use crate::{ @@ -146,6 +146,7 @@ fn run_aarch64( devices: Vec, kernel_bin: PathBuf, initrd: PathBuf, + device_tree: Option<&str>, ) -> Result { let mut qemu = Qemu::new_aarch64(); if let Some(qemu_bin) = qemu_bin { @@ -182,15 +183,8 @@ fn run_aarch64( let mut command = qemu.into_command(); - if env.board == Board::raspi4b { - // Provide the dtb - command.args([ - "-dtb", - &format!( - "{}/etc/dtb/bcm2711-rpi-4-b.dtb", - env.workspace_root.display() - ), - ]); + if let Some(device_tree) = device_tree { + command.args(["-dtb", device_tree]); } Ok(command) @@ -231,7 +225,9 @@ fn run_riscv64( devices: Vec, kernel: PathBuf, initrd: PathBuf, + device_tree: Option<&str>, ) -> Result { + let _ = device_tree; let _ = config; let _ = devices; @@ -335,12 +331,24 @@ pub fn run( add_devices_from_config(&mut devices, disk.as_ref(), &config)?; let mut command = match built { - AllBuilt::Riscv64(KernelBin(kernel), InitrdGenerated(initrd)) => { - run_riscv64(&config, &env, qemu, devices, kernel, initrd)? - } - AllBuilt::AArch64(KernelBin(kernel), InitrdGenerated(initrd)) => { - run_aarch64(&config, &env, qemu, devices, kernel, initrd)? - } + AllBuilt::Riscv64(KernelBin(kernel), InitrdGenerated(initrd), device_tree) => run_riscv64( + &config, + &env, + qemu, + devices, + kernel, + initrd, + device_tree.as_deref(), + )?, + AllBuilt::AArch64(KernelBin(kernel), InitrdGenerated(initrd), device_tree) => run_aarch64( + &config, + &env, + qemu, + devices, + kernel, + initrd, + device_tree.as_deref(), + )?, AllBuilt::X86_64(ImageBuilt(image)) => run_x86_64(&config, qemu, devices, image)?, }; diff --git a/xtask/src/util.rs b/xtask/src/util.rs index 4a708a4e..755c9f33 100644 --- a/xtask/src/util.rs +++ b/xtask/src/util.rs @@ -1,7 +1,7 @@ use std::{ ffi::OsStr, fs, - io::{stderr, Write}, + io::{Write, stderr}, path::Path, process::{Command, Stdio}, };