aarch64: better page fault info

kernel/arch/aarch64/src/mem/table.rs

@@ -22,7 +22,7 @@ use crate::KernelTableManagerImpl;
 use super::dc_cvac;
 
 bitflags! {
-    #[derive(Clone, Copy, PartialEq, Eq)]
+    #[derive(Clone, Copy, PartialEq, Eq, Debug)]
     pub struct PageAttributes: u64 {
         const PRESENT = 1 << 0;
 
@@ -71,8 +71,8 @@ pub struct L3;
 
 #[derive(Debug, Clone, Copy)]
 pub enum EntryType {
-    Table(PhysicalAddress),
-    Page(PhysicalAddress),
+    Table(PageAttributes, PhysicalAddress),
+    Page(PageAttributes, PhysicalAddress),
     Invalid,
 }
 
@@ -311,9 +311,14 @@ impl<L: NonTerminalEntryLevel> PageEntry<L> {
         if !self.is_present() {
             EntryType::Invalid
         } else if let Some(table) = self.as_table() {
-            EntryType::Table(table)
+            let attributes = self.attributes();
+            EntryType::Table(attributes, table)
         } else {
-            EntryType::Page(PhysicalAddress::from_u64(self.0 & !Self::ATTR_MASK))
+            let attributes = self.attributes();
+            EntryType::Page(
+                attributes,
+                PhysicalAddress::from_u64(self.0 & !Self::ATTR_MASK),
+            )
         }
     }
 }
@@ -430,8 +435,26 @@ impl From<PageAttributes> for MapAttributes {
 impl fmt::Display for EntryType {
     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         match self {
-            Self::Table(address) => write!(f, "table @ {address:#x}"),
-            Self::Page(address) => write!(f, "page @ {address:#x}"),
+            &Self::Table(attrs, address) => {
+                let mask = match attrs & PageAttributes::AP_ACCESS_MASK {
+                    PageAttributes::AP_BOTH_READONLY => "r- r-",
+                    PageAttributes::AP_BOTH_READWRITE => "rw rw",
+                    PageAttributes::AP_KERNEL_READONLY => "r- --",
+                    PageAttributes::AP_KERNEL_READWRITE => "rw --",
+                    _ => unreachable!(),
+                };
+                write!(f, "table @ {address:#010x} {mask}")
+            }
+            &Self::Page(attrs, address) => {
+                let mask = match attrs & PageAttributes::AP_ACCESS_MASK {
+                    PageAttributes::AP_BOTH_READONLY => "r- r-",
+                    PageAttributes::AP_BOTH_READWRITE => "rw rw",
+                    PageAttributes::AP_KERNEL_READONLY => "r- --",
+                    PageAttributes::AP_KERNEL_READWRITE => "rw --",
+                    _ => unreachable!(),
+                };
+                write!(f, "page  @ {address:#010x} {mask}")
+            }
             Self::Invalid => f.write_str("<invalid>"),
         }
     }

kernel/src/arch/aarch64/boot/mod.rs

@@ -39,7 +39,7 @@ use crate::{
 
 static BSP_STACK: BootStack<BOOT_STACK_SIZE> = BootStack::zeroed();
 pub(crate) static SPIN_TABLE_STACK: AtomicUsize = AtomicUsize::new(0);
-static mut KERNEL_LOAD_BASE: u64 = 0;
+pub(crate) static mut KERNEL_LOAD_BASE: u64 = 0;
 static mut DTB_PHYSICAL_ADDRESS: PhysicalAddress = PhysicalAddress::ZERO;
 
 unsafe extern "C" fn relocate_kernel(image_base: i64, rela_start: usize, rela_end: usize) {

kernel/src/arch/aarch64/exception.rs

@@ -16,7 +16,7 @@ use abi::{SyscallFunction, process::Signal};
 use kernel_arch::{Architecture, ArchitectureImpl, sync::hack_locks};
 use kernel_arch_aarch64::{
     context::ExceptionFrame,
-    mem::table::{EntryType, L1, L2, L3, PageTable},
+    mem::table::{EntryType, L1, L2, L3, PageAttributes, PageTable},
 };
 use libk::{device::external_interrupt_controller, task::thread::Thread};
 use libk_mm::{PageFaultKind, address::PhysicalAddress, table::EntryLevelExt};
@@ -55,24 +55,24 @@ unsafe fn perform_ptw<F: Fn(u32, EntryType)>(virt: usize, handler: F) {
         handler(0, EntryType::Invalid);
         return;
     };
-    handler(0, EntryType::Table(ttbr_phys));
+    handler(0, EntryType::Table(PageAttributes::empty(), ttbr_phys));
 
     let l2 = l1.walk(l1i);
     handler(1, l2);
     let l2 = match l2 {
-        EntryType::Table(l2) => PageTable::<L2>::from_physical(l2).unwrap(),
+        EntryType::Table(_, l2) => PageTable::<L2>::from_physical(l2).unwrap(),
         _ => return,
     };
 
     let l3 = l2.walk(l2i);
     handler(2, l3);
     let l3 = match l3 {
-        EntryType::Table(l3) => PageTable::<L3>::from_physical(l3).unwrap(),
+        EntryType::Table(_, l3) => PageTable::<L3>::from_physical(l3).unwrap(),
         _ => return,
     };
 
     let l3e = match l3[l3i].as_page() {
-        Some(page) => EntryType::Page(page),
+        Some(page) => EntryType::Page(l3[l3i].attributes(), page),
         None => EntryType::Invalid,
     };
     handler(3, l3e);

kernel/src/arch/aarch64/mod.rs

@@ -287,6 +287,7 @@ impl AArch64 {
                 MACHINE_NAME.init(machine.into());
             }
             log::info!("Boot arguments: {bootargs:?}");
+            log::info!("Boot address: {:#x}", unsafe { boot::KERNEL_LOAD_BASE });
 
             log::info!("Initializing aarch64 platform");