nvme: dma cache flush, better performance (played with timer)

kernel/arch/riscv64/src/lib.rs

@@ -3,7 +3,10 @@
 
 extern crate alloc;
 
-use core::sync::atomic::{AtomicUsize, Ordering};
+use core::{
+    ops::Range,
+    sync::atomic::{AtomicUsize, Ordering},
+};
 
 use alloc::{boxed::Box, collections::btree_map::BTreeMap, vec::Vec};
 use device_api::interrupt::LocalInterruptController;
@@ -163,4 +166,21 @@ impl Architecture for ArchitectureImpl {
     fn idle_task() -> extern "C" fn(usize) -> ! {
         idle_task
     }
+
+    // Cache/barrier operation
+    fn load_barrier() {
+        unsafe { core::arch::asm!("fence r, w") };
+    }
+
+    fn store_barrier() {
+        unsafe { core::arch::asm!("fence w, r") };
+    }
+
+    fn memory_barrier() {
+        unsafe { core::arch::asm!("fence rw, rw") };
+    }
+
+    fn flush_virtual_range(_range: Range<usize>) {
+        // TODO
+    }
 }