refactor: fix x86-64 warnings

src/arch/x86_64/boot/mod.rs

@@ -63,7 +63,7 @@ static YBOOT_DATA: LoadProtocolV1 = LoadProtocolV1 {
 unsafe fn init_dummy_cpu() {
     // TODO this is incorrect
     static UNINIT_CPU_INNER: usize = 0;
-    static UNINIT_CPU_PTR: &'static usize = &UNINIT_CPU_INNER;
+    static UNINIT_CPU_PTR: &usize = &UNINIT_CPU_INNER;
 
     // Point %gs to a dummy structure so that Cpu::get_local() works properly even before the CPU
     // data structure is initialized

src/arch/x86_64/context.rs

@@ -7,7 +7,7 @@ use crate::{
     arch::x86_64::mem::KERNEL_TABLES,
     mem::{
         address::{AsPhysicalAddress, IntoRaw},
-        phys, PhysicalAddress,
+        phys,
     },
     task::context::TaskContextImpl,
 };

src/arch/x86_64/exception.rs

@@ -5,7 +5,7 @@ use abi::{arch::SavedFrame, primitive_enum, process::Signal};
 
 use crate::{
     arch::x86_64::apic,
-    task::{context::TaskFrame, process::Process, thread::Thread, Cpu},
+    task::{context::TaskFrame, thread::Thread, Cpu},
 };
 
 use super::ARCHITECTURE;

src/arch/x86_64/mem/mod.rs

@@ -98,7 +98,7 @@ unsafe fn map_early_pages(physical: PhysicalAddress, count: usize) -> Result<usi
 }
 
 unsafe fn unmap_early_page(address: usize) {
-    if address < EARLY_MAPPING_OFFSET || address >= EARLY_MAPPING_OFFSET + L2::SIZE {
+    if !(EARLY_MAPPING_OFFSET..EARLY_MAPPING_OFFSET + L2::SIZE).contains(&address) {
         panic!("Tried to unmap invalid early mapping: {:#x}", address);
     }
 
@@ -242,7 +242,7 @@ pub struct EarlyMapping<'a, T: ?Sized> {
 }
 
 impl<'a, T: Sized> EarlyMapping<'a, T> {
-    pub unsafe fn map(physical: PhysicalAddress) -> Result<EarlyMapping<'a, T>, Error> {
+    pub(super) unsafe fn map(physical: PhysicalAddress) -> Result<EarlyMapping<'a, T>, Error> {
         let layout = Layout::new::<T>();
         let aligned = physical.page_align_down::<L3>();
         let offset = physical.page_offset::<L3>();
@@ -254,7 +254,7 @@ impl<'a, T: Sized> EarlyMapping<'a, T> {
         Ok(EarlyMapping { value, page_count })
     }
 
-    pub unsafe fn map_slice(
+    pub(super) unsafe fn map_slice(
         physical: PhysicalAddress,
         len: usize,
     ) -> Result<EarlyMapping<'a, [T]>, Error> {
@@ -317,7 +317,7 @@ fn clone_kernel_tables(dst: &mut PageTable<L0>) {
 ///         * 0xFFFFFF8080000000 .. 0xFFFFFF8100000000      : DEVICE_MAPPING_L2
 ///             * 0xFFFFFF8080000000 .. 0xFFFFFF8080800000  : DEVICE_MAPPING_L3S
 ///             * 0xFFFFFF8080800000 .. 0xFFFFFF8100000000  : ...
-pub unsafe fn init_fixed_tables() {
+pub(super) unsafe fn init_fixed_tables() {
     // TODO this could be built in compile-time too?
     let early_mapping_l3_phys = &EARLY_MAPPING_L3 as *const _ as usize - KERNEL_VIRT_OFFSET;
     let device_mapping_l2_phys = &DEVICE_MAPPING_L2 as *const _ as usize - KERNEL_VIRT_OFFSET;

src/arch/x86_64/mem/process.rs

@@ -37,7 +37,7 @@ impl ProcessAddressSpaceManager for ProcessAddressSpaceImpl {
             l0[i] = PageEntry::INVALID;
         }
 
-        clone_kernel_tables(&mut *l0);
+        clone_kernel_tables(&mut l0);
 
         Ok(Self { l0 })
     }

src/arch/x86_64/mem/table.rs

@@ -113,7 +113,7 @@ impl PageEntry<L2> {
 }
 
 impl PageEntry<L1> {
-    pub unsafe fn block(phys: PhysicalAddress, attrs: PageAttributes) -> Self {
+    pub fn block(phys: PhysicalAddress, attrs: PageAttributes) -> Self {
         Self(
             u64::from(phys) | (attrs | PageAttributes::PRESENT | PageAttributes::BLOCK).bits(),
             PhantomData,
@@ -156,10 +156,16 @@ impl<L: EntryLevel> PageEntry<L> {
     /// An entry that is not mapped
     pub const INVALID: Self = Self(0, PhantomData);
 
+    /// Reinterprets raw [u64] as a [PageEntry].
+    ///
+    /// # Safety
+    ///
+    /// Unsafe: the caller must ensure the value is a valid page translation entry.
     pub const unsafe fn from_raw(raw: u64) -> Self {
         Self(raw, PhantomData)
     }
 
+    /// Returns the translation attributes of the entry
     pub fn attributes(&self) -> PageAttributes {
         PageAttributes::from_bits_retain(self.0)
     }
@@ -178,6 +184,12 @@ impl<L: EntryLevel> PageTable<L> {
         }
     }
 
+    /// Reinterprets given [PageEntry] slice as a reference to [PageTable].
+    ///
+    /// # Safety
+    ///
+    /// Unsafe: the caller must ensure the provided reference is properly aligned and contains sane
+    /// data.
     pub unsafe fn from_raw_slice_mut(data: &mut [PageEntry<L>; 512]) -> &mut Self {
         core::mem::transmute(data)
     }

src/arch/x86_64/mod.rs

@@ -284,7 +284,7 @@ impl Architecture for X86_64 {
 impl X86_64 {
     unsafe fn handle_ipi(&self, _msg: CpuMessage) {
         warnln!("Received an IPI");
-        loop {}
+        todo!();
     }
 
     fn set_boot_data(&self, data: BootData) {

src/arch/x86_64/syscall.rs

@@ -8,7 +8,7 @@ use tock_registers::interfaces::{ReadWriteable, Writeable};
 use crate::{
     arch::x86_64::registers::{MSR_IA32_EFER, MSR_IA32_LSTAR, MSR_IA32_SFMASK, MSR_IA32_STAR},
     syscall::raw_syscall_handler,
-    task::{context::TaskFrame, process::Process, thread::Thread},
+    task::{context::TaskFrame, thread::Thread},
 };
 
 /// Set of registers saved when taking a syscall instruction

src/device/bus/pci/mod.rs

@@ -99,11 +99,7 @@ impl PciBusSegment {
         }
     }
 
-    fn enumerate_function(
+    fn enumerate_function(&mut self, address: PciAddress) -> Result<(), Error> {
-        &mut self,
-        parent: &mut PciBusManager,
-        address: PciAddress,
-    ) -> Result<(), Error> {
         let Some(config) = self.probe_config_space(address)? else {
             return Ok(());
         };
@@ -113,7 +109,7 @@ impl PciBusSegment {
         // Enumerate multi-function devices
         if address.function == 0 && header_type & 0x80 != 0 {
             for function in 1..8 {
-                self.enumerate_function(parent, address.with_function(function))?;
+                self.enumerate_function(address.with_function(function))?;
             }
         }
 
@@ -132,22 +128,22 @@ impl PciBusSegment {
         Ok(())
     }
 
-    fn enumerate_bus(&mut self, parent: &mut PciBusManager, bus: u8) -> Result<(), Error> {
+    fn enumerate_bus(&mut self, bus: u8) -> Result<(), Error> {
         let address = PciAddress::for_bus(self.segment_number, bus);
 
         for i in 0..32 {
             let device_address = address.with_device(i);
 
-            self.enumerate_function(parent, device_address)?;
+            self.enumerate_function(device_address)?;
         }
 
         Ok(())
     }
 
     /// Enumerates the bus segment, placing found devices into the manager
-    pub fn enumerate(&mut self, parent: &mut PciBusManager) -> Result<(), Error> {
+    pub fn enumerate(&mut self) -> Result<(), Error> {
         for bus in self.bus_number_start..self.bus_number_end {
-            self.enumerate_bus(parent, bus)?;
+            self.enumerate_bus(bus)?;
         }
         Ok(())
     }
@@ -199,7 +195,7 @@ impl PciBusManager {
         };
 
         let mut this = PCI_MANAGER.lock();
-        bus_segment.enumerate(&mut *this)?;
+        bus_segment.enumerate()?;
         this.segments.push(bus_segment);
 
         Ok(())

src/device/bus/pci/space/mod.rs

@@ -160,7 +160,7 @@ pub trait PciConfigurationSpace {
         if index % 2 == 0 {
             let w0 = self.read_u32(0x10 + index * 4);
 
-            match w0 & 0 {
+            match w0 & 1 {
                 0 => match (w0 >> 1) & 3 {
                     0 => {
                         // 32-bit memory BAR
@@ -187,7 +187,7 @@ pub trait PciConfigurationSpace {
 
             let w0 = self.read_u32(0x10 + index * 4);
 
-            match w0 & 0 {
+            match w0 & 1 {
                 0 => match (w0 >> 1) & 3 {
                     0 => {
                         // 32-bit memory BAR

src/main.rs

@@ -25,6 +25,7 @@
     clippy::new_without_default,
     clippy::fn_to_numeric_cast,
     clippy::match_ref_pats,
+    clippy::match_single_binding,
     async_fn_in_trait
 )]
 // #![warn(missing_docs)]