i2c: implement initial support for i2c devices

etc/dtb/aarch64/bcm2711-rpi-4-b.dts

@@ -134,23 +134,57 @@
 			pinctrl-names = "default";
 			bootph-all;
 
+            // UART
 			uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
 				brcm,pins = <30>, <31>;
                 brcm,pull = <2>, <0>;
 				brcm,function = <7>;
 			};
-
             uart0_gpio32: uart0_gpio32 {
                 brcm,pins = <32>, <33>;
                 brcm,pull = <0>, <2>;
                 brcm,function = <8>;
             };
-
 			uart1_gpio14: uart1_gpio14 {
 				brcm,pins = <14>, <15>;
 				brcm,function = <2>;
 				bootph-all;
 			};
+
+            // I²C
+            i2c0if_gpio0: i2c0if-gpio0 {
+                brcm,pins = <0>, <1>;
+                brcm,function = <4>;
+            };
+            i2c0if_gpio44: i2c0if-gpio44 {
+                brcm,pins = <44>, <45>;
+                brcm,function = <5>;
+            };
+			i2c1_gpio: i2c1 {
+				brcm,pins = <2>, <3>;
+				brcm,function = <4>;
+				brcm,pull = <2>;
+			};
+			i2c3_gpio: i2c3 {
+				brcm,pins = <4>, <5>;
+				brcm,function = <2>;
+				brcm,pull = <2>;
+			};
+			i2c4_gpio: i2c4 {
+				brcm,pins = <8>, <9>;
+				brcm,function = <2>;
+				brcm,pull = <2>;
+			};
+			i2c5_gpio: i2c5 {
+				brcm,pins = <12>, <13>;
+				brcm,function = <2>;
+				brcm,pull = <2>;
+			};
+			i2c6_gpio: i2c6 {
+				brcm,pins = <22>, <23>;
+				brcm,function = <2>;
+				brcm,pull = <2>;
+			};
 		};
 
 		uart0: serial@7e201000 {
@@ -163,7 +197,7 @@
                           "apb_pclk";
 			arm,primecell-periphid = <0x241011>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
+			pinctrl-0 = <&uart0_ctsrts_gpio30>, <&uart0_gpio32>;
 			uart-has-rtscts;
 			status = "okay";
 			skip-init;
@@ -189,6 +223,100 @@
 			bootph-all;
 		};
 
+        i2c0if: i2c@7e205000 {
+			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+			reg = <0x7e205000 0x200>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cprman 0x14>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			status = "okay";
+			clock-frequency = <0x186a0>;
+		};
+
+        i2c0mux: i2c0mux {
+            compatible = "i2c-mux-pinctrl";
+            #address-cells = <0x01>;
+            #size-cells = <0x00>;
+            i2c-parent = <&i2c0if>;
+            status = "okay";
+            pinctrl-names = "i2c0", "i2c_csi_dsi";
+            pinctrl-0 = <&i2c0if_gpio0>;
+            pinctrl-1 = <&i2c0if_gpio44>;
+
+            i2c0: i2c@0 {
+                reg = <0x00>;
+                #address-cells = <0x01>;
+                #size-cells = <0x00>;
+            };
+
+            i2c_csi_dsi: i2c@1 {
+                reg = <0x01>;
+                #address-cells = <0x01>;
+                #size-cells = <0x00>;
+            };
+        };
+		i2c1: i2c@7e804000 {
+			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+			reg = <0x7e804000 0x1000>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cprman 0x14>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_gpio>;
+			clock-frequency = <0x186a0>;
+		};
+        // TODO: memory access crashes on qemu (not implemented?)
+		i2c3: i2c@7e205600 {
+			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+			reg = <0x7e205600 0x200>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cprman 0x14>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			status = "disabled";
+			pinctrl-0 = <&i2c3_gpio>;
+			pinctrl-names = "default";
+		};
+        // TODO: memory access crashes on qemu (not implemented?)
+		i2c4: i2c@7e205800 {
+			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+			reg = <0x7e205800 0x200>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cprman 0x14>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			status = "disabled";
+			pinctrl-0 = <&i2c4_gpio>;
+			pinctrl-names = "default";
+		};
+        // TODO: memory access crashes on qemu (not implemented?)
+		i2c5: i2c@7e205a00 {
+			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+			reg = <0x7e205a00 0x200>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cprman 0x14>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			status = "disabled";
+			pinctrl-0 = <&i2c5_gpio>;
+			pinctrl-names = "default";
+		};
+        // TODO: memory access crashes on qemu (not implemented?)
+		i2c6: i2c@7e205c00 {
+			compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
+			reg = <0x7e205c00 0x200>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cprman 0x14>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			status = "disabled";
+			pinctrl-0 = <&i2c6_gpio>;
+			pinctrl-names = "default";
+		};
+
 		l1_intc: local_intc@40000000 {
 			compatible = "brcm,bcm2836-l1-intc";
 			reg = <0x40000000 0x100>;