device-tree: better driver search, missing reports

This commit is contained in:
2025-07-27 14:08:44 +03:00
parent 51b72aa4d8
commit 96350f1eaf
4 changed files with 104 additions and 37 deletions
+42 -30
View File
@@ -692,7 +692,7 @@
#gpio-cells = <0x02>;
interrupt-controller;
mmc1-0 {
&pinctrl_mmc1_0: mmc1-0 {
phandle = <0x3d>;
clk-pins {
@@ -768,7 +768,7 @@
};
};
mmc0-0 {
&pinctrl_mmc0_0: mmc0-0 {
phandle = <0x3a>;
mmc-pins {
@@ -1064,33 +1064,39 @@
};
};
mmc@16010000 {
fifo-depth = <0x20>;
&mmc0: mmc@16010000 {
compatible = "starfive,jh7110-mmc";
reg = <0x00 0x16010000 0x00 0x10000>;
phandle = <0x9c>;
clock-names = "biu", "ciu";
clocks = <&syscrg 0x5b>, <&syscrg 0x5d>;
assigned-clocks = <&syscrg 0x5d>;
assigned-clock-rates = <0x2faf080>; // 50MHz
reset-names = "reset";
resets = <&syscrg 0x40>;
interrupts = <0x4a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_0>;
fifo-depth = <0x20>;
data-addr = <0x00>;
pinctrl-0 = <0x3a>;
clock-names = "biu\0ciu";
vqmmc-supply = <0x3c>;
assigned-clocks = <0x03 0x5d>;
mmc-hs200-1_8v;
bus-width = <0x08>;
non-removable;
assigned-clock-rates = <0x2faf080>;
resets = <0x03 0x40>;
interrupts = <0x4a>;
clocks = <0x03 0x5b 0x03 0x5d>;
vmmc-supply = <0x3b>;
cap-mmc-hw-reset;
mmc-ddr-1_8v;
compatible = "starfive,jh7110-mmc";
post-power-on-delay-ms = <0xc8>;
status = "okay";
fifo-watermark-aligned;
reg = <0x00 0x16010000 0x00 0x10000>;
phandle = <0x9c>;
max-frequency = <0x5f5e100>;
max-frequency = <0x5f5e100>; // 100MHz
cap-mmc-highspeed;
reset-names = "reset";
starfive,sysreg = <0x22 0x14 0x1a 0x7c000000>;
};
@@ -1356,30 +1362,36 @@
phandle = <0x72>;
};
mmc@16020000 {
fifo-depth = <0x20>;
&mmc1: mmc@16020000 {
compatible = "starfive,jh7110-mmc";
phandle = <0x9d>;
reg = <0x00 0x16020000 0x00 0x10000>;
clock-names = "biu", "ciu";
clocks = <&syscrg 0x5c>, <&syscrg 0x5e>;
assigned-clock-rates = <0x2faf080>; // 50MHz
assigned-clocks = <&syscrg 0x5e>;
resets = <&syscrg 0x41>;
reset-names = "reset";
interrupts = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_0>;
fifo-depth = <0x20>;
data-addr = <0x00>;
pinctrl-0 = <0x3d>;
clock-names = "biu\0ciu";
cap-sd-highspeed;
assigned-clocks = <0x03 0x5e>;
no-mmc;
bus-width = <0x04>;
no-sdio;
assigned-clock-rates = <0x2faf080>;
resets = <0x03 0x41>;
interrupts = <0x4b>;
clocks = <0x03 0x5c 0x03 0x5e>;
broken-cd;
compatible = "starfive,jh7110-mmc";
post-power-on-delay-ms = <0xc8>;
status = "okay";
fifo-watermark-aligned;
reg = <0x00 0x16020000 0x00 0x10000>;
phandle = <0x9d>;
max-frequency = <0x5f5e100>;
reset-names = "reset";
max-frequency = <0x5f5e100>; // 100MHz
starfive,sysreg = <0x22 0x9c 0x01 0x3e>;
};