rv64: fix timer clock scale

Cargo.toml

@@ -91,17 +91,14 @@ unexpected_cfgs = { level = "allow", check-cfg = ['cfg(rust_analyzer)'] }
 [workspace.lints.clippy]
 derivable_impls = { level = "allow" }
 
-# [profile.dev]
+[profile.dev]
-# opt-level = 1
+opt-level = 1
 # split-debuginfo = "packed"
-# lto = "thin"
+lto = "thin"
-# panic = "abort"
+panic = "abort"
 
 [profile.test]
 split-debuginfo = "none"
 
-# [profile.dev.package."*"]
+[profile.dev.package."*"]
-# opt-level = 3
+opt-level = 3
-
-# [profile.dev]
-# opt-level = "s"

kernel/arch/aarch64/src/context.rs

@@ -208,10 +208,12 @@ impl<K: KernelTableManager, PA: PhysicalMemoryAllocator<Address = PhysicalAddres
         stack.push(mdscr_el1);
         stack.push(context.stack_pointer);
 
+        let ttbr0 = context.address_space | (context.asid << 48) | 1;
+
         setup_common_context(
             &mut stack,
             __aarch64_task_enter_user as _,
-            context.address_space,
+            ttbr0,
             context.thread_pointer as _,
         );
 

kernel/arch/aarch64/src/lib.rs

@@ -10,7 +10,7 @@ use aarch64_cpu::registers::{DAIF, MPIDR_EL1, TPIDR_EL1};
 use alloc::{boxed::Box, sync::Arc, vec::Vec};
 use device_api::interrupt::{LocalInterruptController, MessageInterruptController};
 use kernel_arch_interface::{
-    cpu::{CpuImpl, IpiQueue},
+    cpu::{CpuData, CpuImpl, IpiQueue},
     guard::IrqGuard,
     task::Scheduler,
     util::OneTimeInit,
@@ -32,6 +32,8 @@ pub struct PerCpuData {
     pub gic: OneTimeInit<Arc<dyn GicInterface>>,
 }
 
+impl CpuData for PerCpuData {}
+
 static IPI_QUEUES: OneTimeInit<Vec<IpiQueue<ArchitectureImpl>>> = OneTimeInit::new();
 pub static CPU_COUNT: AtomicUsize = AtomicUsize::new(1);
 

kernel/arch/aarch64/src/mem/process.rs

@@ -83,8 +83,9 @@ impl<TA: TableAllocator> ProcessAddressSpaceManager<TA> for ProcessAddressSpaceI
         self.pop_l3_entry(address)
     }
 
-    fn as_address_with_asid(&self) -> u64 {
+    fn as_address_with_asid(&self) -> (u64, u64) {
-        unsafe { u64::from(self.l1.as_physical_address()) | ((self.asid as u64) << 48) | 1 }
+        let physical = unsafe { u64::from(self.l1.as_physical_address()) };
+        (physical, self.asid as u64)
     }
 
     unsafe fn clear(&mut self) {

kernel/arch/i686/src/lib.rs

@@ -8,7 +8,7 @@ use core::ptr::null_mut;
 use alloc::vec::Vec;
 use device_api::interrupt::{LocalInterruptController, MessageInterruptController};
 use kernel_arch_interface::{
-    cpu::{CpuImpl, IpiQueue},
+    cpu::{CpuData, CpuImpl, IpiQueue},
     task::Scheduler,
     Architecture,
 };
@@ -29,6 +29,8 @@ pub struct PerCpuData {
     pub enabled_features: CpuFeatures,
 }
 
+impl CpuData for PerCpuData {}
+
 static mut CPU: *mut () = null_mut();
 
 #[naked]

kernel/arch/i686/src/mem/process.rs

@@ -68,8 +68,8 @@ impl<TA: TableAllocator> ProcessAddressSpaceManager<TA> for ProcessAddressSpaceI
         self.pop_l3_entry(address)
     }
 
-    fn as_address_with_asid(&self) -> u64 {
+    fn as_address_with_asid(&self) -> (u64, u64) {
-        unsafe { self.l0.as_physical_address().into_u64() }
+        (unsafe { self.l0.as_physical_address().into_u64() }, 0)
     }
 }
 

kernel/arch/x86_64/src/lib.rs

@@ -12,7 +12,7 @@ use core::{
 use alloc::{boxed::Box, vec::Vec};
 use device_api::interrupt::{LocalInterruptController, MessageInterruptController};
 use kernel_arch_interface::{
-    cpu::{CpuImpl, IpiQueue},
+    cpu::{CpuData, CpuImpl, IpiQueue},
     task::Scheduler,
     util::OneTimeInit,
     Architecture,
@@ -58,6 +58,8 @@ pub struct PerCpuData {
     pub enabled_features: CpuFeatures,
 }
 
+impl CpuData for PerCpuData {}
+
 impl PerCpuData {
     #[inline]
     pub fn local_apic(&self) -> &dyn LocalApicInterface {

kernel/arch/x86_64/src/mem/process.rs

@@ -71,9 +71,9 @@ impl<TA: TableAllocator> ProcessAddressSpaceManager<TA> for ProcessAddressSpaceI
             .ok_or(Error::InvalidMemoryOperation)
     }
 
-    fn as_address_with_asid(&self) -> u64 {
+    fn as_address_with_asid(&self) -> (u64, u64) {
         // TODO x86-64 PCID/ASID?
-        unsafe { self.l0.as_physical_address().into_u64() }
+        (unsafe { self.l0.as_physical_address().into_u64() }, 0)
     }
 
     unsafe fn clear(&mut self) {

kernel/src/arch/i686/mod.rs

@@ -10,7 +10,7 @@ use device_api::{
 };
 use kernel_arch::{Architecture, ArchitectureImpl};
 use kernel_arch_i686::{gdt, mem::table::L3, PerCpuData};
-use kernel_arch_x86::cpuid::{self, CpuFeatures, EcxFeatures, EdxFeatures};
+use kernel_arch_x86::cpuid::{self, CpuFeatures, EcxFeatures, EdxFeatures, ExtEdxFeatures};
 use libk::{
     arch::Cpu,
     config, debug,
@@ -95,10 +95,12 @@ impl I686 {
             CpuFeatures {
                 ecx: EcxFeatures::SSE3 | EcxFeatures::XSAVE | EcxFeatures::OSXSAVE,
                 edx: EdxFeatures::SSE2 | EdxFeatures::FXSR,
+                ext_edx: ExtEdxFeatures::empty(),
             },
             CpuFeatures {
                 ecx: EcxFeatures::empty(),
                 edx: EdxFeatures::FPU | EdxFeatures::SSE | EdxFeatures::PSE,
+                ext_edx: ExtEdxFeatures::empty(),
             },
         );
         let will_features = will_features.expect("Could not enable needed CPU features");

kernel/src/arch/riscv64/timer.rs

@@ -21,7 +21,6 @@ pub fn handle_interrupt() {
     sbi::sbi_set_timer(now.wrapping_add(frequency / TICK_RATE));
 
     if Cpu::local().is_bootstrap() {
-        let frequency = frequency * 1000;
         let last = LAST_TICK.swap(now, Ordering::Release);
         if frequency != 0 {
             if let Some(delta) = now.checked_sub(last) {