/dts-v1/; / { #address-cells = <0x02>; #size-cells = <0x02>; compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000", "sifive,fu740"; model = "SiFive HiFive Unmatched"; aliases { serial0 = "/soc/serial@10010000"; serial1 = "/soc/serial@10011000"; ethernet0 = "/soc/ethernet@10090000"; }; chosen { stdout-path = "serial0"; }; cpus { #address-cells = <0x01>; #size-cells = <0x00>; timebase-frequency = <0xf4240>; cpu@0 { compatible = "sifive,bullet0", "riscv"; device_type = "cpu"; i-cache-block-size = <0x40>; i-cache-sets = <0x80>; i-cache-size = <0x4000>; next-level-cache = <0x01>; reg = <0x00>; riscv,isa = "rv64imac"; status = "disabled"; interrupt-controller { #interrupt-cells = <0x01>; compatible = "riscv,cpu-intc"; interrupt-controller; phandle = <0x02>; }; }; cpu@1 { compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <0x40>; d-cache-sets = <0x40>; d-cache-size = <0x8000>; d-tlb-sets = <0x01>; d-tlb-size = <0x28>; device_type = "cpu"; i-cache-block-size = <0x40>; i-cache-sets = <0x80>; i-cache-size = <0x8000>; i-tlb-sets = <0x01>; i-tlb-size = <0x28>; mmu-type = "riscv,sv39"; next-level-cache = <0x01>; reg = <0x01>; riscv,isa = "rv64imafdc"; tlb-split; interrupt-controller { #interrupt-cells = <0x01>; compatible = "riscv,cpu-intc"; interrupt-controller; phandle = <0x03>; }; }; cpu@2 { compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <0x40>; d-cache-sets = <0x40>; d-cache-size = <0x8000>; d-tlb-sets = <0x01>; d-tlb-size = <0x28>; device_type = "cpu"; i-cache-block-size = <0x40>; i-cache-sets = <0x80>; i-cache-size = <0x8000>; i-tlb-sets = <0x01>; i-tlb-size = <0x28>; mmu-type = "riscv,sv39"; next-level-cache = <0x01>; reg = <0x02>; riscv,isa = "rv64imafdc"; tlb-split; interrupt-controller { #interrupt-cells = <0x01>; compatible = "riscv,cpu-intc"; interrupt-controller; phandle = <0x04>; }; }; cpu@3 { compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <0x40>; d-cache-sets = <0x40>; d-cache-size = <0x8000>; d-tlb-sets = <0x01>; d-tlb-size = <0x28>; device_type = "cpu"; i-cache-block-size = <0x40>; i-cache-sets = <0x80>; i-cache-size = <0x8000>; i-tlb-sets = <0x01>; i-tlb-size = <0x28>; mmu-type = "riscv,sv39"; next-level-cache = <0x01>; reg = <0x03>; riscv,isa = "rv64imafdc"; tlb-split; interrupt-controller { #interrupt-cells = <0x01>; compatible = "riscv,cpu-intc"; interrupt-controller; phandle = <0x05>; }; }; cpu@4 { compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <0x40>; d-cache-sets = <0x40>; d-cache-size = <0x8000>; d-tlb-sets = <0x01>; d-tlb-size = <0x28>; device_type = "cpu"; i-cache-block-size = <0x40>; i-cache-sets = <0x80>; i-cache-size = <0x8000>; i-tlb-sets = <0x01>; i-tlb-size = <0x28>; mmu-type = "riscv,sv39"; next-level-cache = <0x01>; reg = <0x04>; riscv,isa = "rv64imafdc"; tlb-split; interrupt-controller { #interrupt-cells = <0x01>; compatible = "riscv,cpu-intc"; interrupt-controller; phandle = <0x06>; }; }; }; soc { #address-cells = <0x02>; #size-cells = <0x02>; compatible = "simple-bus"; ranges; interrupt-controller@c000000 { #interrupt-cells = <0x01>; #address-cells = <0x00>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x00 0xc000000 0x00 0x4000000>; riscv,ndev = <0x45>; interrupt-controller; interrupts-extended = <0x02 0xffffffff 0x03 0xffffffff 0x03 0x09 0x04 0xffffffff 0x04 0x09 0x05 0xffffffff 0x05 0x09 0x06 0xffffffff 0x06 0x09>; phandle = <0x09>; }; prci: clock-controller@10000000 { compatible = "sifive,fu740-c000-prci"; reg = <0x00 0x10000000 0x00 0x1000>; clocks = <&clk_hfclk>, <&clk_rtcclk>; #clock-cells = <0x01>; #reset-cells = <0x01>; }; serial@10010000 { compatible = "sifive,fu740-c000-uart", "sifive,uart0"; reg = <0x00 0x10010000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x27>; clocks = <&prci 0x07>; status = "okay"; }; serial@10011000 { compatible = "sifive,fu740-c000-uart", "sifive,uart0"; reg = <0x00 0x10011000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x28>; clocks = <&prci 0x07>; status = "okay"; }; i2c@10030000 { compatible = "sifive,fu740-c000-i2c", "sifive,i2c0"; reg = <0x00 0x10030000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x34>; clocks = <&prci 0x07>; reg-shift = <0x02>; reg-io-width = <0x01>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; temperature-sensor@4c { compatible = "ti,tmp451"; reg = <0x4c>; interrupt-parent = <0x0b>; interrupts = <0x06 0x08>; }; pmic@58 { compatible = "dlg,da9063"; reg = <0x58>; interrupt-parent = <0x0b>; interrupts = <0x01 0x08>; interrupt-controller; regulators { bcore1 { regulator-min-microvolt = <0x100590>; regulator-max-microvolt = <0x100590>; regulator-min-microamp = <0x4c4b40>; regulator-max-microamp = <0x4c4b40>; regulator-always-on; }; bcore2 { regulator-min-microvolt = <0x100590>; regulator-max-microvolt = <0x100590>; regulator-min-microamp = <0x4c4b40>; regulator-max-microamp = <0x4c4b40>; regulator-always-on; }; bpro { regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-min-microamp = <0x2625a0>; regulator-max-microamp = <0x2625a0>; regulator-always-on; }; bperi { regulator-min-microvolt = <0x100590>; regulator-max-microvolt = <0x100590>; regulator-min-microamp = <0x16e360>; regulator-max-microamp = <0x16e360>; regulator-always-on; }; bmem { regulator-min-microvolt = <0x124f80>; regulator-max-microvolt = <0x124f80>; regulator-min-microamp = <0x2dc6c0>; regulator-max-microamp = <0x2dc6c0>; regulator-always-on; }; bio { regulator-min-microvolt = <0x124f80>; regulator-max-microvolt = <0x124f80>; regulator-min-microamp = <0x2dc6c0>; regulator-max-microamp = <0x2dc6c0>; regulator-always-on; }; ldo1 { regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-min-microamp = <0x186a0>; regulator-max-microamp = <0x186a0>; regulator-always-on; }; ldo2 { regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; regulator-always-on; }; ldo3 { regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; regulator-always-on; }; ldo4 { regulator-min-microvolt = <0x2625a0>; regulator-max-microvolt = <0x2625a0>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; regulator-always-on; }; ldo5 { regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-min-microamp = <0x186a0>; regulator-max-microamp = <0x186a0>; regulator-always-on; }; ldo6 { regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; regulator-always-on; }; ldo7 { regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; regulator-always-on; }; ldo8 { regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; regulator-always-on; }; ldo9 { regulator-min-microvolt = <0x100590>; regulator-max-microvolt = <0x100590>; regulator-min-microamp = <0x30d40>; regulator-max-microamp = <0x30d40>; }; ldo10 { regulator-min-microvolt = <0xf4240>; regulator-max-microvolt = <0xf4240>; regulator-min-microamp = <0x493e0>; regulator-max-microamp = <0x493e0>; }; ldo11 { regulator-min-microvolt = <0x2625a0>; regulator-max-microvolt = <0x2625a0>; regulator-min-microamp = <0x493e0>; regulator-max-microamp = <0x493e0>; regulator-always-on; }; }; }; }; i2c@10031000 { compatible = "sifive,fu740-c000-i2c", "sifive,i2c0"; reg = <0x00 0x10031000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x35>; clocks = <&prci 0x07>; reg-shift = <0x02>; reg-io-width = <0x01>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; }; spi@10040000 { compatible = "sifive,fu740-c000-spi", "sifive,spi0"; reg = <0x00 0x10040000 0x00 0x1000 0x00 0x20000000 0x00 0x10000000>; interrupt-parent = <0x09>; interrupts = <0x29>; clocks = <&prci 0x07>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; flash@0 { compatible = "issi,is25wp256", "jedec,spi-nor"; reg = <0x00>; spi-max-frequency = <0x2faf080>; m25p,fast-read; spi-tx-bus-width = <0x04>; spi-rx-bus-width = <0x04>; }; }; spi@10041000 { compatible = "sifive,fu740-c000-spi", "sifive,spi0"; reg = <0x00 0x10041000 0x00 0x1000 0x00 0x30000000 0x00 0x10000000>; interrupt-parent = <0x09>; interrupts = <0x2a>; clocks = <&prci 0x07>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; }; spi@10050000 { compatible = "sifive,fu740-c000-spi", "sifive,spi0"; reg = <0x00 0x10050000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x2b>; clocks = <&prci 0x07>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; mmc@0 { compatible = "mmc-spi-slot"; reg = <0x00>; spi-max-frequency = <0x1312d00>; voltage-ranges = <0xce4 0xce4>; disable-wp; }; }; macb: ethernet@10090000 { compatible = "sifive,fu540-c000-gem"; interrupt-parent = <0x09>; interrupts = <0x37>; reg = <0x00 0x10090000 0x00 0x2000 0x00 0x100a0000 0x00 0x1000>; local-mac-address = [00 00 00 00 00 00]; clock-names = "pclk", "hclk"; clocks = <&prci 0x02 &prci 0x02>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; phy-mode = "gmii"; phy-handle = <0x0c>; ethernet-phy@0 { reg = <0x00>; phandle = <0x0c>; }; }; pwm@10020000 { compatible = "sifive,fu740-c000-pwm", "sifive,pwm0"; reg = <0x00 0x10020000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x2c 0x2d 0x2e 0x2f>; clocks = <&prci 0x07>; #pwm-cells = <0x03>; status = "okay"; phandle = <0x0d>; }; pwm@10021000 { compatible = "sifive,fu740-c000-pwm", "sifive,pwm0"; reg = <0x00 0x10021000 0x00 0x1000>; interrupt-parent = <0x09>; interrupts = <0x30 0x31 0x32 0x33>; clocks = <&prci 0x07>; #pwm-cells = <0x03>; status = "okay"; }; cache-controller@2010000 { compatible = "sifive,fu740-c000-ccache", "cache"; cache-block-size = <0x40>; cache-level = <0x02>; cache-sets = <0x800>; cache-size = <0x200000>; cache-unified; interrupt-parent = <0x09>; interrupts = <0x13 0x15 0x16 0x14>; reg = <0x00 0x2010000 0x00 0x1000>; phandle = <0x01>; }; gpio@10060000 { compatible = "sifive,fu740-c000-gpio", "sifive,gpio0"; interrupt-parent = <0x09>; interrupts = <0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26>; reg = <0x00 0x10060000 0x00 0x1000>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; clocks = <&prci 0x07>; status = "okay"; phandle = <0x0b>; }; pcie@e00000000 { #address-cells = <0x03>; #interrupt-cells = <0x01>; #num-lanes = <0x08>; #size-cells = <0x02>; compatible = "sifive,fu740-pcie"; reg = <0x0e 0x00 0x01 0x00 0x0d 0xf0000000 0x00 0x10000000 0x00 0x100d0000 0x00 0x1000>; reg-names = "dbi", "config", "mgmt"; device_type = "pci"; dma-coherent; bus-range = <0x00 0xff>; ranges = <0x81000000 0x00 0x60080000 0x00 0x60080000 0x00 0x10000 0x82000000 0x00 0x60090000 0x00 0x60090000 0x00 0xff70000 0x82000000 0x00 0x70000000 0x00 0x70000000 0x00 0x1000000 0xc3000000 0x20 0x00 0x20 0x00 0x20 0x00>; num-lanes = <0x08>; interrupts = <0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40>; interrupt-names = "msi", "inta", "intb", "intc", "intd"; interrupt-parent = <0x09>; interrupt-map-mask = <0x00 0x00 0x00 0x07>; interrupt-map = <0x00 0x00 0x00 0x01 0x09 0x39 0x00 0x00 0x00 0x02 0x09 0x3a 0x00 0x00 0x00 0x03 0x09 0x3b 0x00 0x00 0x00 0x04 0x09 0x3c>; clock-names = "pcie_aux"; clocks = <&prci 0x08>; pwren-gpios = <0x0b 0x05 0x00>; perstn-gpios = <0x0b 0x08 0x00>; resets = <&prci 0x04>; status = "okay"; }; }; memory@80000000 { device_type = "memory"; reg = <0x00 0x80000000 0x04 0x00>; }; pwmleds { compatible = "pwm-leds"; green-d12 { label = "green:d12"; pwms = <0x0d 0x00 0x773594 0x01>; active-low = <0x01>; max-brightness = <0xff>; linux,default-trigger = "none"; }; green-d2 { label = "green:d2"; pwms = <0x0d 0x01 0x773594 0x01>; active-low = <0x01>; max-brightness = <0xff>; linux,default-trigger = "none"; }; red-d2 { label = "red:d2"; pwms = <0x0d 0x02 0x773594 0x01>; active-low = <0x01>; max-brightness = <0xff>; linux,default-trigger = "none"; }; blue-d2 { label = "blue:d2"; pwms = <0x0d 0x03 0x773594 0x01>; active-low = <0x01>; max-brightness = <0xff>; linux,default-trigger = "none"; }; }; clk_hfclk: hfclk { #clock-cells = <0x00>; compatible = "fixed-clock"; clock-frequency = <26000000>; clock-output-names = "hfclk"; }; clk_rtcclk: rtcclk { #clock-cells = <0x00>; compatible = "fixed-clock"; clock-frequency = <1000000>; clock-output-names = "rtcclk"; }; gpio-poweroff { compatible = "gpio-poweroff"; gpios = <0x0b 0x02 0x01>; }; };