diff --git a/src/arch/aarch64/regs.zig b/src/arch/aarch64/regs.zig
index 06e85a2..cb984b1 100644
--- a/src/arch/aarch64/regs.zig
+++ b/src/arch/aarch64/regs.zig
@@ -1,4 +1,4 @@
-fn makeRegister(comptime name: []const u8, comptime bits: type) type {
+fn Register(comptime name: []const u8, comptime bits: type) type {
     const repr = switch (@typeInfo(bits)) {
         .@"struct" => |s| s.backing_integer.?,
         else => bits,
@@ -27,8 +27,8 @@ fn makeRegister(comptime name: []const u8, comptime bits: type) type {
     };
 }
 
-pub const TTBR0_EL1 = makeRegister("ttbr0_el1", u64);
-pub const TTBR1_EL1 = makeRegister("ttbr1_el1", u64);
+pub const TTBR0_EL1 = Register("ttbr0_el1", u64);
+pub const TTBR1_EL1 = Register("ttbr1_el1", u64);
 
 pub const Cacheability = enum(u2) {
     non_cacheable = 0,
@@ -51,7 +51,7 @@ pub const TranslationGranule = enum(u2) {
     _
 };
 
-pub const TCR_EL1 = makeRegister("tcr_el1", packed struct(u64) {
+pub const TCR_EL1 = Register("tcr_el1", packed struct(u64) {
     // 0..6
     T0SZ: u6 = 0,
     // 6
@@ -104,7 +104,7 @@ pub const TCR_EL1 = makeRegister("tcr_el1", packed struct(u64) {
     _2: u25 = 0,
 });
 
-pub const SCTLR_EL1 = makeRegister("sctlr_el1", packed struct (u64) {
+pub const SCTLR_EL1 = Register("sctlr_el1", packed struct (u64) {
     // 0
     M: bool = false,
     // 1
diff --git a/src/arch/riscv64/regs.zig b/src/arch/riscv64/regs.zig
index 8283e30..4af215e 100644
--- a/src/arch/riscv64/regs.zig
+++ b/src/arch/riscv64/regs.zig
@@ -1,15 +1,20 @@
-fn makeRegister(comptime name: []const u8, comptime bits: type) type {
+fn Register(comptime name: []const u8, comptime bits: type) type {
     const repr = switch (@typeInfo(bits)) {
         .@"struct" => |s| s.backing_integer.?,
         else => bits,
     };
     return enum(repr) {
         pub fn set(value: repr) void {
-            asm volatile ("csrw " ++ name ++ ", %[value]"::[value]"r"(value));
+            asm volatile ("csrw " ++ name ++ ", %[value]"
+                :
+                : [value] "r" (value),
+            );
         }
 
         pub fn get() repr {
-            return asm volatile ("csrr %[value], " ++ name:[value]"=r"(-> repr));
+            return asm volatile ("csrr %[value], " ++ name
+                : [value] "=r" (-> repr),
+            );
         }
 
         pub fn write(value: bits) void {
@@ -27,7 +32,7 @@ fn makeRegister(comptime name: []const u8, comptime bits: type) type {
     };
 }
 
-pub const SATP = makeRegister("satp", packed struct(u64) {
+pub const SATP = Register("satp", packed struct(u64) {
     // 0..44
     PPN: u44 = 0,
     // 44..60
@@ -37,10 +42,10 @@ pub const SATP = makeRegister("satp", packed struct(u64) {
         bare = 0,
         sv39 = 8,
         _,
-    } = .bare
+    } = .bare,
 });
 
-pub const SSTATUS = makeRegister("sstatus", packed struct(u64) {
+pub const SSTATUS = Register("sstatus", packed struct(u64) {
     // 0
     _0: u1 = 0,
     // 1
@@ -57,7 +62,7 @@ pub const SSTATUS = makeRegister("sstatus", packed struct(u64) {
     _3: u45 = 0,
 });
 
-pub const STVEC = makeRegister("stvec", packed struct(u64) {
+pub const STVEC = Register("stvec", packed struct(u64) {
     MODE: enum(u2) {
         direct = 0,
         vectored = 1,
@@ -65,10 +70,10 @@ pub const STVEC = makeRegister("stvec", packed struct(u64) {
     BASE: u62 = 0,
 });
 
-pub const SCAUSE = makeRegister("scause", packed struct(u64) {
+pub const SCAUSE = Register("scause", packed struct(u64) {
     CODE: u63 = 0,
-    INTERRUPT: bool = false
+    INTERRUPT: bool = false,
 });
 
-pub const STVAL = makeRegister("stval", u64);
-pub const SEPC = makeRegister("sepc", u64);
+pub const STVAL = Register("stval", u64);
+pub const SEPC = Register("sepc", u64);