-
ff2932d088
WIP: test objects
mark/wip-userspace
alnyan
2025-03-27 23:37:11 +02:00
-
d25e1c0346
sys: add abi module to bridge kernel<->userspace
alnyan
2025-03-27 11:35:03 +02:00
-
0f157caf5c
WIP: Make userspace a bit more useful
alnyan
2025-03-26 21:57:18 +02:00
-
3c27839bff
WIP: Add userspace zig program
alnyan
2025-03-26 18:10:46 +02:00
-
47dbe64814
WIP: Implement system call interface
alnyan
2025-03-26 16:55:01 +02:00
-
b1a59dd42b
WIP: Implement thread exit
alnyan
2025-03-26 15:33:41 +02:00
-
e1bd496b8f
WIP: Enter kernel tasks via exception return
alnyan
2025-03-26 14:36:04 +02:00
-
f57fd485c5
WIP: Allow userspace to use stack
alnyan
2025-03-26 14:22:33 +02:00
-
000b434c96
WIP: Userspace entry code for both platforms
alnyan
2025-03-26 14:09:17 +02:00
-
307d87d6d6
WIP: Add a userspace entry to riscv64
alnyan
2025-03-25 17:01:11 +02:00
-
e72bbfff3f
rangemap: implement free_range
free-range
Eugene Rossokha
2025-03-24 21:58:46 +02:00
-
33d7adf63c
rangemap: CamelCase the error
Eugene Rossokha
2025-03-24 21:58:46 +02:00
-
aa2743b05f
btree/rangemap: CamelCase the error names
Eugene Rossokha
2025-03-24 14:39:58 +02:00
-
4511e36ae5
range: make sure the generic in an integer
Eugene Rossokha
2025-03-24 14:39:58 +02:00
-
-
7c8dbfbd0f
mm: implement a basic virtual memory manager
master
alnyan
2025-03-24 23:35:56 +02:00
-
1effc9e76f
phys: remove comment about merging bitmap/refcounts
alnyan
2025-03-24 10:16:54 +02:00
-
1bc326de6d
phys: remove struct Page, unused
alnyan
2025-03-24 10:16:02 +02:00
-
bc91b5c07c
phys: make reserved/available regions operate on PFNs
alnyan
2025-03-24 10:14:41 +02:00
-
23bb7bb63e
lib: implement merge on insert in rangemap
alnyan
2025-03-24 09:34:23 +02:00
-
0785c424b9
btree/rangemap: rename .new to .init
Eugene Rossokha
2025-03-23 13:12:47 +02:00
-
0a89436d86
phys: use a bitmap to track pages, get the refcounters out
Eugene Rossokha
2025-03-20 10:30:09 +02:00
-
a97d79d8ca
lib: implement RangeMap/BTree
alnyan
2025-03-20 09:59:26 +02:00
-
734cd7eb0e
aarch64: feature parity with riscv64
alnyan
2025-03-18 20:02:18 +02:00
-
1a8d842479
refactor: we're not writing Java here
alnyan
2025-03-18 15:13:48 +02:00
-
d3e44e5067
sync: Spinlock lock_irqsave() impl
alnyan
2025-03-18 14:37:31 +02:00
-
c0df9d712d
maint: better arch.zig
alnyan
2025-03-18 14:26:49 +02:00
-
f85d04d715
Add more entries to .gitignore
alnyan
2025-03-18 14:18:58 +02:00
-
9911c7ea9b
aarch64: feature parity with riscv64
mark/dev
alnyan
2025-03-18 20:02:18 +02:00
-
b77568ca24
refactor: we're not writing Java here
alnyan
2025-03-18 15:13:48 +02:00
-
a377cd68b3
sync: Spinlock lock_irqsave() impl
alnyan
2025-03-18 14:37:31 +02:00
-
ed78052736
maint: better arch.zig
alnyan
2025-03-18 14:26:49 +02:00
-
32f636b149
Add more entries to .gitignore
alnyan
2025-03-18 14:18:58 +02:00
-
cb84b24354
dtb: make dtb struct more useful
alnyan
2025-03-18 09:51:41 +02:00
-
-
32b324b132
doc: add some documentation on platform-independent modules
alnyan
2025-03-18 13:09:02 +02:00
-
500a99832c
doc: add "docs" step to build.zig
alnyan
2025-03-18 12:11:11 +02:00
-
0de39ac75b
aarch64: implement exception stubs
alnyan
2025-03-18 12:03:29 +02:00
-
a668443bea
dtb: make dtb struct more useful
alnyan
2025-03-18 09:51:41 +02:00
-
3f79177839
aarch64: physical memory setup
alnyan
2025-03-18 09:31:13 +02:00
-
dc7968f92f
Rename makeRegister to Register
misc
Eugene Rossokha
2025-03-17 23:49:41 +02:00
-
64eae5052e
Rename Arena.setup to Arena.init
Eugene Rossokha
2025-03-17 23:48:40 +02:00
-
7a1a088cbc
Use std.BoundedArray instead of FixedVec
Eugene Rossokha
2025-03-17 23:39:33 +02:00
-
883f0db654
Rename translationLevel to TranslationLevel
Eugene Rossokha
2025-03-17 23:39:33 +02:00
-
7305ce220a
AArch64 basic boot and upper reloc
alnyan
2025-03-17 23:05:53 +02:00
-
caec288157
Restrict the target to .freestanding/.none/supported cpu
Eugene Rossokha
2025-03-17 20:05:24 +02:00
-
aee04d2510
Add aarch64 target
alnyan
2025-03-17 19:56:43 +02:00
-
1641327f28
Make arch/riscv64.zig one struct
Eugene Rossokha
2025-03-17 19:15:14 +02:00
-
c4a80c3378
Make thread queue per-CPU
alnyan
2025-03-17 17:54:51 +02:00
-
c803a3e2b2
Implement thread-locals for per-CPU data
alnyan
2025-03-17 17:26:40 +02:00
-
856c7b273e
Implement S-mode exceptions
alnyan
2025-03-17 16:01:12 +02:00
-
4437a66025
Basic physical memory management
alnyan
2025-03-17 13:36:49 +02:00
-
aeb5950e56
Basic thread switching
alnyan
2025-03-14 22:16:36 +02:00
-
bebdb21c4e
WIP: WIP, WIP
alnyan
2025-03-14 13:00:54 +02:00
-
467e4a944a
Initial commit
alnyan
2025-03-13 18:06:14 +02:00