// export const _ = @import("arch/riscv64/boot.zig").rv64BspLowerEntry;
pub const arch = @import("arch.zig").arch();
pub const mem = @import("mem.zig");
pub const debug = @import("debug.zig");
pub const arena = @import("arena.zig");
pub const thread = @import("thread.zig");

pub const log = debug.log;
pub const vmm = mem.vmm;

pub const TRACE_PHYSICAL_ALLOCATOR: bool = false;

const std = @import("std");

fn f0(arg: usize) callconv(.C) noreturn {
    var c: usize = 0;
    while (true) {
        f1(arg, c);
        c += 1;
    }
}

noinline fn f1(arg: usize, c: usize) void {
    log.write("\x1B[1;{}H{}", .{ arg + 1, (c + arg) % 10 });
}

pub export fn kernel_main() callconv(.C) noreturn {
    var a = arena.Arena.setup(256 * 0x1000) orelse @panic("Could not setup kernel arena");
    const pc = @intFromPtr(&f0);

    // log.write("\x1B[2J", .{});
    for (0..32) |i| {
        const t = thread.Thread.create(&a, pc, i);
        thread.addThread(t);
    }

    thread.enter();

    arch.halt();
}

pub fn panic(msg: []const u8, error_return_trace: ?*std.builtin.StackTrace, return_address: ?usize) noreturn {
    _ = error_return_trace;

    const ra = return_address orelse @returnAddress();

    log.err("!!! Kernel panic !!!", .{});
    log.err("    Reason: {s}", .{msg});
    log.err("    At: 0x{x}", .{ra});

    arch.halt();
}