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zing/src/arch.zig
T
2025-03-26 15:33:41 +02:00

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Zig

//! Helper module to select architecture-specific modules depending on what platform is
//! being targeted.
const std = @import("std");
const builtin = @import("builtin");
pub const cpu: enum {
riscv64,
aarch64,
} = switch (builtin.cpu.arch) {
.riscv64 => .riscv64,
.aarch64 => .aarch64,
else => @compileError("Unsupported architecture"),
};
pub const impl = switch (cpu) {
.riscv64 => @import("arch/riscv64.zig"),
.aarch64 => @import("arch/aarch64.zig"),
};
pub const vmm = impl.vmm;
pub const IrqGuard = struct {
state: bool,
pub fn acquire() @This() {
const state = set_interrupt_mask(true);
return .{ .state = state };
}
pub fn release(self: @This()) void {
set_interrupt_mask(self.state);
}
};
/// Halts the CPU execution indefinitely, without ever returning.
pub inline fn halt() noreturn {
impl.halt();
}
/// Returns the current state of IRQ masking.
pub inline fn interrupt_mask() bool {
return impl.interrupt_mask();
}
/// Modifies the interrupt mask to either allow or block IRQs from being delivered to the CPU.
/// Returns the old IRQ mask.
pub inline fn set_interrupt_mask(masked: bool) bool {
return impl.set_interrupt_mask(masked);
}
/// Suspends the CPU until an interrupt is signalled.
pub inline fn wait_for_interrupt() void {
impl.wait_for_interrupt();
}
/// Hint to the CPU that the code is executing a "busy-wait" or a "spin-wait" loop.
pub inline fn spin_hint() void {
impl.spin_hint();
}
/// Set the CPU's thread pointer to some value.
pub inline fn set_thread_pointer(value: usize) void {
impl.set_thread_pointer(value);
}
/// Combined memory/compiler fence to ensure specific ordering of instructions and memory accesses.
pub inline fn barrier(ordering: std.builtin.AtomicOrder) void {
impl.barrier(ordering);
}
/// Platform-specific task context implementation
pub const Context = impl.Context;