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binutils-gdb/sim/testsuite/msp430/ChangeLog-2021

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sim: testsuite: calculate $arch from $subdir Since we require ports to use a matching subdir name in the testsuite tree, we can use that to calculate the $arch value.
2021-04-04 09:01:09 -04:00
2021-04-08 Mike Frysinger <vapier@gentoo.org>
* allinsn.exp (arch): Delete.
sim: testsuite: push $arch out to targets This is needed to move to automake & its dejagnu-provided logic, and eventually by the unified sim logic. The $arch is used only to figure out which `run` program to use when running tests, and as we move to a single top-level build, we can delete this and use sim/run directly.
2021-01-15 23:23:46 -05:00
2021-02-13 Mike Frysinger <vapier@gentoo.org>
* allinsn.exp: Define arch.
MSP430: sim: Fix incorrect simulation of unsigned widening multiply Operand sizes used for simulation of MSP430 hardware multiply operations are not aligned with the sizes used on the target, resulting in the simulator storing signed operands with too much precision. Additionally, simulation of unsigned multiplication is missing explicit casts to prevent any implicit sign extension. gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication of 32-bit operands -4 and 2, to produce a 64-bit result: 0xffff fffc * 0x2 = 0x1 ffff fff8 If -4 is stored in 64-bit precision, then the multiplication is essentially signed and the result is -8 in 64-bit precision (0xffff ffff ffff fffc), which is not correct. sim/msp430/ChangeLog: * msp430-sim.c (put_op): For unsigned multiplication, explicitly cast operands to the unsigned type before multiplying. * msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult operands. sim/testsuite/sim/msp430/ChangeLog: * mpyull_hwmult.s: New test.
2020-07-28 10:36:10 +01:00
2020-08-05 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* mpyull_hwmult.s: New test.
MSP430: Fix simulator execution of RRUX instruction The MSP430X RRUX instruction (unsigned right shift) is synthesized as the RRC (rotate right through carry) instruction, but with the ZC (zero carry) bit of the opcode extention word set. Ensure the carry flag is ignored when the ZC bit is set. sim/msp430/ChangeLog: 2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> * msp430-sim.c (msp430_step_once): Ignore the carry flag when executing an RRC instruction, if the ZC bit of the extension word is set. sim/testsuite/sim/msp430/ChangeLog: 2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> * rrux.s: New test.
2020-01-22 21:44:54 +00:00
2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* rrux.s: New test.
Fix the execution of the MSP430 simulator testsuite. ld * emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the MSP430 hardware multiply address range. * scripttempl/elf32msp430.sc (__romdatastart): Define. (__romdatacopysize): Define. * scripttempl/elf32msp430_3.sc: Likewise. tests * testutils.inc (__pass): Use the LMA addresses of the _passmsg symbol. (__fail): Likewise.
2016-01-05 16:43:58 +00:00
2016-01-05 Nick Clifton <nickc@redhat.com>
* testutils.inc (__pass): Use the LMA addresses of the _passmsg
symbol.
(__fail): Likewise.
sim: msp430: start a test framework The current sim lacks any sort of tests. Start a basic framework and add a simple one to test the add insn.
2014-03-08 00:21:13 -05:00
2014-03-10 Mike Frysinger <vapier@gentoo.org>
* add.s, allinsn.exp, testutils.inc: New files.
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