arc: Update opcode related include files for ARCv3.
Add new ARCv3 CPUs and required bits to decode/encode ARCv3 ISA opcodes. Fix 32 bit relocations which were set as signed but should be bitfield: ARC_32_ME, ARC_GLOB_DAT, ARC_JMP_SLOT, ARC_RELATIVE. Remove non-ABI relocation ARC_32_ME_S. include/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> Cupertino Miranda <cupertinomiranda@gmail.com> Bruno Mauricio <brunoasmauricio@gmail.com> * include/elf/arc-cpu.def: Add new HS5x and HS6x CPUs. * include/elf/arc-reloc.def: Add new ARC64 relocations. * include/elf/arc.h (EF_ARC_CPU_ARC64): New define. * include/opcode/arc-attrs.h (FEATURE_LIST_NAME): Update predicate. * include/opcode/arc-func.h: Update formating. (replace_disp8ls): New function. (replace_disp9s): Likewise. (replace_disp6s): Likewise. (replace_disp7s): Likewise. (replace_disp12s): Likewise. * include/opcode/arc.h (ARC_OPCODE_ARC64): New define. (ARC_OPCODE_ARC32): Likewise. (ARC_OPERAND_FP): Likewise. (HARD_FIELDF): Likewise. (ARC_OPCODE_ARCVx): New macro. (arc_flag_class): Update structure to hold new extract/insert functions for flags. (INSN3OP): Update macro. (FP_SIZE, TPOF, DPOF, SOPF, COPF, CONVOPS): New enums. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
This commit is contained in:
Claudiu Zissulescu
Claudiu Zissulescu
parent
4deb1ee57f
commit
04414221df
@ -19,35 +19,40 @@
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02110-1301, USA. */
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ARC_CPU_TYPE_A7xx (arc700, 0x00),
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ARC_CPU_TYPE_A7xx (nps400, NPS400),
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ARC_CPU_TYPE_A64x (hs6x, CD | DIV)
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ARC_CPU_TYPE_A32x (hs5x, CD | DIV)
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ARC_CPU_TYPE_A64x (hs68, CD | DIV)
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ARC_CPU_TYPE_A32x (hs58, CD | DIV)
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ARC_CPU_TYPE_AV2EM (arcem, 0x00),
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ARC_CPU_TYPE_AV2EM (em, 0x00),
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ARC_CPU_TYPE_AV2EM (em_mini, 0x00),
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ARC_CPU_TYPE_AV2EM (em4, CD),
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ARC_CPU_TYPE_AV2EM (em4_dmips, CD),
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ARC_CPU_TYPE_AV2EM (em4_fpus, CD),
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ARC_CPU_TYPE_AV2EM (em4_fpuda, CD | DPA),
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ARC_CPU_TYPE_AV2EM (quarkse_em, CD | SPX | DPX),
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ARC_CPU_TYPE_A7xx (arc700, 0x00)
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ARC_CPU_TYPE_A7xx (nps400, NPS400)
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ARC_CPU_TYPE_AV2HS (archs, CD),
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ARC_CPU_TYPE_AV2HS (hs, CD),
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ARC_CPU_TYPE_AV2HS (hs34, CD),
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ARC_CPU_TYPE_AV2HS (hs38, CD),
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ARC_CPU_TYPE_AV2HS (hs38_linux, CD),
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ARC_CPU_TYPE_AV2HS (hs4x, CD),
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ARC_CPU_TYPE_AV2HS (hs4xd, CD),
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ARC_CPU_TYPE_AV2HS (hs4x_rel31, CD),
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ARC_CPU_TYPE_AV2EM (arcem, 0x00)
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ARC_CPU_TYPE_AV2EM (em, 0x00)
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ARC_CPU_TYPE_AV2EM (em_mini, 0x00)
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ARC_CPU_TYPE_AV2EM (em4, CD)
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ARC_CPU_TYPE_AV2EM (em4_dmips, CD)
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ARC_CPU_TYPE_AV2EM (em4_fpus, CD)
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ARC_CPU_TYPE_AV2EM (em4_fpuda, CD | DPA)
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ARC_CPU_TYPE_AV2EM (quarkse_em, CD | SPX | DPX)
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ARC_CPU_TYPE_A6xx (arc600, 0x00),
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ARC_CPU_TYPE_A6xx (arc600_norm, 0x00),
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ARC_CPU_TYPE_A6xx (arc600_mul64, 0x00),
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ARC_CPU_TYPE_A6xx (arc600_mul32x16, 0x00),
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ARC_CPU_TYPE_A6xx (arc601, 0x00),
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ARC_CPU_TYPE_A6xx (arc601_norm, 0x00),
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ARC_CPU_TYPE_A6xx (arc601_mul64, 0x00),
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ARC_CPU_TYPE_A6xx (arc601_mul32x16, 0x00),
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ARC_CPU_TYPE_AV2HS (archs, CD)
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ARC_CPU_TYPE_AV2HS (hs, CD)
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ARC_CPU_TYPE_AV2HS (hs34, CD)
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ARC_CPU_TYPE_AV2HS (hs38, CD)
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ARC_CPU_TYPE_AV2HS (hs38_linux, CD)
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ARC_CPU_TYPE_AV2HS (hs4x, CD)
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ARC_CPU_TYPE_AV2HS (hs4xd, CD)
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ARC_CPU_TYPE_AV2HS (hs4x_rel31, CD)
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ARC_CPU_TYPE_A6xx (arc600, 0x00)
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ARC_CPU_TYPE_A6xx (arc600_norm, 0x00)
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ARC_CPU_TYPE_A6xx (arc600_mul64, 0x00)
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ARC_CPU_TYPE_A6xx (arc600_mul32x16, 0x00)
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ARC_CPU_TYPE_A6xx (arc601, 0x00)
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ARC_CPU_TYPE_A6xx (arc601_norm, 0x00)
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ARC_CPU_TYPE_A6xx (arc601_mul64, 0x00)
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ARC_CPU_TYPE_A6xx (arc601_mul32x16, 0x00)
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ARC_CPU_TYPE_NONE
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@ -64,6 +64,13 @@ ARC_RELOC_HOWTO(ARC_32, 4, \
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bitfield, \
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( S + A ))
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ARC_RELOC_HOWTO(ARC_64, 5, \
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8, \
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64, \
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replace_word64, \
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bitfield, \
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( S + A ))
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ARC_RELOC_HOWTO(ARC_N8, 8, \
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1, \
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8, \
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@ -201,14 +208,7 @@ ARC_RELOC_HOWTO(ARC_32_ME, 27, \
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4, \
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32, \
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replace_limm, \
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signed, \
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( ME ( ( S + A ) ) ))
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ARC_RELOC_HOWTO(ARC_32_ME_S, 105, \
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4, \
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32, \
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replace_limms, \
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signed, \
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bitfield, \
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( ME ( ( S + A ) ) ))
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ARC_RELOC_HOWTO(ARC_N32_ME, 28, \
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@ -369,21 +369,21 @@ ARC_RELOC_HOWTO(ARC_GLOB_DAT, 54, \
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4, \
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32, \
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replace_word32, \
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signed, \
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bitfield, \
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S)
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ARC_RELOC_HOWTO(ARC_JMP_SLOT, 55, \
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4, \
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32, \
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replace_word32, \
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signed, \
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bitfield, \
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( ME ( S ) ))
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ARC_RELOC_HOWTO(ARC_RELATIVE, 56, \
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4, \
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32, \
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replace_word32, \
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signed, \
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bitfield, \
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( ME ( ( B + A ) ) ))
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ARC_RELOC_HOWTO(ARC_GOTOFF, 57, \
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@ -511,3 +511,152 @@ ARC_RELOC_HOWTO(ARC_NPS_CMEM16, 78, \
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replace_bits16, \
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dont, \
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( ME ( S + A )))
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ARC_RELOC_HOWTO(ARC_S9H_PCREL, 79, \
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4, \
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8, \
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replace_disp8ls, \
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signed, \
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( ME ( ( ( ( S + A ) - P ) >> 1 ) ) ) )
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ARC_RELOC_HOWTO(ARC_S7H_PCREL, 80, \
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2, \
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6, \
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replace_disp6s, \
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signed, \
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( ( ( ( S + A ) - P ) >> 1 ) ) )
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ARC_RELOC_HOWTO(ARC_S8H_PCREL, 81, \
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2, \
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7, \
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replace_disp7s, \
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signed, \
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( ( ( ( S + A ) - P ) >> 1 ) ) )
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ARC_RELOC_HOWTO(ARC_S10H_PCREL, 82, \
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2, \
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9, \
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replace_disp9s, \
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signed, \
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( ( ( ( S + A ) - P ) >> 1 ) ) )
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ARC_RELOC_HOWTO(ARC_S13H_PCREL, 83, \
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4, \
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12, \
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replace_disp12s, \
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signed, \
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( ME ( ( ( ( S + A ) - P ) >> 1 ) ) ) )
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ARC_RELOC_HOWTO(ARC_ALIGN, 84, \
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4, \
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0, \
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replace_none, \
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dont, \
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0 )
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ARC_RELOC_HOWTO(ARC_ADD8, 85, \
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1, \
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8, \
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replace_bits8, \
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dont, \
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( S + A ))
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ARC_RELOC_HOWTO(ARC_ADD16, 86, \
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2, \
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16, \
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replace_bits16, \
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dont, \
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( S + A ))
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ARC_RELOC_HOWTO(ARC_SUB8, 87, \
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1, \
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8, \
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replace_bits8, \
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dont, \
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( A - S + ICARRY ))
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ARC_RELOC_HOWTO(ARC_SUB16, 88, \
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2, \
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16, \
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replace_bits16, \
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dont, \
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( A - S + ICARRY ))
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ARC_RELOC_HOWTO(ARC_SUB32, 89, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( A - S + ICARRY))
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ARC_RELOC_HOWTO(ARC_LO32, 90, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( ( S + A ) & 4294967295 ))
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ARC_RELOC_HOWTO(ARC_HI32, 91, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( ( S + A ) >> 32 ))
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ARC_RELOC_HOWTO(ARC_LO32_ME, 92, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( ME ( ( ( S + A ) & 4294967295 ) ) ))
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ARC_RELOC_HOWTO(ARC_HI32_ME, 93, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( ME ( ( ( S + A ) >> 32 ) ) ))
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ARC_RELOC_HOWTO(ARC_N64, 94, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( DEREFP - ( S + A ) ))
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ARC_RELOC_HOWTO(ARC_SDA_LDST3, 95, \
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4, \
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9, \
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replace_disp9ls, \
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signed, \
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( ( ( S + A ) - _SDA_BASE_ ) >> 3 ))
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ARC_RELOC_HOWTO(ARC_NLO32, 96, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( DEREFP - ( ( S + A ) & 4294967295 ) ))
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ARC_RELOC_HOWTO(ARC_NLO32_ME, 97, \
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4, \
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32, \
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replace_word32, \
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dont, \
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( ME ( ( DEREFP - ( ( S + A ) & 4294967295 ) ) ) ))
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ARC_RELOC_HOWTO(ARC_PCLO32_ME_2, 98, \
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4, \
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34, \
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replace_word32, \
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signed, \
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( ME ( ( ( ( S + A ) - P ) >> 2 ) & 0xFFFFFFFF ) ) )
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ARC_RELOC_HOWTO(ARC_PLT34, 99, \
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4, \
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34, \
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replace_word32, \
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signed, \
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( ME ( ( ( ( L + A ) - P ) >> 2 ) & 0xFFFFFFFF ) ) )
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@ -50,6 +50,7 @@ END_RELOC_NUMBERS (R_ARC_max)
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#define E_ARC_MACH_ARC700 0x00000003
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#define EF_ARC_CPU_ARCV2EM 0x00000005
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#define EF_ARC_CPU_ARCV2HS 0x00000006
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#define EF_ARC_CPU_ARC64 0x00000007
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/* ARC Linux specific ABIs. */
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#define E_ARC_OSABI_ORIG 0x00000000 /* MUST be 0 for back-compat. */
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@ -37,8 +37,8 @@ const struct feature_type
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} FEATURE_LIST_NAME [] =
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{
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{ BTSCN, ARC_OPCODE_ARCALL, "BITSCAN", "bit-scan" },
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{ CD, ARC_OPCODE_ARCV2, "CD", "code-density" },
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{ DIV, ARC_OPCODE_ARCV2, "DIV_REM", "div/rem" },
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{ CD, ARC_OPCODE_ARCVx, "CD", "code-density" },
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{ DIV, ARC_OPCODE_ARCVx, "DIV_REM", "div/rem" },
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{ DP, ARC_OPCODE_ARCv2HS, "FPUD", "double-precision FPU" },
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{ DPA, ARC_OPCODE_ARCv2EM, "FPUDA", "double assist FP" },
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{ DPX, ARC_OPCODE_ARCFPX, "DPFP", "double-precision FPX" },
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@ -22,8 +22,8 @@
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/* mask = 00000000000000000000000000000000. */
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#ifndef REPLACE_none
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#define REPLACE_none
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ATTRIBUTE_UNUSED static unsigned
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replace_none (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_none (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0x00;
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@ -35,8 +35,8 @@ replace_none (unsigned insn, int value ATTRIBUTE_UNUSED)
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/* mask = 11111111. */
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#ifndef REPLACE_bits8
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#define REPLACE_bits8
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ATTRIBUTE_UNUSED static unsigned
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replace_bits8 (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_bits8 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xff;
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insn |= ((value >> 0) & 0x00ff) << 0;
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@ -49,8 +49,8 @@ replace_bits8 (unsigned insn, int value ATTRIBUTE_UNUSED)
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/* mask = 1111111111111111. */
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#ifndef REPLACE_bits16
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#define REPLACE_bits16
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ATTRIBUTE_UNUSED static unsigned
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replace_bits16 (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_bits16 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xffff;
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insn |= ((value >> 0) & 0xffff) << 0;
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@ -63,8 +63,8 @@ replace_bits16 (unsigned insn, int value ATTRIBUTE_UNUSED)
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/* mask = 111111111111111111111111. */
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#ifndef REPLACE_bits24
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#define REPLACE_bits24
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ATTRIBUTE_UNUSED static unsigned
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replace_bits24 (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_bits24 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xffffff;
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insn |= ((value >> 0) & 0xffffff) << 0;
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@ -78,8 +78,8 @@ replace_bits24 (unsigned insn, int value ATTRIBUTE_UNUSED)
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/* mask = 111111111111111111111111. */
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#ifndef REPLACE_bits24_be
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#define REPLACE_bits24_be
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ATTRIBUTE_UNUSED static unsigned
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replace_bits24_be (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_bits24_be (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xffffff00;
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insn |= ((value >> 0) & 0xffffff) << 8;
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@ -87,27 +87,39 @@ replace_bits24_be (unsigned insn, int value ATTRIBUTE_UNUSED)
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return insn;
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}
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#endif /* REPLACE_bits24_be */
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#endif /* REPLACE_bits24_be. */
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/* mask = 11111111111111111111111111111111. */
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#ifndef REPLACE_word32
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#define REPLACE_word32
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ATTRIBUTE_UNUSED static unsigned
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replace_word32 (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_word32 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xffffffff;
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insn |= ((value >> 0) & 0xffffffff) << 0;
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return insn;
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}
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#endif /* REPLACE_word32. */
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/* mask = 1111111111111111111111111111111111111111111111111111111111111111. */
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#ifndef REPLACE_word64
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#define REPLACE_word64
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ATTRIBUTE_UNUSED static bfd_vma
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replace_word64 (bfd_vma insn, bfd_vma value)
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{
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insn |= value;
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return insn;
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}
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#endif /* REPLACE_word64. */
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#endif /* REPLACE_word32 */
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/* mask = 0000000000000000000000000000000011111111111111111111111111111111. */
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#ifndef REPLACE_limm
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#define REPLACE_limm
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ATTRIBUTE_UNUSED static unsigned
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replace_limm (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_limm (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xffffffff;
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insn |= ((value >> 0) & 0xffffffff) << 0;
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@ -115,13 +127,13 @@ replace_limm (unsigned insn, int value ATTRIBUTE_UNUSED)
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return insn;
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}
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#endif /* REPLACE_limm */
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#endif /* REPLACE_limm. */
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/* mask = 000000000000000011111111111111111111111111111111. */
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#ifndef REPLACE_limms
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#define REPLACE_limms
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ATTRIBUTE_UNUSED static unsigned
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replace_limms (unsigned insn, int value ATTRIBUTE_UNUSED)
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ATTRIBUTE_UNUSED static bfd_vma
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replace_limms (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
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{
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insn = insn & ~0xffffffff;
|
||||
insn |= ((value >> 0) & 0xffffffff) << 0;
|
||||
@ -129,13 +141,13 @@ replace_limms (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_limms */
|
||||
#endif /* REPLACE_limms. */
|
||||
|
||||
/* mask = 00000111111111102222222222000000. */
|
||||
#ifndef REPLACE_disp21h
|
||||
#define REPLACE_disp21h
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp21h (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp21h (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7feffc0;
|
||||
insn |= ((value >> 0) & 0x03ff) << 17;
|
||||
@ -144,13 +156,13 @@ replace_disp21h (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp21h */
|
||||
#endif /* REPLACE_disp21h. */
|
||||
|
||||
/* mask = 00000111111111002222222222000000. */
|
||||
#ifndef REPLACE_disp21w
|
||||
#define REPLACE_disp21w
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp21w (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp21w (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7fcffc0;
|
||||
insn |= ((value >> 0) & 0x01ff) << 18;
|
||||
@ -159,13 +171,13 @@ replace_disp21w (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp21w */
|
||||
#endif /* REPLACE_disp21w. */
|
||||
|
||||
/* mask = 00000111111111102222222222003333. */
|
||||
#ifndef REPLACE_disp25h
|
||||
#define REPLACE_disp25h
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp25h (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp25h (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7feffcf;
|
||||
insn |= ((value >> 0) & 0x03ff) << 17;
|
||||
@ -175,13 +187,13 @@ replace_disp25h (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp25h */
|
||||
#endif /* REPLACE_disp25h. */
|
||||
|
||||
/* mask = 00000111111111002222222222003333. */
|
||||
#ifndef REPLACE_disp25w
|
||||
#define REPLACE_disp25w
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp25w (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp25w (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7fcffcf;
|
||||
insn |= ((value >> 0) & 0x01ff) << 18;
|
||||
@ -191,13 +203,13 @@ replace_disp25w (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp25w */
|
||||
#endif /* REPLACE_disp25w. */
|
||||
|
||||
/* mask = 00000000000000000000000111111111. */
|
||||
#ifndef REPLACE_disp9
|
||||
#define REPLACE_disp9
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp9 (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp9 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x1ff;
|
||||
insn |= ((value >> 0) & 0x01ff) << 0;
|
||||
@ -205,13 +217,13 @@ replace_disp9 (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp9 */
|
||||
#endif /* REPLACE_disp9. */
|
||||
|
||||
/* mask = 00000000111111112000000000000000. */
|
||||
#ifndef REPLACE_disp9ls
|
||||
#define REPLACE_disp9ls
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp9ls (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp9ls (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0xff8000;
|
||||
insn |= ((value >> 0) & 0x00ff) << 16;
|
||||
@ -225,8 +237,8 @@ replace_disp9ls (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
/* mask = 0000000111111111. */
|
||||
#ifndef REPLACE_disp9s
|
||||
#define REPLACE_disp9s
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp9s (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp9s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x1ff;
|
||||
insn |= ((value >> 0) & 0x01ff) << 0;
|
||||
@ -234,13 +246,13 @@ replace_disp9s (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp9s */
|
||||
#endif /* REPLACE_disp9s. */
|
||||
|
||||
/* mask = 0000011111111111. */
|
||||
#ifndef REPLACE_disp13s
|
||||
#define REPLACE_disp13s
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp13s (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp13s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7ff;
|
||||
insn |= ((value >> 0) & 0x07ff) << 0;
|
||||
@ -248,13 +260,13 @@ replace_disp13s (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp13s */
|
||||
#endif /* REPLACE_disp13s. */
|
||||
|
||||
/* mask = 0000022222200111. */
|
||||
#ifndef REPLACE_disp9s1
|
||||
#define REPLACE_disp9s1
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp9s1 (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp9s1 (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7e7;
|
||||
insn |= ((value >> 0) & 0x0007) << 0;
|
||||
@ -263,13 +275,13 @@ replace_disp9s1 (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp9s1 */
|
||||
#endif /* REPLACE_disp9s1. */
|
||||
|
||||
/* mask = 00000000000000000000111111222222. */
|
||||
#ifndef REPLACE_disp12s
|
||||
#define REPLACE_disp12s
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_disp12s (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp12s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0xfff;
|
||||
insn |= ((value >> 0) & 0x003f) << 6;
|
||||
@ -277,13 +289,13 @@ replace_disp12s (unsigned insn, int value ATTRIBUTE_UNUSED)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp12s */
|
||||
#endif /* REPLACE_disp12s. */
|
||||
|
||||
/* mask = 0000001111111111. */
|
||||
#ifndef REPLACE_jli
|
||||
#define REPLACE_jli
|
||||
ATTRIBUTE_UNUSED static unsigned
|
||||
replace_jli (unsigned insn, int value)
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_jli (bfd_vma insn, bfd_vma value)
|
||||
{
|
||||
insn = insn & ~0x3ff;
|
||||
insn |= ((value >> 0) & 0x03ff) << 0;
|
||||
@ -291,4 +303,76 @@ replace_jli (unsigned insn, int value)
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_jli */
|
||||
#endif /* REPLACE_jli. */
|
||||
|
||||
#ifndef REPLACE_disp8ls
|
||||
#define REPLACE_disp8ls
|
||||
/* mask = 0000 0000 1111 1110 2000 0000 0000 0000. */
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp8ls (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0xfe8000;
|
||||
insn |= ((value >> 0) & 0x007f) << 17;
|
||||
insn |= ((value >> 7) & 0x0001) << 15;
|
||||
|
||||
return insn;
|
||||
}
|
||||
#endif /* REPLACE_disp8ls. */
|
||||
|
||||
#ifndef REPLACE_disp9s
|
||||
#define REPLACE_disp9s
|
||||
/* mask = 0000000111111111
|
||||
insn = 1111001sssssssss. */
|
||||
static bfd_vma
|
||||
replace_disp9s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x1ff;
|
||||
insn |= ((value >> 0) & 0x01ff) << 0;
|
||||
|
||||
return insn;
|
||||
}
|
||||
#endif /* REPLACE_disp9s. */
|
||||
|
||||
#ifndef REPLACE_disp6s
|
||||
#define REPLACE_disp6s
|
||||
/* mask = 0000000000111111
|
||||
insn = 1111011000ssssss. */
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp6s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x3f;
|
||||
insn |= ((value >> 0) & 0x003f) << 0;
|
||||
|
||||
return insn;
|
||||
}
|
||||
|
||||
#endif /* REPLACE_disp6s. */
|
||||
|
||||
#ifndef REPLACE_disp7s
|
||||
#define REPLACE_disp7s
|
||||
/* mask = 0000000001111111
|
||||
insn = 11101bbb1sssssss. */
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp7s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0x7f;
|
||||
insn |= ((value >> 0) & 0x007f) << 0;
|
||||
|
||||
return insn;
|
||||
}
|
||||
#endif /* REPLACE_disp7s. */
|
||||
|
||||
#ifndef REPLACE_disp12s
|
||||
#define REPLACE_disp12s
|
||||
/* mask = 00000000000000000000111111222222
|
||||
insn = 00100RRR101010000RRRssssssSSSSSS. */
|
||||
ATTRIBUTE_UNUSED static bfd_vma
|
||||
replace_disp12s (bfd_vma insn, bfd_vma value ATTRIBUTE_UNUSED)
|
||||
{
|
||||
insn = insn & ~0xfff;
|
||||
insn |= ((value >> 0) & 0x003f) << 6;
|
||||
insn |= ((value >> 6) & 0x003f) << 0;
|
||||
|
||||
return insn;
|
||||
}
|
||||
#endif /* REPLACE_disp12s. */
|
||||
|
||||
@ -199,13 +199,19 @@ extern int arc_opcode_len (const struct arc_opcode *opcode);
|
||||
#define ARC_OPCODE_ARC700 0x0002 /* ARC 700 specific insns. */
|
||||
#define ARC_OPCODE_ARCv2EM 0x0004 /* ARCv2 EM specific insns. */
|
||||
#define ARC_OPCODE_ARCv2HS 0x0008 /* ARCv2 HS specific insns. */
|
||||
#define ARC_OPCODE_ARC64 0x0010 /* ARC64 specific insns. */
|
||||
#define ARC_OPCODE_ARC32 0x0020 /* ARC32 specific insns. */
|
||||
|
||||
/* CPU combi. */
|
||||
#define ARC_OPCODE_ARCALL (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 \
|
||||
| ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
|
||||
| ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS \
|
||||
| ARC_OPCODE_ARC64 | ARC_OPCODE_ARC32)
|
||||
#define ARC_OPCODE_ARCFPX (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM)
|
||||
#define ARC_OPCODE_ARCV1 (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700)
|
||||
#define ARC_OPCODE_ARCV2 (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
|
||||
#define ARC_OPCODE_ARCVx \
|
||||
(ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS | ARC_OPCODE_ARC64 \
|
||||
| ARC_OPCODE_ARC32)
|
||||
#define ARC_OPCODE_ARCMPY6E (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCV2)
|
||||
|
||||
/* The operands table is an array of struct arc_operand. */
|
||||
@ -325,6 +331,9 @@ extern const unsigned arc_NToperand;
|
||||
/* Mark the colon position. */
|
||||
#define ARC_OPERAND_COLON 0x4000
|
||||
|
||||
/* Mark a floating point register. */
|
||||
#define ARC_OPERAND_FP 0x8000
|
||||
|
||||
/* Mask for selecting the type for typecheck purposes. */
|
||||
#define ARC_OPERAND_TYPECHECK_MASK \
|
||||
(ARC_OPERAND_IR \
|
||||
@ -369,6 +378,16 @@ struct arc_flag_class
|
||||
|
||||
/* List of valid flags (codes). */
|
||||
unsigned flags[256];
|
||||
|
||||
/* Some special cases needs to use insert/extract functions for
|
||||
flags as well. The function prototypes are identically like the
|
||||
one used for insertion/extraction of an operand. The reason
|
||||
beeing the ability of reusing these functions. */
|
||||
unsigned long long (*insert) (unsigned long long instruction,
|
||||
long long int op,
|
||||
const char **errmsg);
|
||||
long long int (*extract) (unsigned long long instruction,
|
||||
bool *invalid);
|
||||
};
|
||||
|
||||
extern const struct arc_flag_class arc_flag_classes[];
|
||||
@ -441,6 +460,8 @@ struct arc_pseudo_insn
|
||||
|
||||
extern const struct arc_pseudo_insn arc_pseudo_insns[];
|
||||
extern const unsigned arc_num_pseudo_insn;
|
||||
extern const struct arc_pseudo_insn arc64_pseudo_insns[];
|
||||
extern const unsigned arc64_num_pseudo_insn;
|
||||
|
||||
/* Structure for AUXILIARY registers. */
|
||||
struct arc_aux_reg
|
||||
@ -478,8 +499,10 @@ extern const unsigned arc_num_relax_opcodes;
|
||||
#define FIELDC(word) ((word & 0x3F) << 6)
|
||||
#define FIELDF (0x01 << 15)
|
||||
#define FIELDQ (0x1F)
|
||||
#define HARD_FIELDF (0x00)
|
||||
|
||||
#define INSN3OP(MOP,SOP) (((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16))
|
||||
#define INSN3OP(MOP,SOP) \
|
||||
(((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16) | HARD_FIELDF)
|
||||
#define INSN2OPX(MOP,SOP1,SOP2) (INSN3OP (MOP,SOP1) | (SOP2 & 0x3F))
|
||||
#define INSN2OP(MOP,SOP) (INSN2OPX (MOP,0x2F,SOP))
|
||||
|
||||
@ -667,6 +690,100 @@ typedef enum
|
||||
|
||||
#define ARC_NUM_ADDRTYPES 16
|
||||
|
||||
/*ARC64 floating point enums. */
|
||||
#define P_HALF 0
|
||||
#define P_SINGLE 1
|
||||
#define P_DOUBLE 2
|
||||
|
||||
#define TOPF_FMADD 0
|
||||
#define TOPF_FMSUB 1
|
||||
#define TOPF_FNMADD 2
|
||||
#define TOPF_FNMSUB 3
|
||||
#define TOPF_VFMADD 4
|
||||
#define TOPF_VFMSUB 5
|
||||
#define TOPF_VFNMADD 6
|
||||
#define TOPF_VFNMSUB 7
|
||||
#define TOPF_VFMADDS 0xC
|
||||
#define TOPF_VFMSUBS 0xD
|
||||
#define TOPF_VFNMADDS 0xE
|
||||
#define TOPF_VFNMSUBS 0xF
|
||||
|
||||
#define DOPF_FADD 0
|
||||
#define DOPF_FSUB 1
|
||||
#define DOPF_FMUL 2
|
||||
#define DOPF_FDIV 3
|
||||
#define DOPF_FCMP 4
|
||||
#define DOPF_FCMPF 5
|
||||
#define DOPF_FMIN 6
|
||||
#define DOPF_FMAX 7
|
||||
#define DOPF_FSGNJ 8
|
||||
#define DOPF_FSGNJN 10
|
||||
#define DOPF_FSGNJX 11
|
||||
#define DOPF_VFADD 0x10
|
||||
#define DOPF_VFSUB 0x11
|
||||
#define DOPF_VFMUL 0x12
|
||||
#define DOPF_VFDIV 0x13
|
||||
#define DOPF_VFADDS 0x14
|
||||
#define DOPF_VFSUBS 0x15
|
||||
#define DOPF_VFMULS 0x16
|
||||
#define DOPF_VFDIVS 0x17
|
||||
#define DOPF_VFUNPKL 0x18
|
||||
#define DOPF_VFUNPKM 0x19
|
||||
#define DOPF_VFPACKL 0x1a
|
||||
#define DOPF_VFPACKM 0x1b
|
||||
#define DOPF_VFBFLYL 0x1c
|
||||
#define DOPF_VFBFLYM 0x1d
|
||||
#define DOPF_VFADDSUB 0x1e
|
||||
#define DOPF_VFSUBADD 0x1f
|
||||
|
||||
#define SOPF_FSQRT 0
|
||||
#define SOPF_VFSQRT 1
|
||||
#define SOPF_VFEXCH 2
|
||||
|
||||
#define COPF_FMOV 0
|
||||
#define COPF_VFMOV 1
|
||||
|
||||
#define FUINT2S 0
|
||||
#define FS2UINT 0
|
||||
#define FINT2S 0
|
||||
#define FS2INT 0
|
||||
#define FSRND 0
|
||||
#define F2UINT_RZ 0
|
||||
#define FSINT_RZ 0
|
||||
#define FSRND_RZ 0
|
||||
#define FMVI2S 0
|
||||
#define FMVS2I 0
|
||||
#define FS2H 0
|
||||
#define FH2S 0
|
||||
#define FS2H_RZ 0
|
||||
|
||||
#define FUINT2D 1
|
||||
#define FS2UL 1
|
||||
#define FINT2D 1
|
||||
#define FS2L 1
|
||||
#define FS2D 1
|
||||
#define FS2UL_RZ 1
|
||||
#define FS2L_RZ 1
|
||||
|
||||
#define FUL2S 2
|
||||
#define FD2UINT 2
|
||||
#define FL2S 2
|
||||
#define FD2INT 2
|
||||
#define FD2S 2
|
||||
#define FD2UINT_RZ 2
|
||||
#define FD2INT_RZ 2
|
||||
|
||||
#define FUL2D 3
|
||||
#define FD2UL 3
|
||||
#define FL2D 3
|
||||
#define FD2L 3
|
||||
#define FDRND 3
|
||||
#define FD2UL_RZ 3
|
||||
#define FD2L_RZ 3
|
||||
#define FDRND_RZ 3
|
||||
#define FMVL2D 3
|
||||
#define FMVD2L 3
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
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Reference in New Issue
Block a user