RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard
According to the riscv psabi, R_RISCV_SUB6 only allows 6 least significant bits are valid, but since binutils implementation, we usually get 8 bits field for it. That means, the high 2 bits could be other field and have different purpose. Therefore, we should filter the 8 bits to 6 bits before calculate, and then only encode the valid 6 bits back. By the way, we also need the out-of-range check for R_RISCV_SUB6, and the overflow checks for all R_RISCV_ADD/SUB/SET relocations, but we can add them in the future patches. Passing riscv-gnu-toolchain regressions. bfd/ChangeLog: * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 lower 6 bits as the significant bit. * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise.
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@ -2427,6 +2427,15 @@ riscv_elf_relocate_section (bfd *output_bfd,
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break;
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case R_RISCV_SUB6:
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{
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bfd_vma old_value = bfd_get (howto->bitsize, input_bfd,
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contents + rel->r_offset);
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relocation = (old_value & ~howto->dst_mask)
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| (((old_value & howto->dst_mask) - relocation)
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& howto->dst_mask);
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}
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break;
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case R_RISCV_SUB8:
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case R_RISCV_SUB16:
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case R_RISCV_SUB32:
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@ -994,6 +994,10 @@ riscv_elf_add_sub_reloc (bfd *abfd,
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relocation = old_value + relocation;
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break;
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case R_RISCV_SUB6:
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relocation = (old_value & ~howto->dst_mask)
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| (((old_value & howto->dst_mask) - relocation)
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& howto->dst_mask);
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break;
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case R_RISCV_SUB8:
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case R_RISCV_SUB16:
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case R_RISCV_SUB32:
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