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Richard Sandiford <richard@codesourcery.com>

Browse Source 
Daniel Jacobowitz  <dan@codesourcery.com>
	Phil Edwards  <phil@codesourcery.com>
	Zack Weinberg  <zack@codesourcery.com>
	Mark Mitchell  <mark@codesourcery.com>
	Nathan Sidwell  <nathan@codesourcery.com>

bfd/
	* bfd-in2.h: Regenerate.
	* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
	* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
	(bfd_elf32_littlemips_vec): Likewise.
	(bfd_elf32_nbigmips_vec): Likewise.
	(bfd_elf32_nlittlemips_vec): Likewise.
	(bfd_elf32_ntradbigmips_vec): Likewise.
	(bfd_elf32_ntradlittlemips_vec): Likewise.
	(bfd_elf32_tradbigmips_vec): Likewise.
	(bfd_elf32_tradlittlemips_vec): Likewise.
	(bfd_elf64_bigmips_vec): Likewise.
	(bfd_elf64_littlemips_vec): Likewise.
	(bfd_elf64_tradbigmips_vec): Likewise.
	(bfd_elf64_tradlittlemips_vec): Likewise.
	* elf32-mips.c: Include elf-vxworks.h.
	(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
	instead of calling mips_elf32_rtype_to_howto directly.
	(mips_vxworks_copy_howto_rela): New reloc howto.
	(mips_vxworks_jump_slot_howto_rela): Likewise.
	(mips_vxworks_bfd_reloc_type_lookup): New function.
	(mips_vxworks_rtype_to_howto): Likewise.
	(mips_vxworks_final_write_processing): Likewise.
	(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
	(elf_backend_want_got_plt): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(elf_backend_got_symbol_offset): Likewise.
	(elf_backend_want_dynbss): Likewise.
	(elf_backend_may_use_rel_p): Likewise.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_got_header_size: Likewise.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_finish_dynamic_symbol): Likewise.
	(bfd_elf32_bfd_link_hash_table_create): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing: Likewise.
	(elf_backend_additional_program_headers): Likewise.
	(elf_backend_modify_segment_map): Likewise.
	(elf_backend_symbol_processing): Likewise.
	* elfxx-mips.c: Include elf-vxworks.h.
	(mips_elf_link_hash_entry): Add is_relocation_target and
	is_branch_target fields.
	(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
	srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
	(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
	(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
	Return 3 for VxWorks.
	(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Return 0 for VxWorks.
	(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Update the call to ELF_MIPS_GP_OFFSET.
	(mips_vxworks_exec_plt0_entry): New variable.
	(mips_vxworks_exec_plt_entry): Likewise.
	(mips_vxworks_shared_plt0_entry): Likewise.
	(mips_vxworks_shared_plt_entry): Likewise.
	(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
	(mips_elf_rel_dyn_section): Change the bfd argument to a
	mips_elf_link_hash_table.  Use MIPS_ELF_REL_DYN_NAME to get
	the name of the section.
	(mips_elf_initialize_tls_slots): Update the call to
	mips_elf_rel_dyn_section.
	(mips_elf_gotplt_index): New function.
	(mips_elf_local_got_index): Add an input_section argument.
	Update the call to mips_elf_create_local_got_entry.
	(mips_elf_got_page): Likewise.
	(mips_elf_got16_entry): Likewise.
	(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
	arguments.  Create dynamic relocations for each entry on VxWorks.
	(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
	(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
	and MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Update the uses of
	MIPS_ELF_GOT_MAX_SIZE.  Create .got.plt on VxWorks.
	(is_gott_symbol): New function.
	(mips_elf_calculate_relocation): Use a dynobj local variable.
	Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
	mips_elf_got_page_entry.  Set G to the .got.plt entry when calculating
	VxWorks R_MIPS_CALL* relocations.  Calculate and use G for all GOT
	relocations on VxWorks.  Add dynamic relocations for references
	to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Don't
	create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
	in VxWorks executables.
	(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
	Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
	Don't allocate a null entry on VxWorks.
	(mips_elf_create_dynamic_relocation): Update the call to
	mips_elf_rel_dyn_section.  Use absolute rather than relative
	relocations for VxWorks, and make them RELA rather than REL.
	(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
	read-only on VxWorks.  Update the call to mips_elf_rel_dyn_section.
	Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
	VxWorks.  Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
	Call elf_vxworks_create_dynamic_sections for VxWorks and
	initialize the plt_header_size and plt_entry_size fields.
	(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
	used in VxWorks executables.  Don't allocate dynamic relocations
	for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
	Set is_relocation_target for each symbol referenced by a relocation.
	Allocate .rela.dyn entries for relocations against the special
	VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Create GOT
	entries for all VxWorks R_MIPS_GOT16 relocations.  Don't allocate
	a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
	R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations.  Update the calls
	to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
	Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
	relocations.  Don't set no_fn_stub on VxWorks.
	(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
	mips_elf_allocate_dynamic_relocations.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
	(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
	entries for VxWorks, and do not create multiple GOTs.
	(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
	Handle .got specially for VxWorks.  Update the uses of
	MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
	Check for sgotplt and splt.  Allocate the .rel(a).dyn contents last,
	once its final size is known.  Set DF_TEXTREL for VxWorks.  Add
	DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
	tags on VxWorks.  Do not add the MIPS-specific tags for VxWorks.
	(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
	(mips_vxworks_finish_exec_plt): Likewise.
	(mips_vxworks_finish_shared_plt): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
	to mips_elf_rel_dyn_section.  Use a VxWorks-specific value of
	DT_PLTGOT.  Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
	DT_PLTRELSZ and DT_JMPREL.  Update the uses of MIPS_RESERVED_GOTNO
	and mips_elf_rel_dyn_section.  Use a different GOT header for
	VxWorks.  Don't sort .rela.dyn on VxWorks.  Finish the PLT on VxWorks.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): New function.
	(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
	on VxWorks.  Update the call to ELF_MIPS_GP_OFFSET.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_link_hash_table_create): Likewise.
	* libbfd.h: Regenerate.
	* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
	(elf32-mips.lo): Likewise.
	* Makefile.in: Regenerate.
	* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
	* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(_bfd_target_vector): Add entries for them.

gas/
	* config/tc-mips.c (mips_target_format): Handle vxworks targets.
	(md_begin): Complain about -G being used for PIC.  Don't change
	the text, data and bss alignments on VxWorks.
	(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
	generating VxWorks PIC.
	(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
	(macro): Likewise, but do not treat la $25 specially for
	VxWorks PIC, and do not handle jal.
	(OPTION_MVXWORKS_PIC): New macro.
	(md_longopts): Add -mvxworks-pic.
	(md_parse_option): Don't complain about using PIC and -G together here.
	Handle OPTION_MVXWORKS_PIC.
	(md_estimate_size_before_relax): Always use the first relaxation
	sequence on VxWorks.
	* config/tc-mips.h (VXWORKS_PIC): New.

gas/testsuite/
	* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
	* gas/mips/vxworks1-xgot.d: New tests.
	* gas/mips/mips.exp: Run them.  Do not run other tests on VxWorks.

include/elf/
	* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.

ld/
	* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
	separate VxWorks emulations.
	* emulparams/elf32ebmipvxworks.sh: New file.
	* emulparams/elf32elmipvxworks.sh: New file.
	* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
	eelf32elmipvxworks.o.
	(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
	* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
	* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
	* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
	* ld-mips/vxworks2-static.sd: New tests.
	* ld-mips/mips-elf.exp: Run them.
This commit is contained in:
Richard Sandiford 2006-03-22 09:28:15 +00:00
parent 11010f5a82
commit 0a44bf6950
43 changed files with 2239 additions and 300 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

159
bfd/ChangeLog
View File

@ -1,3 +1,162 @@
2006-03-22 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* bfd-in2.h: Regenerate.
* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
(bfd_elf32_littlemips_vec): Likewise.
(bfd_elf32_nbigmips_vec): Likewise.
(bfd_elf32_nlittlemips_vec): Likewise.
(bfd_elf32_ntradbigmips_vec): Likewise.
(bfd_elf32_ntradlittlemips_vec): Likewise.
(bfd_elf32_tradbigmips_vec): Likewise.
(bfd_elf32_tradlittlemips_vec): Likewise.
(bfd_elf64_bigmips_vec): Likewise.
(bfd_elf64_littlemips_vec): Likewise.
(bfd_elf64_tradbigmips_vec): Likewise.
(bfd_elf64_tradlittlemips_vec): Likewise.
* elf32-mips.c: Include elf-vxworks.h.
(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
instead of calling mips_elf32_rtype_to_howto directly.
(mips_vxworks_copy_howto_rela): New reloc howto.
(mips_vxworks_jump_slot_howto_rela): Likewise.
(mips_vxworks_bfd_reloc_type_lookup): New function.
(mips_vxworks_rtype_to_howto): Likewise.
(mips_vxworks_final_write_processing): Likewise.
(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
(elf_backend_want_got_plt): Likewise.
(elf_backend_want_plt_sym): Likewise.
(elf_backend_got_symbol_offset): Likewise.
(elf_backend_want_dynbss): Likewise.
(elf_backend_may_use_rel_p): Likewise.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_got_header_size: Likewise.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_finish_dynamic_symbol): Likewise.
(bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing: Likewise.
(elf_backend_additional_program_headers): Likewise.
(elf_backend_modify_segment_map): Likewise.
(elf_backend_symbol_processing): Likewise.
* elfxx-mips.c: Include elf-vxworks.h.
(mips_elf_link_hash_entry): Add is_relocation_target and
is_branch_target fields.
(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
Return 3 for VxWorks.
(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
mips_elf_link_hash_table. Return 0 for VxWorks.
(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET.
(mips_vxworks_exec_plt0_entry): New variable.
(mips_vxworks_exec_plt_entry): Likewise.
(mips_vxworks_shared_plt0_entry): Likewise.
(mips_vxworks_shared_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
(mips_elf_rel_dyn_section): Change the bfd argument to a
mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get
the name of the section.
(mips_elf_initialize_tls_slots): Update the call to
mips_elf_rel_dyn_section.
(mips_elf_gotplt_index): New function.
(mips_elf_local_got_index): Add an input_section argument.
Update the call to mips_elf_create_local_got_entry.
(mips_elf_got_page): Likewise.
(mips_elf_got16_entry): Likewise.
(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
arguments. Create dynamic relocations for each entry on VxWorks.
(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
and MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Update the uses of
MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks.
(is_gott_symbol): New function.
(mips_elf_calculate_relocation): Use a dynobj local variable.
Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
mips_elf_got_page_entry. Set G to the .got.plt entry when calculating
VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT
relocations on VxWorks. Add dynamic relocations for references
to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't
create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
in VxWorks executables.
(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
Don't allocate a null entry on VxWorks.
(mips_elf_create_dynamic_relocation): Update the call to
mips_elf_rel_dyn_section. Use absolute rather than relative
relocations for VxWorks, and make them RELA rather than REL.
(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
read-only on VxWorks. Update the call to mips_elf_rel_dyn_section.
Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
Call elf_vxworks_create_dynamic_sections for VxWorks and
initialize the plt_header_size and plt_entry_size fields.
(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
used in VxWorks executables. Don't allocate dynamic relocations
for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
Set is_relocation_target for each symbol referenced by a relocation.
Allocate .rela.dyn entries for relocations against the special
VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT
entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate
a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls
to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
relocations. Don't set no_fn_stub on VxWorks.
(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
mips_elf_allocate_dynamic_relocations.
(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
entries for VxWorks, and do not create multiple GOTs.
(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
Handle .got specially for VxWorks. Update the uses of
MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
Check for sgotplt and splt. Allocate the .rel(a).dyn contents last,
once its final size is known. Set DF_TEXTREL for VxWorks. Add
DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
tags on VxWorks. Do not add the MIPS-specific tags for VxWorks.
(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
(mips_vxworks_finish_exec_plt): Likewise.
(mips_vxworks_finish_shared_plt): Likewise.
(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
to mips_elf_rel_dyn_section. Use a VxWorks-specific value of
DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO
and mips_elf_rel_dyn_section. Use a different GOT header for
VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): New function.
(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
on VxWorks. Update the call to ELF_MIPS_GP_OFFSET.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_link_hash_table_create): Likewise.
* libbfd.h: Regenerate.
* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
(elf32-mips.lo): Likewise.
* Makefile.in: Regenerate.
* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(_bfd_target_vector): Add entries for them.
2006-03-19 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* elf64-hppa.c (elf64_hppa_special_sections): Change flags for .tbss

4
bfd/Makefile.am
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@ -1350,14 +1350,14 @@ elfxx-mips.lo: elfxx-mips.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
elfxx-mips.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h $(INCDIR)/coff/ecoff.h \
$(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h
$(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h elf-vxworks.h
elf32-mips.lo: elf32-mips.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/bfdlink.h genlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfxx-mips.h \
$(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/symconst.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h \
ecoffswap.h elf32-target.h
ecoffswap.h elf32-target.h elf-vxworks.h
elf32-mt.lo: elf32-mt.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/mt.h \

4
bfd/Makefile.in
View File

@ -1917,14 +1917,14 @@ elfxx-mips.lo: elfxx-mips.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
elfxx-mips.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/coff/sym.h $(INCDIR)/coff/symconst.h $(INCDIR)/coff/ecoff.h \
$(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h
$(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h elf-vxworks.h
elf32-mips.lo: elf32-mips.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
$(INCDIR)/bfdlink.h genlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfxx-mips.h \
$(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/coff/sym.h \
$(INCDIR)/coff/symconst.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/ecoff.h $(INCDIR)/coff/mips.h $(INCDIR)/coff/external.h \
ecoffswap.h elf32-target.h
ecoffswap.h elf32-target.h elf-vxworks.h
elf32-mt.lo: elf32-mt.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/mt.h \

5
bfd/bfd-in2.h
View File

@ -2588,6 +2588,11 @@ to compensate for the borrow when the low bits are added. */
BFD_RELOC_MIPS_TLS_TPREL_LO16,
/* MIPS ELF relocations (VxWorks extensions). */
BFD_RELOC_MIPS_COPY,
BFD_RELOC_MIPS_JUMP_SLOT,
/* Fujitsu Frv Relocations. */
BFD_RELOC_FRV_LABEL16,
BFD_RELOC_FRV_LABEL24,

10
bfd/config.bfd
View File

@ -868,6 +868,16 @@ case "${targ}" in
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
#ifdef BFD64
mips*el-*-vxworks*)
targ_defvec=bfd_elf32_littlemips_vxworks_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf32_bigmips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
mips*-*-vxworks*)
targ_defvec=bfd_elf32_bigmips_vxworks_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
#endif
mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*)
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"

28
bfd/configure vendored
View File

@ -13078,7 +13078,9 @@ do
tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigarm_vxworks_vec)
tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_bigmips_vxworks_vec)
tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
@ -13110,7 +13112,9 @@ do
bfd_elf32_littlearm_vxworks_vec)
tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_littlearm_vec) tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_littlemips_vxworks_vec)
tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_m32c_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;;
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
bfd_elf32_m32rle_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
@ -13126,10 +13130,10 @@ do
bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
bfd_elf32_mt_vec) tb="$tb elf32-mt.lo elf32.lo $elf" ;;
bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
@ -13155,8 +13159,8 @@ do
bfd_elf32_shlnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_shnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf32.lo $elf" ;;
bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
@ -13167,14 +13171,14 @@ do
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_hppa_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_hppa_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_mmix_vec) tb="$tb elf64-mmix.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_powerpc_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_powerpcle_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
@ -13186,8 +13190,8 @@ do
bfd_elf64_sh64lnbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sh64nbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_x86_64_vec) tb="$tb elf64-x86-64.lo elf64.lo $elf"; target_size=64 ;;
bfd_mmo_vec) tb="$tb mmo.lo" target_size=64 ;;
bfd_powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo cofflink.lo" ;;

28
bfd/configure.in
View File

@ -591,7 +591,9 @@ do
tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigarm_vxworks_vec)
tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_bigmips_vxworks_vec)
tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
@ -623,7 +625,9 @@ do
bfd_elf32_littlearm_vxworks_vec)
tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_littlearm_vec) tb="$tb elf32-arm.lo elf32.lo elf-vxworks.lo $elf" ;;
bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_littlemips_vxworks_vec)
tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_m32c_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;;
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
bfd_elf32_m32rle_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;;
@ -639,10 +643,10 @@ do
bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
bfd_elf32_mt_vec) tb="$tb elf32-mt.lo elf32.lo $elf" ;;
bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_ntradlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
@ -668,8 +672,8 @@ do
bfd_elf32_shlnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_shnbsd_vec) tb="$tb elf32-sh.lo elf32.lo $elf coff-sh.lo cofflink.lo" ;;
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf32.lo $elf" ;;
bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradbigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_us_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
@ -680,14 +684,14 @@ do
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_bigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_hppa_linux_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_hppa_vec) tb="$tb elf64-hppa.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_hpux_big_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_ia64_little_vec) tb="$tb elf64-ia64.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_little_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_mmix_vec) tb="$tb elf64-mmix.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_powerpc_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_powerpcle_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
@ -699,8 +703,8 @@ do
bfd_elf64_sh64lnbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sh64nbsd_vec) tb="$tb elf64-sh64.lo elf64.lo $elf" target_size=64 ;;
bfd_elf64_sparc_vec) tb="$tb elf64-sparc.lo elfxx-sparc.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradbigmips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_tradlittlemips_vec) tb="$tb elf64-mips.lo elf64.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
bfd_elf64_x86_64_vec) tb="$tb elf64-x86-64.lo elf64.lo $elf"; target_size=64 ;;
bfd_mmo_vec) tb="$tb mmo.lo" target_size=64 ;;
bfd_powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo cofflink.lo" ;;

149
bfd/elf32-mips.c
View File

@ -37,6 +37,7 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#include "elf-bfd.h"
#include "elfxx-mips.h"
#include "elf/mips.h"
#include "elf-vxworks.h"
/* Get the ECOFF swapping routines. */
#include "coff/sym.h"
@ -1319,10 +1320,12 @@ mips_elf32_rtype_to_howto (unsigned int r_type,
static void
mips_info_to_howto_rel (bfd *abfd, arelent *cache_ptr, Elf_Internal_Rela *dst)
{
const struct elf_backend_data *bed;
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
cache_ptr->howto = mips_elf32_rtype_to_howto (r_type, FALSE);
bed = get_elf_backend_data (abfd);
cache_ptr->howto = bed->elf_backend_mips_rtype_to_howto (r_type, FALSE);
/* The addend for a GPREL16 or LITERAL relocation comes from the GP
value for the object file. We get the addend now, rather than
@ -1619,3 +1622,147 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
/* Include the target file again for this target. */
#include "elf32-target.h"
/* Specific to VxWorks. */
static reloc_howto_type mips_vxworks_copy_howto_rela =
HOWTO (R_MIPS_COPY, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_COPY", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Specific to VxWorks. */
static reloc_howto_type mips_vxworks_jump_slot_howto_rela =
HOWTO (R_MIPS_JUMP_SLOT, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_JUMP_SLOT", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Implement elf_backend_bfd_reloc_type_lookup for VxWorks. */
static reloc_howto_type *
mips_vxworks_bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
{
switch (code)
{
case BFD_RELOC_MIPS_COPY:
return &mips_vxworks_copy_howto_rela;
case BFD_RELOC_MIPS_JUMP_SLOT:
return &mips_vxworks_jump_slot_howto_rela;
default:
return bfd_elf32_bfd_reloc_type_lookup (abfd, code);
}
}
/* Implement elf_backend_mips_rtype_to_lookup for VxWorks. */
static reloc_howto_type *
mips_vxworks_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p)
{
switch (r_type)
{
case R_MIPS_COPY:
return &mips_vxworks_copy_howto_rela;
case R_MIPS_JUMP_SLOT:
return &mips_vxworks_jump_slot_howto_rela;
default:
return mips_elf32_rtype_to_howto (r_type, rela_p);
}
}
/* Implement elf_backend_final_write_processing for VxWorks. */
static void
mips_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
{
_bfd_mips_elf_final_write_processing (abfd, linker);
elf_vxworks_final_write_processing (abfd, linker);
}
#undef TARGET_LITTLE_SYM
#undef TARGET_LITTLE_NAME
#undef TARGET_BIG_SYM
#undef TARGET_BIG_NAME
#define TARGET_LITTLE_SYM bfd_elf32_littlemips_vxworks_vec
#define TARGET_LITTLE_NAME "elf32-littlemips-vxworks"
#define TARGET_BIG_SYM bfd_elf32_bigmips_vxworks_vec
#define TARGET_BIG_NAME "elf32-bigmips-vxworks"
#undef elf32_bed
#define elf32_bed elf32_mips_vxworks_bed
#undef ELF_MAXPAGESIZE
#define ELF_MAXPAGESIZE 0x1000
#undef elf_backend_want_got_plt
#define elf_backend_want_got_plt 1
#undef elf_backend_want_plt_sym
#define elf_backend_want_plt_sym 1
#undef elf_backend_got_symbol_offset
#define elf_backend_got_symbol_offset 0
#undef elf_backend_want_dynbss
#define elf_backend_want_dynbss 1
#undef elf_backend_may_use_rel_p
#define elf_backend_may_use_rel_p 0
#undef elf_backend_may_use_rela_p
#define elf_backend_may_use_rela_p 1
#undef elf_backend_default_use_rela_p
#define elf_backend_default_use_rela_p 1
#undef elf_backend_got_header_size
#define elf_backend_got_header_size (4 * 3)
#undef elf_backend_plt_readonly
#define elf_backend_plt_readonly 1
#undef bfd_elf32_bfd_reloc_type_lookup
#define bfd_elf32_bfd_reloc_type_lookup \
mips_vxworks_bfd_reloc_type_lookup
#undef elf_backend_mips_rtype_to_howto
#define elf_backend_mips_rtype_to_howto \
mips_vxworks_rtype_to_howto
#undef elf_backend_adjust_dynamic_symbol
#define elf_backend_adjust_dynamic_symbol \
_bfd_mips_vxworks_adjust_dynamic_symbol
#undef elf_backend_finish_dynamic_symbol
#define elf_backend_finish_dynamic_symbol \
_bfd_mips_vxworks_finish_dynamic_symbol
#undef bfd_elf32_bfd_link_hash_table_create
#define bfd_elf32_bfd_link_hash_table_create \
_bfd_mips_vxworks_link_hash_table_create
#undef elf_backend_add_symbol_hook
#define elf_backend_add_symbol_hook \
elf_vxworks_add_symbol_hook
#undef elf_backend_link_output_symbol_hook
#define elf_backend_link_output_symbol_hook \
elf_vxworks_link_output_symbol_hook
#undef elf_backend_emit_relocs
#define elf_backend_emit_relocs \
elf_vxworks_emit_relocs
#undef elf_backend_final_write_processing
#define elf_backend_final_write_processing \
mips_vxworks_final_write_processing
#undef elf_backend_additional_program_headers
#undef elf_backend_modify_segment_map
#undef elf_backend_symbol_processing
/* NOTE: elf_backend_rela_normal is not defined for MIPS. */
#include "elf32-target.h"

1385
bfd/elfxx-mips.c
View File

File diff suppressed because it is too large Load Diff

7
bfd/elfxx-mips.h
View File

@ -48,6 +48,8 @@ extern bfd_boolean _bfd_mips_elf_check_relocs
(bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
extern bfd_boolean _bfd_mips_elf_adjust_dynamic_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *);
extern bfd_boolean _bfd_mips_vxworks_adjust_dynamic_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *);
extern bfd_boolean _bfd_mips_elf_always_size_sections
(bfd *, struct bfd_link_info *);
extern bfd_boolean _bfd_mips_elf_size_dynamic_sections
@ -58,6 +60,9 @@ extern bfd_boolean _bfd_mips_elf_relocate_section
extern bfd_boolean _bfd_mips_elf_finish_dynamic_symbol
(bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
Elf_Internal_Sym *);
extern bfd_boolean _bfd_mips_vxworks_finish_dynamic_symbol
(bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
Elf_Internal_Sym *);
extern bfd_boolean _bfd_mips_elf_finish_dynamic_sections
(bfd *, struct bfd_link_info *);
extern void _bfd_mips_elf_final_write_processing
@ -90,6 +95,8 @@ extern bfd_byte *_bfd_elf_mips_get_relocated_section_contents
bfd_byte *, bfd_boolean, asymbol **);
extern struct bfd_link_hash_table *_bfd_mips_elf_link_hash_table_create
(bfd *);
extern struct bfd_link_hash_table *_bfd_mips_vxworks_link_hash_table_create
(bfd *);
extern bfd_boolean _bfd_mips_elf_final_link
(bfd *, struct bfd_link_info *);
extern bfd_boolean _bfd_mips_elf_merge_private_bfd_data

3
bfd/libbfd.h
View File

@ -972,6 +972,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_MIPS_TLS_TPREL_HI16",
"BFD_RELOC_MIPS_TLS_TPREL_LO16",
"BFD_RELOC_MIPS_COPY",
"BFD_RELOC_MIPS_JUMP_SLOT",
"BFD_RELOC_FRV_LABEL16",
"BFD_RELOC_FRV_LABEL24",
"BFD_RELOC_FRV_LO16",

8
bfd/reloc.c
View File

@ -2139,6 +2139,14 @@ ENUMDOC
MIPS ELF relocations.
COMMENT
ENUM
BFD_RELOC_MIPS_COPY
ENUMX
BFD_RELOC_MIPS_JUMP_SLOT
ENUMDOC
MIPS ELF relocations (VxWorks extensions).
COMMENT
ENUM
BFD_RELOC_FRV_LABEL16
ENUMX

4
bfd/targets.c
View File

@ -560,6 +560,7 @@ extern const bfd_target bfd_elf32_bigarm_vec;
extern const bfd_target bfd_elf32_bigarm_symbian_vec;
extern const bfd_target bfd_elf32_bigarm_vxworks_vec;
extern const bfd_target bfd_elf32_bigmips_vec;
extern const bfd_target bfd_elf32_bigmips_vxworks_vec;
extern const bfd_target bfd_elf32_cr16c_vec;
extern const bfd_target bfd_elf32_cris_vec;
extern const bfd_target bfd_elf32_crx_vec;
@ -590,6 +591,7 @@ extern const bfd_target bfd_elf32_littlearm_vec;
extern const bfd_target bfd_elf32_littlearm_symbian_vec;
extern const bfd_target bfd_elf32_littlearm_vxworks_vec;
extern const bfd_target bfd_elf32_littlemips_vec;
extern const bfd_target bfd_elf32_littlemips_vxworks_vec;
extern const bfd_target bfd_elf32_m32c_vec;
extern const bfd_target bfd_elf32_m32r_vec;
extern const bfd_target bfd_elf32_m32rle_vec;
@ -863,6 +865,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_bigarm_symbian_vec,
&bfd_elf32_bigarm_vxworks_vec,
&bfd_elf32_bigmips_vec,
&bfd_elf32_bigmips_vxworks_vec,
&bfd_elf32_cr16c_vec,
&bfd_elf32_cris_vec,
&bfd_elf32_crx_vec,
@ -897,6 +900,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_littlearm_symbian_vec,
&bfd_elf32_littlearm_vxworks_vec,
&bfd_elf32_littlemips_vec,
&bfd_elf32_littlemips_vxworks_vec,
&bfd_elf32_m32c_vec,
&bfd_elf32_m32r_vec,
&bfd_elf32_m32rle_vec,

23
gas/ChangeLog
View File

@ -1,3 +1,26 @@
2006-03-22 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* config/tc-mips.c (mips_target_format): Handle vxworks targets.
(md_begin): Complain about -G being used for PIC. Don't change
the text, data and bss alignments on VxWorks.
(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
generating VxWorks PIC.
(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
(macro): Likewise, but do not treat la $25 specially for
VxWorks PIC, and do not handle jal.
(OPTION_MVXWORKS_PIC): New macro.
(md_longopts): Add -mvxworks-pic.
(md_parse_option): Don't complain about using PIC and -G together here.
Handle OPTION_MVXWORKS_PIC.
(md_estimate_size_before_relax): Always use the first relaxation
sequence on VxWorks.
* config/tc-mips.h (VXWORKS_PIC): New.
2006-03-21 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (md_apply_fix): Fix typo in offset mask.

92
gas/config/tc-mips.c
View File

@ -1191,6 +1191,12 @@ mips_target_format (void)
case bfd_target_coff_flavour:
return "pe-mips";
case bfd_target_elf_flavour:
#ifdef TE_VXWORKS
if (!HAVE_64BIT_OBJECTS && !HAVE_NEWABI)
return (target_big_endian
? "elf32-bigmips-vxworks"
: "elf32-littlemips-vxworks");
#endif
#ifdef TE_TMIPS
/* This is traditional mips. */
return (target_big_endian
@ -1397,6 +1403,13 @@ md_begin (void)
int i = 0;
int broken = 0;
if (mips_pic != NO_PIC)
{
if (g_switch_seen && g_switch_value != 0)
as_bad (_("-G may not be used in position-independent code"));
g_switch_value = 0;
}
if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, file_mips_arch))
as_warn (_("Could not set architecture and machine"));
@ -1524,10 +1537,11 @@ md_begin (void)
if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
{
/* On a native system, sections must be aligned to 16 byte
boundaries. When configured for an embedded ELF target, we
don't bother. */
if (strcmp (TARGET_OS, "elf") != 0)
/* On a native system other than VxWorks, sections must be aligned
to 16 byte boundaries. When configured for an embedded ELF
target, we don't bother. */
if (strcmp (TARGET_OS, "elf") != 0
&& strcmp (TARGET_OS, "vxworks") != 0)
{
(void) bfd_set_section_alignment (stdoutput, text_section, 4);
(void) bfd_set_section_alignment (stdoutput, data_section, 4);
@ -1680,16 +1694,18 @@ md_assemble (char *str)
}
/* Return true if the given relocation might need a matching %lo().
Note that R_MIPS_GOT16 relocations only need a matching %lo() when
applied to local symbols. */
This is only "might" because SVR4 R_MIPS_GOT16 relocations only
need a matching %lo() when applied to local symbols. */
static inline bfd_boolean
reloc_needs_lo_p (bfd_reloc_code_real_type reloc)
{
return (HAVE_IN_PLACE_ADDENDS
&& (reloc == BFD_RELOC_HI16_S
|| reloc == BFD_RELOC_MIPS_GOT16
|| reloc == BFD_RELOC_MIPS16_HI16_S));
|| reloc == BFD_RELOC_MIPS16_HI16_S
/* VxWorks R_MIPS_GOT16 relocs never need a matching %lo();
all GOT16 relocations evaluate to "G". */
|| (reloc == BFD_RELOC_MIPS_GOT16 && mips_pic != VXWORKS_PIC)));
}
/* Return true if the given fixup is followed by a matching R_MIPS_LO16
@ -3898,7 +3914,7 @@ load_address (int reg, expressionS *ep, int *used_at)
relax_end ();
}
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
else if (!mips_big_got)
{
expressionS ex;
@ -3959,7 +3975,7 @@ load_address (int reg, expressionS *ep, int *used_at)
}
}
}
else if (mips_pic == SVR4_PIC)
else if (mips_big_got)
{
expressionS ex;
@ -5011,7 +5027,7 @@ macro (struct mips_cl_insn *ip)
relax_end ();
}
}
else if (mips_pic == SVR4_PIC && ! mips_big_got && ! HAVE_NEWABI)
else if (!mips_big_got && !HAVE_NEWABI)
{
int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT16;
@ -5047,7 +5063,9 @@ macro (struct mips_cl_insn *ip)
if (offset_expr.X_add_number == 0)
{
if (breg == 0 && (call || tempreg == PIC_CALL_REG))
if (mips_pic == SVR4_PIC
&& breg == 0
&& (call || tempreg == PIC_CALL_REG))
lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16;
relax_start (offset_expr.X_add_symbol);
@ -5104,7 +5122,7 @@ macro (struct mips_cl_insn *ip)
used_at = 1;
}
}
else if (mips_pic == SVR4_PIC && ! mips_big_got && HAVE_NEWABI)
else if (!mips_big_got && HAVE_NEWABI)
{
int add_breg_early = 0;
@ -5207,7 +5225,7 @@ macro (struct mips_cl_insn *ip)
BFD_RELOC_MIPS_GOT_DISP, mips_gp_register);
}
}
else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI)
else if (mips_big_got && !HAVE_NEWABI)
{
int gpdelay;
int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16;
@ -5364,7 +5382,7 @@ macro (struct mips_cl_insn *ip)
}
relax_end ();
}
else if (mips_pic == SVR4_PIC && HAVE_NEWABI)
else if (mips_big_got && HAVE_NEWABI)
{
int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16;
int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_LO16;
@ -5497,13 +5515,13 @@ macro (struct mips_cl_insn *ip)
case M_JAL_2:
if (mips_pic == NO_PIC)
macro_build (NULL, "jalr", "d,s", dreg, sreg);
else if (mips_pic == SVR4_PIC)
else
{
if (sreg != PIC_CALL_REG)
as_warn (_("MIPS PIC call to register other than $25"));
macro_build (NULL, "jalr", "d,s", dreg, sreg);
if (! HAVE_NEWABI)
if (mips_pic == SVR4_PIC && !HAVE_NEWABI)
{
if (mips_cprestore_offset < 0)
as_warn (_("No .cprestore pseudo-op used in PIC code"));
@ -5529,8 +5547,6 @@ macro (struct mips_cl_insn *ip)
}
}
}
else
abort ();
break;
@ -5666,6 +5682,8 @@ macro (struct mips_cl_insn *ip)
}
}
}
else if (mips_pic == VXWORKS_PIC)
as_bad (_("Non-PIC jump used in PIC library"));
else
abort ();
@ -6026,7 +6044,7 @@ macro (struct mips_cl_insn *ip)
relax_end ();
}
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
else if (!mips_big_got)
{
int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT16;
@ -6080,7 +6098,7 @@ macro (struct mips_cl_insn *ip)
tempreg, tempreg, breg);
macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg);
}
else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI)
else if (mips_big_got && !HAVE_NEWABI)
{
int gpdelay;
@ -6129,7 +6147,7 @@ macro (struct mips_cl_insn *ip)
tempreg, tempreg, breg);
macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg);
}
else if (mips_pic == SVR4_PIC && HAVE_NEWABI)
else if (mips_big_got && HAVE_NEWABI)
{
/* If this is a reference to an external symbol, we want
lui $tempreg,<sym> (BFD_RELOC_MIPS_GOT_HI16)
@ -6249,14 +6267,12 @@ macro (struct mips_cl_insn *ip)
macro_build_lui (&offset_expr, AT);
used_at = 1;
}
else if (mips_pic == SVR4_PIC)
else
{
macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT,
BFD_RELOC_MIPS_GOT16, mips_gp_register);
used_at = 1;
}
else
abort ();
/* Now we load the register(s). */
if (HAVE_64BIT_GPRS)
@ -6328,7 +6344,7 @@ macro (struct mips_cl_insn *ip)
{
assert (strcmp (s, RDATA_SECTION_NAME) == 0);
used_at = 1;
if (mips_pic == SVR4_PIC)
if (mips_pic != NO_PIC)
macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT,
BFD_RELOC_MIPS_GOT16, mips_gp_register);
else
@ -6547,7 +6563,7 @@ macro (struct mips_cl_insn *ip)
if (mips_relax.sequence)
relax_end ();
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
else if (!mips_big_got)
{
/* If this is a reference to an external symbol, we want
lw $at,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
@ -6594,7 +6610,7 @@ macro (struct mips_cl_insn *ip)
mips_optimize = hold_mips_optimize;
}
else if (mips_pic == SVR4_PIC)
else if (mips_big_got)
{
int gpdelay;
@ -10646,6 +10662,8 @@ struct option md_longopts[] =
{"mpdr", no_argument, NULL, OPTION_PDR},
#define OPTION_NO_PDR (OPTION_ELF_BASE + 10)
{"mno-pdr", no_argument, NULL, OPTION_NO_PDR},
#define OPTION_MVXWORKS_PIC (OPTION_ELF_BASE + 11)
{"mvxworks-pic", no_argument, NULL, OPTION_MVXWORKS_PIC},
#endif /* OBJ_ELF */
{NULL, no_argument, NULL, 0}
@ -10887,12 +10905,6 @@ md_parse_option (int c, char *arg)
}
mips_pic = SVR4_PIC;
mips_abicalls = TRUE;
if (g_switch_seen && g_switch_value != 0)
{
as_bad (_("-G may not be used with SVR4 PIC code"));
return 0;
}
g_switch_value = 0;
break;
case OPTION_NON_SHARED:
@ -10916,11 +10928,6 @@ md_parse_option (int c, char *arg)
case 'G':
g_switch_value = atoi (arg);
g_switch_seen = 1;
if (mips_pic == SVR4_PIC && g_switch_value != 0)
{
as_bad (_("-G may not be used with SVR4 PIC code"));
return 0;
}
break;
#ifdef OBJ_ELF
@ -11026,6 +11033,10 @@ md_parse_option (int c, char *arg)
case OPTION_NO_PDR:
mips_flag_pdr = FALSE;
break;
case OPTION_MVXWORKS_PIC:
mips_pic = VXWORKS_PIC;
break;
#endif /* OBJ_ELF */
default:
@ -13166,6 +13177,9 @@ md_estimate_size_before_relax (fragS *fragp, asection *segtype)
change = nopic_need_relax (fragp->fr_symbol, 0);
else if (mips_pic == SVR4_PIC)
change = pic_need_relax (fragp->fr_symbol, segtype);
else if (mips_pic == VXWORKS_PIC)
/* For vxworks, GOT16 relocations never have a corresponding LO16. */
change = 0;
else
abort ();

3
gas/config/tc-mips.h
View File

@ -75,6 +75,9 @@ enum mips_pic_level
/* Generate PIC code as in the SVR4 MIPS ABI. */
SVR4_PIC,
/* VxWorks's PIC model. */
VXWORKS_PIC
};
extern enum mips_pic_level mips_pic;

6
gas/testsuite/ChangeLog
View File

@ -1,3 +1,9 @@
2006-03-22 Richard Sandiford <richard@codesourcery.com>
* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
* gas/mips/vxworks1-xgot.d: New tests.
* gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
2006-03-21 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb32.d: Correct expected output.

12
gas/testsuite/gas/mips/mips.exp
View File

@ -383,12 +383,14 @@ mips_arch_create sb1 64 mips64 { mips3d } \
{ -march=sb1 -mtune=sb1 } { -mmips:sb1 } \
{ mipsisa64sb1-*-* mipsisa64sb1el-*-* }
#
# And now begin the actual tests!
# And now begin the actual tests! VxWorks uses RELA rather than REL
# relocations, so most of the generic dump tests will not work there.
#
if { [istarget mips*-*-*] } then {
if { [istarget mips*-*-vxworks*] } {
run_dump_test "vxworks1"
run_dump_test "vxworks1-xgot"
} elseif { [istarget mips*-*-*] } {
set no_mips16 0
set elf [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] || [istarget *-*-linux*] || [istarget *-*-netbsd*] ]
set ecoff [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
@ -777,4 +779,6 @@ if { [istarget mips*-*-*] } then {
run_dump_test "mips16e-jrc"
run_dump_test "mips16e-save"
}
run_dump_test "vxworks1"
run_dump_test "vxworks1-xgot"
}

102
gas/testsuite/gas/mips/vxworks1-xgot.d Normal file
View File

@ -0,0 +1,102 @@
#as: -mips2 -mvxworks-pic -xgot -mabi=32
#source: vxworks1.s
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
00000000 <\.text>:
#
# la $4,local
#
.*: 3c040000 lui a0,0x0
.*: R_MIPS_GOT_HI16 \.data
.*: 009c2021 addu a0,a0,gp
.*: 8c840000 lw a0,0\(a0\)
.*: R_MIPS_GOT_LO16 \.data
#
# la $4,global
#
.*: 3c040000 lui a0,0x0
.*: R_MIPS_GOT_HI16 global
.*: 009c2021 addu a0,a0,gp
.*: 8c840000 lw a0,0\(a0\)
.*: R_MIPS_GOT_LO16 global
#
# lw $4,local
#
.*: 3c040000 lui a0,0x0
.*: R_MIPS_GOT_HI16 \.data
.*: 009c2021 addu a0,a0,gp
.*: 8c840000 lw a0,0\(a0\)
.*: R_MIPS_GOT_LO16 \.data
.*: 8c840000 lw a0,0\(a0\)
#
# lw $4,global
#
.*: 3c040000 lui a0,0x0
.*: R_MIPS_GOT_HI16 global
.*: 009c2021 addu a0,a0,gp
.*: 8c840000 lw a0,0\(a0\)
.*: R_MIPS_GOT_LO16 global
.*: 8c840000 lw a0,0\(a0\)
#
# sw $4,local
#
.*: 3c010000 lui at,0x0
.*: R_MIPS_GOT_HI16 \.data
.*: 003c0821 addu at,at,gp
.*: 8c210000 lw at,0\(at\)
.*: R_MIPS_GOT_LO16 \.data
.*: ac240000 sw a0,0\(at\)
#
# sw $4,global
#
.*: 3c010000 lui at,0x0
.*: R_MIPS_GOT_HI16 global
.*: 003c0821 addu at,at,gp
.*: 8c210000 lw at,0\(at\)
.*: R_MIPS_GOT_LO16 global
.*: ac240000 sw a0,0\(at\)
#
# ulw $4,local
#
.*: 3c010000 lui at,0x0
.*: R_MIPS_GOT_HI16 \.data
.*: 003c0821 addu at,at,gp
.*: 8c210000 lw at,0\(at\)
.*: R_MIPS_GOT_LO16 \.data
.*: 88240000 lwl a0,0\(at\)
.*: 98240003 lwr a0,3\(at\)
#
# ulw $4,global
#
.*: 3c010000 lui at,0x0
.*: R_MIPS_GOT_HI16 global
.*: 003c0821 addu at,at,gp
.*: 8c210000 lw at,0\(at\)
.*: R_MIPS_GOT_LO16 global
.*: 88240000 lwl a0,0\(at\)
.*: 98240003 lwr a0,3\(at\)
#
# usw $4,local
#
.*: 3c010000 lui at,0x0
.*: R_MIPS_GOT_HI16 \.data
.*: 003c0821 addu at,at,gp
.*: 8c210000 lw at,0\(at\)
.*: R_MIPS_GOT_LO16 \.data
.*: a8240000 swl a0,0\(at\)
.*: b8240003 swr a0,3\(at\)
#
# usw $4,global
#
.*: 3c010000 lui at,0x0
.*: R_MIPS_GOT_HI16 global
.*: 003c0821 addu at,at,gp
.*: 8c210000 lw at,0\(at\)
.*: R_MIPS_GOT_LO16 global
.*: a8240000 swl a0,0\(at\)
.*: b8240003 swr a0,3\(at\)
\.\.\.

71
gas/testsuite/gas/mips/vxworks1.d Normal file
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@ -0,0 +1,71 @@
#as: -mips2 -mvxworks-pic -mabi=32
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
00000000 <\.text>:
#
# la $4,local
#
.*: 8f840000 lw a0,0\(gp\)
.*: R_MIPS_GOT16 \.data
#
# la $4,global
#
.*: 8f840000 lw a0,0\(gp\)
.*: R_MIPS_GOT16 global
#
# lw $4,local
#
.*: 8f840000 lw a0,0\(gp\)
.*: R_MIPS_GOT16 \.data
.*: 8c840000 lw a0,0\(a0\)
#
# lw $4,global
#
.*: 8f840000 lw a0,0\(gp\)
.*: R_MIPS_GOT16 global
.*: 8c840000 lw a0,0\(a0\)
#
# sw $4,local
#
.*: 8f810000 lw at,0\(gp\)
.*: R_MIPS_GOT16 \.data
.*: ac240000 sw a0,0\(at\)
#
# sw $4,global
#
.*: 8f810000 lw at,0\(gp\)
.*: R_MIPS_GOT16 global
.*: ac240000 sw a0,0\(at\)
#
# ulw $4,local
#
.*: 8f810000 lw at,0\(gp\)
.*: R_MIPS_GOT16 \.data
.*: 88240000 lwl a0,0\(at\)
.*: 98240003 lwr a0,3\(at\)
#
# ulw $4,global
#
.*: 8f810000 lw at,0\(gp\)
.*: R_MIPS_GOT16 global
.*: 88240000 lwl a0,0\(at\)
.*: 98240003 lwr a0,3\(at\)
#
# usw $4,local
#
.*: 8f810000 lw at,0\(gp\)
.*: R_MIPS_GOT16 \.data
.*: a8240000 swl a0,0\(at\)
.*: b8240003 swr a0,3\(at\)
#
# usw $4,global
#
.*: 8f810000 lw at,0\(gp\)
.*: R_MIPS_GOT16 global
.*: a8240000 swl a0,0\(at\)
.*: b8240003 swr a0,3\(at\)
\.\.\.

16
gas/testsuite/gas/mips/vxworks1.s Normal file
View File

@ -0,0 +1,16 @@
la $4,local
la $4,global
lw $4,local
lw $4,global
sw $4,local
sw $4,global
ulw $4,local
ulw $4,global
usw $4,local
usw $4,global
.space 16
.data
.global global
local: .word 4
global: .word 8

9
include/elf/ChangeLog
View File

@ -1,3 +1,12 @@
2006-03-22 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.
2006-03-19 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* hppa.h (SHF_HP_TLS, SHF_HP_NEAR_SHARED, SHF_HP_FAR_SHARED,

3
include/elf/mips.h
View File

@ -97,6 +97,9 @@ START_RELOC_NUMBERS (elf_mips_reloc_type)
RELOC_NUMBER (R_MIPS16_HI16, 104)
RELOC_NUMBER (R_MIPS16_LO16, 105)
FAKE_RELOC (R_MIPS16_max, 106)
/* These relocations are specific to VxWorks. */
RELOC_NUMBER (R_MIPS_COPY, 126)
RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
/* This was a GNU extension used by embedded-PIC. It was co-opted by
mips-linux for exception-handling data. It is no longer used, but
should continue to be supported by the linker for backward

16
ld/ChangeLog
View File

@ -1,3 +1,19 @@
2006-03-22 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
separate VxWorks emulations.
* emulparams/elf32ebmipvxworks.sh: New file.
* emulparams/elf32elmipvxworks.sh: New file.
* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
eelf32elmipvxworks.o.
(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
* Makefile.in: Regenerate.
2006-03-16 Alan Modra <amodra@bigpond.net.au>
PR 2434

12
ld/Makefile.am
View File

@ -158,7 +158,9 @@ ALL_EMULATIONS = \
eelf32ltsmip.o \
eelf32ltsmipn32.o \
eelf32ebmip.o \
eelf32ebmipvxworks.o \
eelf32elmip.o \
eelf32elmipvxworks.o \
eelf32fr30.o \
eelf32frv.o \
eelf32i370.o \
@ -725,10 +727,20 @@ eelf32ebmip.c: $(srcdir)/emulparams/elf32ebmip.sh \
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ebmip "$(tdir_elf32ebmip)"
eelf32ebmipvxworks.c: $(srcdir)/emulparams/elf32ebmipvxworks.sh \
$(srcdir)/emulparams/elf32ebmip.sh $(srcdir)/emulparams/vxworks.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ebmipvxworks "$(tdir_elf32ebmipvxworks)"
eelf32elmip.c: $(srcdir)/emulparams/elf32elmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmip "$(tdir_elf32elmip)"
eelf32elmipvxworks.c: $(srcdir)/emulparams/elf32elmipvxworks.sh \
$(srcdir)/emulparams/elf32elmip.sh $(srcdir)/emulparams/vxworks.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmipvxworks "$(tdir_elf32elmipvxworks)"
eelf32bmipn32.c: $(srcdir)/emulparams/elf32bmipn32.sh \
$(srcdir)/emultempl/irix.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}

12
ld/Makefile.in
View File

@ -381,7 +381,9 @@ ALL_EMULATIONS = \
eelf32ltsmip.o \
eelf32ltsmipn32.o \
eelf32ebmip.o \
eelf32ebmipvxworks.o \
eelf32elmip.o \
eelf32elmipvxworks.o \
eelf32fr30.o \
eelf32frv.o \
eelf32i370.o \
@ -1531,10 +1533,20 @@ eelf32ebmip.c: $(srcdir)/emulparams/elf32ebmip.sh \
$(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ebmip "$(tdir_elf32ebmip)"
eelf32ebmipvxworks.c: $(srcdir)/emulparams/elf32ebmipvxworks.sh \
$(srcdir)/emulparams/elf32ebmip.sh $(srcdir)/emulparams/vxworks.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ebmipvxworks "$(tdir_elf32ebmipvxworks)"
eelf32elmip.c: $(srcdir)/emulparams/elf32elmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmip "$(tdir_elf32elmip)"
eelf32elmipvxworks.c: $(srcdir)/emulparams/elf32elmipvxworks.sh \
$(srcdir)/emulparams/elf32elmip.sh $(srcdir)/emulparams/vxworks.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/vxworks.em \
$(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmipvxworks "$(tdir_elf32elmipvxworks)"
eelf32bmipn32.c: $(srcdir)/emulparams/elf32bmipn32.sh \
$(srcdir)/emultempl/irix.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}

7
ld/configure.tgt
View File

@ -324,9 +324,10 @@ mips*vr5000-*-elf*) targ_emul=elf32b4300 ;;
mips*el-*-elf*) targ_emul=elf32elmip ;;
mips*-*-elf*) targ_emul=elf32ebmip ;;
mips*-*-rtems*) targ_emul=elf32ebmip ;;
mips*el-*-vxworks*) targ_emul=elf32elmip ;;
mips*-*-vxworks*) targ_emul=elf32ebmip
targ_extra_emuls="elf32elmip" ;;
mips*el-*-vxworks*) targ_emul=elf32elmipvxworks
targ_extra_emuls="elf32ebmipvxworks" ;;
mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
targ_extra_emuls="elf32elmipvxworks" ;;
mips*-*-windiss) targ_emul=elf32mipswindiss ;;
mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"

11
ld/emulparams/elf32ebmipvxworks.sh Normal file
View File

@ -0,0 +1,11 @@
. ${srcdir}/emulparams/elf32bmip.sh
OUTPUT_FORMAT="elf32-bigmips-vxworks"
BIG_OUTPUT_FORMAT="elf32-bigmips-vxworks"
LITTLE_OUTPUT_FORMAT="elf32-littlemips-vxworks"
unset OTHER_GOT_SYMBOLS
SHLIB_TEXT_START_ADDR=0
unset TEXT_DYNAMIC
unset DATA_ADDR
. ${srcdir}/emulparams/vxworks.sh

11
ld/emulparams/elf32elmipvxworks.sh Normal file
View File

@ -0,0 +1,11 @@
. ${srcdir}/emulparams/elf32bmip.sh
OUTPUT_FORMAT="elf32-littlemips-vxworks"
BIG_OUTPUT_FORMAT="elf32-bigmips-vxworks"
LITTLE_OUTPUT_FORMAT="elf32-littlemips-vxworks"
unset OTHER_GOT_SYMBOLS
SHLIB_TEXT_START_ADDR=0
unset TEXT_DYNAMIC
unset DATA_ADDR
. ${srcdir}/emulparams/vxworks.sh

9
ld/testsuite/ChangeLog
View File

@ -1,3 +1,12 @@
2006-03-22 Richard Sandiford <richard@codesourcery.com>
* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
* ld-mips/vxworks2-static.sd: New tests.
* ld-mips/mips-elf.exp: Run them.
2006-03-17 Alexandre Oliva <aoliva@redhat.com>
* ld-powerpc/tls32.s: Verify that +32768 @plt addend is

28
ld/testsuite/ld-mips-elf/mips-elf.exp
View File

@ -16,6 +16,34 @@
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#
if {[istarget "mips*-*-vxworks"]} {
set mipsvxtests {
{"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
"-mips2" {vxworks1-lib.s}
{{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
{readelf --symbols vxworks1-lib.nd}}
"libvxworks1.so"}
{"VxWorks executable test 1 (dynamic)" \
"tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
"-mips2" {vxworks1.s}
{{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
"vxworks1"}
{"VxWorks executable test 2 (dynamic)" \
"-Tvxworks1.ld -q --force-dynamic"
"-mips2" {vxworks2.s}
{{readelf --segments vxworks2.sd}}
"vxworks2"}
{"VxWorks executable test 2 (static)"
"-Tvxworks1.ld"
"-mips2" {vxworks2.s}
{{readelf --segments vxworks2-static.sd}}
"vxworks2"}
}
run_ld_link_tests $mipsvxtests
run_dump_test "vxworks1-static"
return
}
if {![istarget mips*-*-*] || ![is_elf_format]} {
return
}

50
ld/testsuite/ld-mips-elf/vxworks1-lib.dd Normal file
View File

@ -0,0 +1,50 @@
.*: file format .*
Disassembly of section \.plt:
00080800 <_PROCEDURE_LINKAGE_TABLE_>:
80800: 8f990008 lw t9,8\(gp\)
80804: 00000000 nop
80808: 03200008 jr t9
8080c: 00000000 nop
\.\.\.
80818: 1000fff9 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
8081c: 24180000 li t8,0
80820: 1000fff7 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
80824: 24180001 li t8,1
Disassembly of section \.text:
00080c00 <foo>:
80c00: 27bdffe0 addiu sp,sp,-32
80c04: afbf0000 sw ra,0\(sp\)
80c08: afbc0004 sw gp,4\(sp\)
80c0c: 3c1c0000 lui gp,0x0
80c10: 8f9c0000 lw gp,0\(gp\)
80c14: 8f9c0000 lw gp,0\(gp\)
80c18: 8f820014 lw v0,20\(gp\)
80c1c: 8c430000 lw v1,0\(v0\)
80c20: 24630001 addiu v1,v1,1
80c24: ac430000 sw v1,0\(v0\)
80c28: 8f99000c lw t9,12\(gp\)
80c2c: 0320f809 jalr t9
80c30: 00000000 nop
80c34: 8f99fff4 lw t9,-12\(gp\)
80c38: 0320f809 jalr t9
80c3c: 00000000 nop
80c40: 8f99fff0 lw t9,-16\(gp\)
80c44: 0320f809 jalr t9
80c48: 00000000 nop
80c4c: 8fbf0000 lw ra,0\(sp\)
80c50: 8fbc0004 lw gp,4\(sp\)
80c54: 03e00008 jr ra
80c58: 27bd0020 addiu sp,sp,32
00080c5c <slocal>:
80c5c: 03e00008 jr ra
80c60: 00000000 nop
00080c64 <sglobal>:
80c64: 03e00008 jr ra
80c68: 00000000 nop
#pass

9
ld/testsuite/ld-mips-elf/vxworks1-lib.nd Normal file
View File

@ -0,0 +1,9 @@
#...
Symbol table '\.dynsym' .*:
#...
.*: 00081410 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
#...
Symbol table '\.symtab' .*:
#...
.*: 00081410 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
#pass

18
ld/testsuite/ld-mips-elf/vxworks1-lib.rd Normal file
View File

@ -0,0 +1,18 @@
Relocation section '\.rela\.dyn' at offset .* contains .* entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
00080c0c .*05 R_MIPS_HI16 00000000 __GOTT_BASE__ \+ 0
00080c10 .*06 R_MIPS_LO16 00000000 __GOTT_BASE__ \+ 0
00080c14 .*01 R_MIPS_16 00000000 __GOTT_INDEX__ \+ 0
0008141c .*02 R_MIPS_32 00080c00 \.text \+ 5c
00081c00 00000002 R_MIPS_32 00080c5c
00081c04 00000002 R_MIPS_32 00081c00
00081c08 .*02 R_MIPS_32 00081c08 dglobal \+ 0
00081c0c .*02 R_MIPS_32 00000000 dexternal \+ 0
00081424 .*02 R_MIPS_32 00081800 x \+ 0
00000000 00000000 R_MIPS_NONE 00000000
#...
Relocation section '\.rela\.plt' at offset .* contains 2 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
00081400 .*7f R_MIPS_JUMP_SLOT 00000000 sexternal \+ 0
00081404 .*7f R_MIPS_JUMP_SLOT 00080c64 sglobal \+ 0

52
ld/testsuite/ld-mips-elf/vxworks1-lib.s Normal file
View File

@ -0,0 +1,52 @@
.text
.globl foo
.type foo, @function
foo:
addiu $sp,$sp,-32
sw $31,($sp)
sw $28,4($sp)
lui $28,%hi(__GOTT_BASE__)
lw $28,%lo(__GOTT_BASE__)($28)
lw $28,%half(__GOTT_INDEX__)($28)
lw $2,%got(x)($28)
lw $3,($2)
addiu $3,$3,1
sw $3,($2)
lw $25,%got(slocal)($gp)
jalr $25
lw $25,%call16(sglobal)($gp)
jalr $25
lw $25,%call16(sexternal)($gp)
jalr $25
lw $31,($sp)
lw $28,4($sp)
addiu $sp,$sp,32
jr $31
.size foo, .-foo
.type slocal, @function
slocal:
jr $31
.size slocal, .-slocal
.globl sglobal
.type sglobal, @function
sglobal:
jr $31
.size sglobal, .-sglobal
.comm x,4,4
.data
.type dlocal, @object
dlocal:
.word slocal
.word dlocal
.size dlocal, .-dlocal
.globl dglobal
.type dglobal, @object
dglobal:
.word dglobal
.word dexternal
.size dglobal, .-dglobal

4
ld/testsuite/ld-mips-elf/vxworks1-static.d Normal file
View File

@ -0,0 +1,4 @@
#name: VxWorks executable test 1 (static)
#source: vxworks1.s
#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
#error: Dynamic sections created in non-dynamic link

51
ld/testsuite/ld-mips-elf/vxworks1.dd Normal file
View File

@ -0,0 +1,51 @@
.*: file format .*
Disassembly of section \.plt:
00080800 <_PROCEDURE_LINKAGE_TABLE_>:
80800: 3c190008 lui t9,0x8
80800: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_
80804: 27391410 addiu t9,t9,5136
80804: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_
80808: 8f390008 lw t9,8\(t9\)
8080c: 00000000 nop
80810: 03200008 jr t9
80814: 00000000 nop
80818: 1000fff9 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
8081c: 24180000 li t8,0
80820: 3c190008 lui t9,0x8
80820: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_\+0xfffffff0
80824: 27391400 addiu t9,t9,5120
80824: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_\+0xfffffff0
80828: 8f390000 lw t9,0\(t9\)
8082c: 00000000 nop
80830: 03200008 jr t9
80834: 00000000 nop
80838: 1000fff1 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
8083c: 24180001 li t8,1
80840: 3c190008 lui t9,0x8
80840: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_\+0xfffffff4
80844: 27391404 addiu t9,t9,5124
80844: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_\+0xfffffff4
80848: 8f390000 lw t9,0\(t9\)
8084c: 00000000 nop
80850: 03200008 jr t9
80854: 00000000 nop
Disassembly of section \.text:
00080c00 <_start>:
80c00: 0c020210 jal 80840 <_PROCEDURE_LINKAGE_TABLE_\+0x40>
80c00: R_MIPS_26 \.plt\+0x40
80c04: 00000000 nop
80c08: 0c020306 jal 80c18 <sexternal>
80c08: R_MIPS_26 sexternal
80c0c: 00000000 nop
80c10: 08020208 j 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
80c10: R_MIPS_26 \.plt\+0x20
80c14: 00000000 nop
00080c18 <sexternal>:
80c18: 03e00008 jr ra
80c1c: 00000000 nop
#pass

32
ld/testsuite/ld-mips-elf/vxworks1.ld Normal file
View File

@ -0,0 +1,32 @@
SECTIONS
{
. = 0x80000;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
. = ALIGN (0x400);
.rela.dyn : { *(.rela.dyn) }
.rela.plt : { *(.rela.plt) }
. = ALIGN (0x400);
.plt : { *(.plt) }
. = ALIGN (0x400);
.text : { *(.text) }
. = ALIGN (0x1000);
.dynamic : { *(.dynamic) }
. = ALIGN (0x400);
.got : { *(.got.plt) *(.got) }
. = ALIGN (0x400);
.bss : { *(.bss) *(.dynbss) }
. = ALIGN (0x400);
.data : { *(.data) }
/DISCARD/ : { *(.reginfo) }
}

32
ld/testsuite/ld-mips-elf/vxworks1.rd Normal file
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@ -0,0 +1,32 @@
Relocation section '\.rela\.dyn' at offset .* contains 1 entries:
Offset Info Type Sym.Value Sym. Name \+ Addend
00081800 .*7e R_MIPS_COPY 00081800 dglobal \+ 0
Relocation section '\.rela\.plt' at offset .* contains 2 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
00081400 .*7f R_MIPS_JUMP_SLOT 00080820 sglobal \+ 0
00081404 .*7f R_MIPS_JUMP_SLOT 00080840 foo \+ 0
Relocation section '\.rela\.text' at offset .* contains 3 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
00080c00 .*04 R_MIPS_26 00080800 \.plt \+ 40
00080c08 .*04 R_MIPS_26 00080c18 sexternal \+ 0
00080c10 .*04 R_MIPS_26 00080800 \.plt \+ 20
Relocation section '\.rela\.data' at offset .* contains 3 entries:
Offset Info Type Sym.Value Sym. Name \+ Addend
00081c00 .*02 R_MIPS_32 00081c00 .data \+ 0
00081c04 .*02 R_MIPS_32 00081800 .bss \+ 0
00081c08 .*02 R_MIPS_32 00081c04 dexternal \+ 0
Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
00080800 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ 0
00080804 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ 0
00081400 .*02 R_MIPS_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 18
00080820 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff0
00080824 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff0
00081404 .*02 R_MIPS_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 38
00080840 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff4
00080844 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff4

27
ld/testsuite/ld-mips-elf/vxworks1.s Normal file
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.text
.globl _start
.type _start, @function
_start:
jal foo
jal sexternal
j sglobal
.size _start, .-_start
.globl sexternal
.type sexternal, @function
sexternal:
jr $31
.size sexternal, .-sexternal
.data
.type dlocal, @object
dlocal:
.word dlocal
.size dlocal, .-dlocal
.globl dexternal
.type dexternal, @object
dexternal:
.word dglobal
.word dexternal
.size dexternal, .-dexternal

9
ld/testsuite/ld-mips-elf/vxworks2-static.sd Normal file
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#...
Elf file type is EXEC \(Executable file\)
Entry point 0x80000
#...
Program Headers:
Type .*
LOAD .* 0x00080000 0x00080000 .* R E 0x1000
#...

5
ld/testsuite/ld-mips-elf/vxworks2.s Normal file
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.globl _start
.type _start, @function
_start:
jr $31
.size _start, .-_start

13
ld/testsuite/ld-mips-elf/vxworks2.sd Normal file
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#...
Elf file type is EXEC \(Executable file\)
Entry point 0x80400
#...
Program Headers:
Type .*
PHDR .*
#...
LOAD .* 0x00080000 0x00080000 .* R E 0x1000
LOAD .* 0x00081000 0x00081000 .* RW 0x1000
DYNAMIC .*
#...