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Yet more signed overflow fixes

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* elf-bfd.h (ELF_LOCAL_SYMBOL_HASH): Avoid signed overflow.
	* elf32-hppa.c (final_link_relocate): Likewise.
	* elf32-ppc.c (_bfd_elf_ppc_at_tls_transform): Likewise.
	(_bfd_elf_ppc_at_tprel_transform, is_insn_ds_form): Likewise.
	(is_insn_dq_form, ppc_elf_relocate_section): Likewise.
	* elf64-ppc.c (ok_lo_toc_insn, ppc64_elf_edit_toc): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* elfxx-mips.c (mips_elf_perform_relocation): Likewise.
	* netbsd.h (N_SET_FLAGS): Likewise.
This commit is contained in:
Alan Modra 2019-12-18 18:33:14 +10:30
parent 2480b6fa94
commit 2365f8d70c
7 changed files with 122 additions and 110 deletions
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12
bfd/ChangeLog
View File

@ -1,3 +1,15 @@
2019-12-18 Alan Modra <amodra@gmail.com>
* elf-bfd.h (ELF_LOCAL_SYMBOL_HASH): Avoid signed overflow.
* elf32-hppa.c (final_link_relocate): Likewise.
* elf32-ppc.c (_bfd_elf_ppc_at_tls_transform): Likewise.
(_bfd_elf_ppc_at_tprel_transform, is_insn_ds_form): Likewise.
(is_insn_dq_form, ppc_elf_relocate_section): Likewise.
* elf64-ppc.c (ok_lo_toc_insn, ppc64_elf_edit_toc): Likewise.
(ppc64_elf_relocate_section): Likewise.
* elfxx-mips.c (mips_elf_perform_relocation): Likewise.
* netbsd.h (N_SET_FLAGS): Likewise.
2019-12-17 Alan Modra <amodra@gmail.com>
* coff-tic80.c: Delete file.

4
bfd/elf-bfd.h
View File

@ -2836,8 +2836,8 @@ extern asection _bfd_elf_large_com_section;
/* Hash for local symbol with the first section id, ID, in the input
file and the local symbol index, SYM. */
#define ELF_LOCAL_SYMBOL_HASH(ID, SYM) \
(((((ID) & 0xff) << 24) | (((ID) & 0xff00) << 8)) \
^ (SYM) ^ ((ID) >> 16))
(((((ID) & 0xffU) << 24) | (((ID) & 0xff00) << 8)) \
^ (SYM) ^ (((ID) & 0xffff0000U) >> 16))
/* This is the condition under which finish_dynamic_symbol will be called.
If our finish_dynamic_symbol isn't called, we'll need to do something

8
bfd/elf32-hppa.c
View File

@ -3221,7 +3221,7 @@ final_link_relocate (asection *input_section,
struct elf32_hppa_link_hash_entry *hh,
struct bfd_link_info *info)
{
int insn;
unsigned int insn;
unsigned int r_type = ELF32_R_TYPE (rela->r_info);
unsigned int orig_r_type = r_type;
reloc_howto_type *howto = elf_hppa_howto_table + r_type;
@ -3340,7 +3340,7 @@ final_link_relocate (asection *input_section,
/* GCC sometimes uses a register other than r19 for the
operation, so we must convert any addil instruction
that uses this relocation. */
if ((insn & 0xfc000000) == ((int) OP_ADDIL << 26))
if ((insn & 0xfc000000) == OP_ADDIL << 26)
insn = ADDIL_DP;
else
/* We must have a ldil instruction. It's too hard to find
@ -3374,8 +3374,8 @@ final_link_relocate (asection *input_section,
instance: "extern int foo" with foo defined as "const int foo". */
if (sym_sec == NULL || (sym_sec->flags & SEC_CODE) != 0)
{
if ((insn & ((0x3f << 26) | (0x1f << 21)))
== (((int) OP_ADDIL << 26) | (27 << 21)))
if ((insn & ((0x3fu << 26) | (0x1f << 21)))
== ((OP_ADDIL << 26) | (27 << 21)))
{
insn &= ~ (0x1f << 21);
}

118
bfd/elf32-ppc.c
View File

@ -6843,7 +6843,7 @@ _bfd_elf_ppc_at_tls_transform (unsigned int insn, unsigned int reg)
{
unsigned int rtra;
if ((insn & (0x3f << 26)) != 31 << 26)
if ((insn & (0x3fu << 26)) != 31 << 26)
return 0;
if (reg == 0 || ((insn >> 11) & 0x1f) == reg)
@ -6861,13 +6861,13 @@ _bfd_elf_ppc_at_tls_transform (unsigned int insn, unsigned int reg)
|| ((insn & (0x1f << 6)) >= 16 << 6
&& (insn & (0x1f << 6)) < 24 << 6)))
/* load and store indexed -> dform. */
insn = (32 | ((insn >> 6) & 0x1f)) << 26;
insn = (32u | ((insn >> 6) & 0x1f)) << 26;
else if ((insn & (((0x1a << 5) | 0x1f) << 1)) == 21 << 1)
/* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
insn = ((58 | ((insn >> 6) & 4)) << 26) | ((insn >> 6) & 1);
insn = ((58u | ((insn >> 6) & 4)) << 26) | ((insn >> 6) & 1);
else if ((insn & (((0x1f << 5) | 0x1f) << 1)) == 341 << 1)
/* lwax -> lwa. */
insn = (58 << 26) | 2;
insn = (58u << 26) | 2;
else
return 0;
insn |= rtra;
@ -6882,36 +6882,36 @@ unsigned int
_bfd_elf_ppc_at_tprel_transform (unsigned int insn, unsigned int reg)
{
if ((insn & (0x1f << 16)) == reg << 16
&& ((insn & (0x3f << 26)) == 14u << 26 /* addi */
|| (insn & (0x3f << 26)) == 15u << 26 /* addis */
|| (insn & (0x3f << 26)) == 32u << 26 /* lwz */
|| (insn & (0x3f << 26)) == 34u << 26 /* lbz */
|| (insn & (0x3f << 26)) == 36u << 26 /* stw */
|| (insn & (0x3f << 26)) == 38u << 26 /* stb */
|| (insn & (0x3f << 26)) == 40u << 26 /* lhz */
|| (insn & (0x3f << 26)) == 42u << 26 /* lha */
|| (insn & (0x3f << 26)) == 44u << 26 /* sth */
|| (insn & (0x3f << 26)) == 46u << 26 /* lmw */
|| (insn & (0x3f << 26)) == 47u << 26 /* stmw */
|| (insn & (0x3f << 26)) == 48u << 26 /* lfs */
|| (insn & (0x3f << 26)) == 50u << 26 /* lfd */
|| (insn & (0x3f << 26)) == 52u << 26 /* stfs */
|| (insn & (0x3f << 26)) == 54u << 26 /* stfd */
|| ((insn & (0x3f << 26)) == 58u << 26 /* lwa,ld,lmd */
&& ((insn & (0x3fu << 26)) == 14u << 26 /* addi */
|| (insn & (0x3fu << 26)) == 15u << 26 /* addis */
|| (insn & (0x3fu << 26)) == 32u << 26 /* lwz */
|| (insn & (0x3fu << 26)) == 34u << 26 /* lbz */
|| (insn & (0x3fu << 26)) == 36u << 26 /* stw */
|| (insn & (0x3fu << 26)) == 38u << 26 /* stb */
|| (insn & (0x3fu << 26)) == 40u << 26 /* lhz */
|| (insn & (0x3fu << 26)) == 42u << 26 /* lha */
|| (insn & (0x3fu << 26)) == 44u << 26 /* sth */
|| (insn & (0x3fu << 26)) == 46u << 26 /* lmw */
|| (insn & (0x3fu << 26)) == 47u << 26 /* stmw */
|| (insn & (0x3fu << 26)) == 48u << 26 /* lfs */
|| (insn & (0x3fu << 26)) == 50u << 26 /* lfd */
|| (insn & (0x3fu << 26)) == 52u << 26 /* stfs */
|| (insn & (0x3fu << 26)) == 54u << 26 /* stfd */
|| ((insn & (0x3fu << 26)) == 58u << 26 /* lwa,ld,lmd */
&& (insn & 3) != 1)
|| ((insn & (0x3f << 26)) == 62u << 26 /* std, stmd */
|| ((insn & (0x3fu << 26)) == 62u << 26 /* std, stmd */
&& ((insn & 3) == 0 || (insn & 3) == 3))))
{
insn &= ~(0x1f << 16);
}
else if ((insn & (0x1f << 21)) == reg << 21
&& ((insn & (0x3e << 26)) == 24u << 26 /* ori, oris */
|| (insn & (0x3e << 26)) == 26u << 26 /* xori,xoris */
|| (insn & (0x3e << 26)) == 28u << 26 /* andi,andis */))
&& ((insn & (0x3eu << 26)) == 24u << 26 /* ori, oris */
|| (insn & (0x3eu << 26)) == 26u << 26 /* xori,xoris */
|| (insn & (0x3eu << 26)) == 28u << 26 /* andi,andis */))
{
insn &= ~(0x1f << 21);
insn |= (insn & (0x1f << 16)) << 5;
if ((insn & (0x3e << 26)) == 26 << 26 /* xori,xoris */)
if ((insn & (0x3eu << 26)) == 26u << 26 /* xori,xoris */)
insn -= 2 >> 26; /* convert to ori,oris */
}
else
@ -6922,17 +6922,17 @@ _bfd_elf_ppc_at_tprel_transform (unsigned int insn, unsigned int reg)
static bfd_boolean
is_insn_ds_form (unsigned int insn)
{
return ((insn & (0x3f << 26)) == 58u << 26 /* ld,ldu,lwa */
|| (insn & (0x3f << 26)) == 62u << 26 /* std,stdu,stq */
|| (insn & (0x3f << 26)) == 57u << 26 /* lfdp */
|| (insn & (0x3f << 26)) == 61u << 26 /* stfdp */);
return ((insn & (0x3fu << 26)) == 58u << 26 /* ld,ldu,lwa */
|| (insn & (0x3fu << 26)) == 62u << 26 /* std,stdu,stq */
|| (insn & (0x3fu << 26)) == 57u << 26 /* lfdp */
|| (insn & (0x3fu << 26)) == 61u << 26 /* stfdp */);
}
static bfd_boolean
is_insn_dq_form (unsigned int insn)
{
return ((insn & (0x3f << 26)) == 56u << 26 /* lq */
|| ((insn & (0x3f << 26)) == (61u << 26) /* lxv, stxv */
return ((insn & (0x3fu << 26)) == 56u << 26 /* lq */
|| ((insn & (0x3fu << 26)) == (61u << 26) /* lxv, stxv */
&& (insn & 3) == 1));
}
@ -7245,7 +7245,7 @@ ppc_elf_relocate_section (bfd *output_bfd,
{
/* IE */
insn1 &= (0x1f << 21) | (0x1f << 16);
insn1 |= 32 << 26; /* lwz */
insn1 |= 32u << 26; /* lwz */
if (offset != (bfd_vma) -1)
{
rel[1].r_info = ELF32_R_INFO (STN_UNDEF, R_PPC_NONE);
@ -7414,7 +7414,7 @@ ppc_elf_relocate_section (bfd *output_bfd,
insn = bfd_get_32 (input_bfd,
contents + rel->r_offset - d_offset);
if ((insn & (0x3f << 26)) == 15u << 26
if ((insn & (0x3fu << 26)) == 15u << 26
&& (insn & (0x1f << 16)) != 0)
{
if (!bfd_link_pic (info))
@ -7450,7 +7450,7 @@ ppc_elf_relocate_section (bfd *output_bfd,
{
insn = bfd_get_32 (input_bfd,
contents + rel->r_offset - d_offset);
if ((insn & (0x3f << 26)) == (15u << 26)
if ((insn & (0x3fu << 26)) == (15u << 26)
&& (insn & (0x1f << 16)) == 0 /* lis */)
{
bfd_byte *p;
@ -7513,23 +7513,23 @@ ppc_elf_relocate_section (bfd *output_bfd,
{
insn = bfd_get_32 (input_bfd,
contents + rel->r_offset - d_offset);
if ((insn & (0x3f << 26)) == 14u << 26 /* addi */
|| (insn & (0x3f << 26)) == 32u << 26 /* lwz */
|| (insn & (0x3f << 26)) == 34u << 26 /* lbz */
|| (insn & (0x3f << 26)) == 36u << 26 /* stw */
|| (insn & (0x3f << 26)) == 38u << 26 /* stb */
|| (insn & (0x3f << 26)) == 40u << 26 /* lhz */
|| (insn & (0x3f << 26)) == 42u << 26 /* lha */
|| (insn & (0x3f << 26)) == 44u << 26 /* sth */
|| (insn & (0x3f << 26)) == 46u << 26 /* lmw */
|| (insn & (0x3f << 26)) == 47u << 26 /* stmw */
|| (insn & (0x3f << 26)) == 48u << 26 /* lfs */
|| (insn & (0x3f << 26)) == 50u << 26 /* lfd */
|| (insn & (0x3f << 26)) == 52u << 26 /* stfs */
|| (insn & (0x3f << 26)) == 54u << 26 /* stfd */
|| ((insn & (0x3f << 26)) == 58u << 26 /* lwa,ld,lmd */
if ((insn & (0x3fu << 26)) == 14u << 26 /* addi */
|| (insn & (0x3fu << 26)) == 32u << 26 /* lwz */
|| (insn & (0x3fu << 26)) == 34u << 26 /* lbz */
|| (insn & (0x3fu << 26)) == 36u << 26 /* stw */
|| (insn & (0x3fu << 26)) == 38u << 26 /* stb */
|| (insn & (0x3fu << 26)) == 40u << 26 /* lhz */
|| (insn & (0x3fu << 26)) == 42u << 26 /* lha */
|| (insn & (0x3fu << 26)) == 44u << 26 /* sth */
|| (insn & (0x3fu << 26)) == 46u << 26 /* lmw */
|| (insn & (0x3fu << 26)) == 47u << 26 /* stmw */
|| (insn & (0x3fu << 26)) == 48u << 26 /* lfs */
|| (insn & (0x3fu << 26)) == 50u << 26 /* lfd */
|| (insn & (0x3fu << 26)) == 52u << 26 /* stfs */
|| (insn & (0x3fu << 26)) == 54u << 26 /* stfd */
|| ((insn & (0x3fu << 26)) == 58u << 26 /* lwa,ld,lmd */
&& (insn & 3) != 1)
|| ((insn & (0x3f << 26)) == 62u << 26 /* std, stmd */
|| ((insn & (0x3fu << 26)) == 62u << 26 /* std, stmd */
&& ((insn & 3) == 0 || (insn & 3) == 3)))
{
/* Arrange to apply the reloc addend, if any. */
@ -7639,7 +7639,7 @@ ppc_elf_relocate_section (bfd *output_bfd,
{
bfd_byte *p = contents + (rel->r_offset & ~3);
unsigned int insn = bfd_get_32 (input_bfd, p);
if ((insn & ((0x3f << 26) | 0x1f << 16))
if ((insn & ((0x3fu << 26) | 0x1f << 16))
!= ((15u << 26) | (2 << 16)) /* addis rt,2,imm */)
/* xgettext:c-format */
info->callbacks->minfo
@ -8993,11 +8993,11 @@ ppc_elf_relocate_section (bfd *output_bfd,
unsigned int insn;
insn = bfd_get_32 (input_bfd, contents + (rel->r_offset & ~3));
if ((insn & (0x3f << 26)) == 10u << 26 /* cmpli */)
if ((insn & (0x3fu << 26)) == 10u << 26 /* cmpli */)
complain = complain_overflow_bitfield;
else if ((insn & (0x3f << 26)) == 28u << 26 /* andi */
|| (insn & (0x3f << 26)) == 24u << 26 /* ori */
|| (insn & (0x3f << 26)) == 26u << 26 /* xori */)
else if ((insn & (0x3fu << 26)) == 28u << 26 /* andi */
|| (insn & (0x3fu << 26)) == 24u << 26 /* ori */
|| (insn & (0x3fu << 26)) == 26u << 26 /* xori */)
complain = complain_overflow_unsigned;
}
if (howto->complain_on_overflow != complain)
@ -9221,10 +9221,10 @@ ppc_elf_relocate_section (bfd *output_bfd,
. new_page: new_page:
. */
insn = bfd_get_32 (input_bfd, contents + offset);
if ((insn & (0x3f << 26)) == (18u << 26) /* b,bl,ba,bla */
|| ((insn & (0x3f << 26)) == (16u << 26) /* bc,bcl,bca,bcla*/
if ((insn & (0x3fu << 26)) == (18u << 26) /* b,bl,ba,bla */
|| ((insn & (0x3fu << 26)) == (16u << 26) /* bc,bcl,bca,bcla*/
&& (insn & (0x14 << 21)) == (0x14 << 21)) /* with BO=0x14 */
|| ((insn & (0x3f << 26)) == (19u << 26)
|| ((insn & (0x3fu << 26)) == (19u << 26)
&& (insn & (0x3ff << 1)) == (16u << 1) /* bclr,bclrl */
&& (insn & (0x14 << 21)) == (0x14 << 21)))/* with BO=0x14 */
continue;
@ -9308,7 +9308,7 @@ ppc_elf_relocate_section (bfd *output_bfd,
else
rel = NULL;
if ((insn & (0x3f << 26)) == (16u << 26) /* bc */
if ((insn & (0x3fu << 26)) == (16u << 26) /* bc */
&& (insn & 2) == 0 /* relative */)
{
bfd_vma delta = ((insn & 0xfffc) ^ 0x8000) - 0x8000;

86
bfd/elf64-ppc.c
View File

@ -8259,34 +8259,34 @@ adjust_toc_syms (struct elf_link_hash_entry *h, void *inf)
static bfd_boolean
ok_lo_toc_insn (unsigned int insn, enum elf_ppc64_reloc_type r_type)
{
return ((insn & (0x3f << 26)) == 12u << 26 /* addic */
|| (insn & (0x3f << 26)) == 14u << 26 /* addi */
|| (insn & (0x3f << 26)) == 32u << 26 /* lwz */
|| (insn & (0x3f << 26)) == 34u << 26 /* lbz */
|| (insn & (0x3f << 26)) == 36u << 26 /* stw */
|| (insn & (0x3f << 26)) == 38u << 26 /* stb */
|| (insn & (0x3f << 26)) == 40u << 26 /* lhz */
|| (insn & (0x3f << 26)) == 42u << 26 /* lha */
|| (insn & (0x3f << 26)) == 44u << 26 /* sth */
|| (insn & (0x3f << 26)) == 46u << 26 /* lmw */
|| (insn & (0x3f << 26)) == 47u << 26 /* stmw */
|| (insn & (0x3f << 26)) == 48u << 26 /* lfs */
|| (insn & (0x3f << 26)) == 50u << 26 /* lfd */
|| (insn & (0x3f << 26)) == 52u << 26 /* stfs */
|| (insn & (0x3f << 26)) == 54u << 26 /* stfd */
|| (insn & (0x3f << 26)) == 56u << 26 /* lq,lfq */
|| ((insn & (0x3f << 26)) == 57u << 26 /* lxsd,lxssp,lfdp */
return ((insn & (0x3fu << 26)) == 12u << 26 /* addic */
|| (insn & (0x3fu << 26)) == 14u << 26 /* addi */
|| (insn & (0x3fu << 26)) == 32u << 26 /* lwz */
|| (insn & (0x3fu << 26)) == 34u << 26 /* lbz */
|| (insn & (0x3fu << 26)) == 36u << 26 /* stw */
|| (insn & (0x3fu << 26)) == 38u << 26 /* stb */
|| (insn & (0x3fu << 26)) == 40u << 26 /* lhz */
|| (insn & (0x3fu << 26)) == 42u << 26 /* lha */
|| (insn & (0x3fu << 26)) == 44u << 26 /* sth */
|| (insn & (0x3fu << 26)) == 46u << 26 /* lmw */
|| (insn & (0x3fu << 26)) == 47u << 26 /* stmw */
|| (insn & (0x3fu << 26)) == 48u << 26 /* lfs */
|| (insn & (0x3fu << 26)) == 50u << 26 /* lfd */
|| (insn & (0x3fu << 26)) == 52u << 26 /* stfs */
|| (insn & (0x3fu << 26)) == 54u << 26 /* stfd */
|| (insn & (0x3fu << 26)) == 56u << 26 /* lq,lfq */
|| ((insn & (0x3fu << 26)) == 57u << 26 /* lxsd,lxssp,lfdp */
/* Exclude lfqu by testing reloc. If relocs are ever
defined for the reduced D field in psq_lu then those
will need testing too. */
&& r_type != R_PPC64_TOC16_LO && r_type != R_PPC64_GOT16_LO)
|| ((insn & (0x3f << 26)) == 58u << 26 /* ld,lwa */
|| ((insn & (0x3fu << 26)) == 58u << 26 /* ld,lwa */
&& (insn & 1) == 0)
|| (insn & (0x3f << 26)) == 60u << 26 /* stfq */
|| ((insn & (0x3f << 26)) == 61u << 26 /* lxv,stx{v,sd,ssp},stfdp */
|| (insn & (0x3fu << 26)) == 60u << 26 /* stfq */
|| ((insn & (0x3fu << 26)) == 61u << 26 /* lxv,stx{v,sd,ssp},stfdp */
/* Exclude stfqu. psq_stu as above for psq_lu. */
&& r_type != R_PPC64_TOC16_LO && r_type != R_PPC64_GOT16_LO)
|| ((insn & (0x3f << 26)) == 62u << 26 /* std,stq */
|| ((insn & (0x3fu << 26)) == 62u << 26 /* std,stq */
&& (insn & 1) == 0));
}
@ -9117,7 +9117,7 @@ ppc64_elf_edit_toc (struct bfd_link_info *info)
insn = bfd_get_32 (ibfd, buf);
if (insn_check == check_lo
? !ok_lo_toc_insn (insn, r_type)
: ((insn & ((0x3f << 26) | 0x1f << 16))
: ((insn & ((0x3fu << 26) | 0x1f << 16))
!= ((15u << 26) | (2 << 16)) /* addis rt,2,imm */))
{
char str[12];
@ -9188,7 +9188,7 @@ ppc64_elf_edit_toc (struct bfd_link_info *info)
rel->r_offset & ~3, 4))
goto got_error_ret;
insn = bfd_get_32 (ibfd, buf);
if (((insn & ((0x3f << 26) | 0x1f << 16))
if (((insn & ((0x3fu << 26) | 0x1f << 16))
!= ((15u << 26) | (2 << 16)) /* addis rt,2,imm */))
continue;
break;
@ -9201,7 +9201,7 @@ ppc64_elf_edit_toc (struct bfd_link_info *info)
rel->r_offset & ~3, 4))
goto got_error_ret;
insn = bfd_get_32 (ibfd, buf);
if ((insn & (0x3f << 26 | 0x3)) != 58u << 26 /* ld */)
if ((insn & (0x3fu << 26 | 0x3)) != 58u << 26 /* ld */)
continue;
break;
@ -9218,7 +9218,7 @@ ppc64_elf_edit_toc (struct bfd_link_info *info)
if ((insn & (-1u << 18)) != ((1u << 26) | (1u << 20)))
continue;
insn = bfd_get_32 (ibfd, buf + 4);
if ((insn & (0x3f << 26)) != 57u << 26)
if ((insn & (0x3fu << 26)) != 57u << 26)
continue;
break;
}
@ -14537,7 +14537,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
case R_PPC64_LO_DS_OPT:
insn = bfd_get_32 (input_bfd, contents + rel->r_offset - d_offset);
if ((insn & (0x3f << 26)) != 58u << 26)
if ((insn & (0x3fu << 26)) != 58u << 26)
abort ();
insn += (14u << 26) - (58u << 26);
bfd_put_32 (input_bfd, insn, contents + rel->r_offset - d_offset);
@ -14679,7 +14679,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
/* For pcrel IE to LE we already have the full
offset and thus don't need an addi here. A nop
or mr will do. */
if ((insn & (0x3f << 26)) == 14 << 26)
if ((insn & (0x3fu << 26)) == 14 << 26)
{
/* Extract regs from addi rt,ra,si. */
unsigned int rt = (insn >> 21) & 0x1f;
@ -14759,7 +14759,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
{
/* IE */
insn1 &= (0x1f << 21) | (0x1f << 16);
insn1 |= 58 << 26; /* ld */
insn1 |= 58u << 26; /* ld */
insn2 = 0x7c636a14; /* add 3,3,13 */
if (offset != (bfd_vma) -1)
rel[1].r_info = ELF64_R_INFO (STN_UNDEF, R_PPC64_NONE);
@ -15434,7 +15434,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
&& SYMBOL_REFERENCES_LOCAL (info, &h->elf))
{
insn = bfd_get_32 (input_bfd, contents + (rel->r_offset & ~3));
if ((insn & (0x3f << 26 | 0x3)) == 58u << 26 /* ld */)
if ((insn & (0x3fu << 26 | 0x3)) == 58u << 26 /* ld */)
{
insn += (14u << 26) - (58u << 26);
bfd_put_32 (input_bfd, insn, contents + (rel->r_offset & ~3));
@ -15451,14 +15451,14 @@ ppc64_elf_relocate_section (bfd *output_bfd,
&& SYMBOL_REFERENCES_LOCAL (info, &h->elf))
{
insn = bfd_get_32 (input_bfd, contents + (rel->r_offset & ~3));
if ((insn & (0x3f << 26 | 0x3)) == 58u << 26 /* ld */)
if ((insn & (0x3fu << 26 | 0x3)) == 58u << 26 /* ld */)
{
insn += (14u << 26) - (58u << 26);
bfd_put_32 (input_bfd, insn, contents + (rel->r_offset & ~3));
r_type = R_PPC64_TOC16_LO;
rel->r_info = ELF64_R_INFO (r_symndx, r_type);
}
else if ((insn & (0x3f << 26)) == 15u << 26 /* addis */)
else if ((insn & (0x3fu << 26)) == 15u << 26 /* addis */)
{
r_type = R_PPC64_TOC16_HA;
rel->r_info = ELF64_R_INFO (r_symndx, r_type);
@ -16418,10 +16418,10 @@ ppc64_elf_relocate_section (bfd *output_bfd,
{
bfd_byte *p = contents + (rel->r_offset & ~3);
insn = bfd_get_32 (input_bfd, p);
if ((insn & (0x3f << 26)) == 12u << 26 /* addic */)
if ((insn & (0x3fu << 26)) == 12u << 26 /* addic */)
{
/* Transform addic to addi when we change reg. */
insn &= ~((0x3f << 26) | (0x1f << 16));
insn &= ~((0x3fu << 26) | (0x1f << 16));
insn |= (14u << 26) | (2 << 16);
}
else
@ -16438,7 +16438,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
{
bfd_byte *p = contents + (rel->r_offset & ~3);
insn = bfd_get_32 (input_bfd, p);
if ((insn & ((0x3f << 26) | 0x1f << 16))
if ((insn & ((0x3fu << 26) | 0x1f << 16))
!= ((15u << 26) | (13 << 16)) /* addis rt,13,imm */)
/* xgettext:c-format */
info->callbacks->minfo
@ -16547,8 +16547,8 @@ ppc64_elf_relocate_section (bfd *output_bfd,
forms of all the _DS relocs bloats all reloc switches in
this file. It doesn't make much sense to use these
relocs in data, so testing the insn should be safe. */
if ((insn & (0x3f << 26)) == (56u << 26)
|| ((insn & (0x3f << 26)) == (61u << 26) && (insn & 3) == 1))
if ((insn & (0x3fu << 26)) == (56u << 26)
|| ((insn & (0x3fu << 26)) == (61u << 26) && (insn & 3) == 1))
mask = 15;
relocation += addend;
addend = insn & (mask ^ 3);
@ -16597,15 +16597,15 @@ ppc64_elf_relocate_section (bfd *output_bfd,
enum complain_overflow complain = complain_overflow_signed;
insn = bfd_get_32 (input_bfd, contents + (rel->r_offset & ~3));
if ((insn & (0x3f << 26)) == 10u << 26 /* cmpli */)
if ((insn & (0x3fu << 26)) == 10u << 26 /* cmpli */)
complain = complain_overflow_bitfield;
else if (howto->rightshift == 0
? ((insn & (0x3f << 26)) == 28u << 26 /* andi */
|| (insn & (0x3f << 26)) == 24u << 26 /* ori */
|| (insn & (0x3f << 26)) == 26u << 26 /* xori */)
: ((insn & (0x3f << 26)) == 29u << 26 /* andis */
|| (insn & (0x3f << 26)) == 25u << 26 /* oris */
|| (insn & (0x3f << 26)) == 27u << 26 /* xoris */))
? ((insn & (0x3fu << 26)) == 28u << 26 /* andi */
|| (insn & (0x3fu << 26)) == 24u << 26 /* ori */
|| (insn & (0x3fu << 26)) == 26u << 26 /* xori */)
: ((insn & (0x3fu << 26)) == 29u << 26 /* andis */
|| (insn & (0x3fu << 26)) == 25u << 26 /* oris */
|| (insn & (0x3fu << 26)) == 27u << 26 /* xoris */))
complain = complain_overflow_unsigned;
if (howto->complain_on_overflow != complain)
{

2
bfd/elfxx-mips.c
View File

@ -6602,7 +6602,7 @@ mips_elf_perform_relocation (struct bfd_link_info *info,
}
/* Make this the JALX opcode. */
x = (x & ~(0x3f << 26)) | (jalx_opcode << 26);
x = (x & ~(0x3fu << 26)) | (jalx_opcode << 26);
}
else if (cross_mode_jump_p && b_reloc_p (r_type))
{

2
bfd/netbsd.h
View File

@ -48,7 +48,7 @@
((execp)->a_info & 0xfb00ffff) | ((((int) (machtype)) & 0x3ff) << 16))
#define N_SET_FLAGS(execp, flags) \
((execp)->a_info = \
((execp)->a_info & 0x03ffffff) | ((flags & 0x03f) << 26))
((execp)->a_info & 0x03ffffff) | ((flags & 0x3fu) << 26))
#include "sysdep.h"
#include "bfd.h"