* gas/rx/macros.inc (creg): Remove cpen.
* gas/rx/mvfc.d: Remove expected uses of cpen register.
* gas/rx/mvtc.d: Likewise.
* gas/rx/popc.d: Likewise.
* gas/rx/pushc.d: Likewise.
This commit is contained in:
Nick Clifton
parent
7f82dfc7f0
commit
27b4051da3
@ -1,3 +1,11 @@
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2009-11-17 Nick Clifton <nickc@redhat.com>
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* gas/rx/macros.inc (creg): Remove cpen.
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* gas/rx/mvfc.d: Remove expected uses of cpen register.
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* gas/rx/mvtc.d: Likewise.
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* gas/rx/popc.d: Likewise.
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* gas/rx/pushc.d: Likewise.
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2009-11-16 Viktor Kutuzov <vkutuzov@accesssoftek.com>
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* gas/arm/vfp1xD.s: Add vmrs and vmsr instructions.
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@ -3,7 +3,7 @@ macro reg2 {r0;r14}
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macro reg7 {r0;r7}
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macro regPlo {r1;r7}
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macro regPhi {r8;r14}
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macro creg {psw;fpsw;usp;isp;intb;bpsw;bpc;fintv;cpen}
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macro creg {psw;fpsw;usp;isp;intb;bpsw;bpc;fintv}
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macro pswf {U;I;O;S;Z;C}
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macro simm8 {-128;127}
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@ -22,5 +22,4 @@ Disassembly of section \.text:
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27: fd 6a 9f mvfc bpc, r15
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2a: fd 6a b0 mvfc fintv, r0
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2d: fd 6a bf mvfc fintv, r15
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30: fd 6a 40 mvfc cpen, r0
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33: fd 6a 4f mvfc cpen, r15
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@ -14,85 +14,76 @@ Disassembly of section \.text:
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14: fd 77 08 80 mvtc #-128, bpsw
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18: fd 77 09 80 mvtc #-128, bpc
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1c: fd 77 0b 80 mvtc #-128, fintv
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20: fd 77 04 80 mvtc #-128, cpen
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24: fd 77 00 7f mvtc #127, psw
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28: fd 77 03 7f mvtc #127, fpsw
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2c: fd 77 02 7f mvtc #127, usp
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30: fd 77 0a 7f mvtc #127, isp
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34: fd 77 0c 7f mvtc #127, intb
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38: fd 77 08 7f mvtc #127, bpsw
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3c: fd 77 09 7f mvtc #127, bpc
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40: fd 77 0b 7f mvtc #127, fintv
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44: fd 77 04 7f mvtc #127, cpen
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48: fd 7b 00 00 80 mvtc #0xffff8000, psw
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4d: fd 7b 03 00 80 mvtc #0xffff8000, fpsw
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52: fd 7b 02 00 80 mvtc #0xffff8000, usp
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57: fd 7b 0a 00 80 mvtc #0xffff8000, isp
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5c: fd 7b 0c 00 80 mvtc #0xffff8000, intb
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61: fd 7b 08 00 80 mvtc #0xffff8000, bpsw
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66: fd 7b 09 00 80 mvtc #0xffff8000, bpc
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6b: fd 7b 0b 00 80 mvtc #0xffff8000, fintv
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70: fd 7b 04 00 80 mvtc #0xffff8000, cpen
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75: fd 7f 00 00 80 00 mvtc #0x8000, psw
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7b: fd 7f 03 00 80 00 mvtc #0x8000, fpsw
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81: fd 7f 02 00 80 00 mvtc #0x8000, usp
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87: fd 7f 0a 00 80 00 mvtc #0x8000, isp
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8d: fd 7f 0c 00 80 00 mvtc #0x8000, intb
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93: fd 7f 08 00 80 00 mvtc #0x8000, bpsw
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99: fd 7f 09 00 80 00 mvtc #0x8000, bpc
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9f: fd 7f 0b 00 80 00 mvtc #0x8000, fintv
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a5: fd 7f 04 00 80 00 mvtc #0x8000, cpen
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ab: fd 7f 00 00 00 80 mvtc #0xff800000, psw
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b1: fd 7f 03 00 00 80 mvtc #0xff800000, fpsw
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b7: fd 7f 02 00 00 80 mvtc #0xff800000, usp
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bd: fd 7f 0a 00 00 80 mvtc #0xff800000, isp
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c3: fd 7f 0c 00 00 80 mvtc #0xff800000, intb
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c9: fd 7f 08 00 00 80 mvtc #0xff800000, bpsw
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cf: fd 7f 09 00 00 80 mvtc #0xff800000, bpc
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d5: fd 7f 0b 00 00 80 mvtc #0xff800000, fintv
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db: fd 7f 04 00 00 80 mvtc #0xff800000, cpen
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e1: fd 7f 00 ff ff 7f mvtc #0x7fffff, psw
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e7: fd 7f 03 ff ff 7f mvtc #0x7fffff, fpsw
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ed: fd 7f 02 ff ff 7f mvtc #0x7fffff, usp
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f3: fd 7f 0a ff ff 7f mvtc #0x7fffff, isp
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f9: fd 7f 0c ff ff 7f mvtc #0x7fffff, intb
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ff: fd 7f 08 ff ff 7f mvtc #0x7fffff, bpsw
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105: fd 7f 09 ff ff 7f mvtc #0x7fffff, bpc
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10b: fd 7f 0b ff ff 7f mvtc #0x7fffff, fintv
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111: fd 7f 04 ff ff 7f mvtc #0x7fffff, cpen
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117: fd 73 00 00 00 00 80 mvtc #0x80000000, psw
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11e: fd 73 03 00 00 00 80 mvtc #0x80000000, fpsw
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125: fd 73 02 00 00 00 80 mvtc #0x80000000, usp
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12c: fd 73 0a 00 00 00 80 mvtc #0x80000000, isp
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133: fd 73 0c 00 00 00 80 mvtc #0x80000000, intb
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13a: fd 73 08 00 00 00 80 mvtc #0x80000000, bpsw
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141: fd 73 09 00 00 00 80 mvtc #0x80000000, bpc
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148: fd 73 0b 00 00 00 80 mvtc #0x80000000, fintv
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14f: fd 73 04 00 00 00 80 mvtc #0x80000000, cpen
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156: fd 73 00 ff ff ff 7f mvtc #0x7fffffff, psw
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15d: fd 73 03 ff ff ff 7f mvtc #0x7fffffff, fpsw
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164: fd 73 02 ff ff ff 7f mvtc #0x7fffffff, usp
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16b: fd 73 0a ff ff ff 7f mvtc #0x7fffffff, isp
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172: fd 73 0c ff ff ff 7f mvtc #0x7fffffff, intb
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179: fd 73 08 ff ff ff 7f mvtc #0x7fffffff, bpsw
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180: fd 73 09 ff ff ff 7f mvtc #0x7fffffff, bpc
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187: fd 73 0b ff ff ff 7f mvtc #0x7fffffff, fintv
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18e: fd 73 04 ff ff ff 7f mvtc #0x7fffffff, cpen
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195: fd 68 00 mvtc r0, psw
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198: fd 68 03 mvtc r0, fpsw
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19b: fd 68 02 mvtc r0, usp
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19e: fd 68 0a mvtc r0, isp
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1a1: fd 68 0c mvtc r0, intb
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1a4: fd 68 08 mvtc r0, bpsw
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1a7: fd 68 09 mvtc r0, bpc
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1aa: fd 68 0b mvtc r0, fintv
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1ad: fd 68 04 mvtc r0, cpen
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1b0: fd 68 f0 mvtc r15, psw
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1b3: fd 68 f3 mvtc r15, fpsw
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1b6: fd 68 f2 mvtc r15, usp
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1b9: fd 68 fa mvtc r15, isp
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1bc: fd 68 fc mvtc r15, intb
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1bf: fd 68 f8 mvtc r15, bpsw
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1c2: fd 68 f9 mvtc r15, bpc
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1c5: fd 68 fb mvtc r15, fintv
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1c8: fd 68 f4 mvtc r15, cpen
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20: fd 77 00 7f mvtc #127, psw
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24: fd 77 03 7f mvtc #127, fpsw
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28: fd 77 02 7f mvtc #127, usp
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2c: fd 77 0a 7f mvtc #127, isp
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30: fd 77 0c 7f mvtc #127, intb
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34: fd 77 08 7f mvtc #127, bpsw
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38: fd 77 09 7f mvtc #127, bpc
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3c: fd 77 0b 7f mvtc #127, fintv
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..: fd 7b 00 00 80 mvtc #0xffff8000, psw
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..: fd 7b 03 00 80 mvtc #0xffff8000, fpsw
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..: fd 7b 02 00 80 mvtc #0xffff8000, usp
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..: fd 7b 0a 00 80 mvtc #0xffff8000, isp
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..: fd 7b 0c 00 80 mvtc #0xffff8000, intb
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..: fd 7b 08 00 80 mvtc #0xffff8000, bpsw
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..: fd 7b 09 00 80 mvtc #0xffff8000, bpc
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..: fd 7b 0b 00 80 mvtc #0xffff8000, fintv
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..: fd 7f 00 00 80 00 mvtc #0x8000, psw
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..: fd 7f 03 00 80 00 mvtc #0x8000, fpsw
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..: fd 7f 02 00 80 00 mvtc #0x8000, usp
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..: fd 7f 0a 00 80 00 mvtc #0x8000, isp
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..: fd 7f 0c 00 80 00 mvtc #0x8000, intb
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..: fd 7f 08 00 80 00 mvtc #0x8000, bpsw
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..: fd 7f 09 00 80 00 mvtc #0x8000, bpc
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..: fd 7f 0b 00 80 00 mvtc #0x8000, fintv
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..: fd 7f 00 00 00 80 mvtc #0xff800000, psw
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..: fd 7f 03 00 00 80 mvtc #0xff800000, fpsw
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..: fd 7f 02 00 00 80 mvtc #0xff800000, usp
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..: fd 7f 0a 00 00 80 mvtc #0xff800000, isp
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..: fd 7f 0c 00 00 80 mvtc #0xff800000, intb
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..: fd 7f 08 00 00 80 mvtc #0xff800000, bpsw
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..: fd 7f 09 00 00 80 mvtc #0xff800000, bpc
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..: fd 7f 0b 00 00 80 mvtc #0xff800000, fintv
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..: fd 7f 00 ff ff 7f mvtc #0x7fffff, psw
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..: fd 7f 03 ff ff 7f mvtc #0x7fffff, fpsw
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..: fd 7f 02 ff ff 7f mvtc #0x7fffff, usp
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..: fd 7f 0a ff ff 7f mvtc #0x7fffff, isp
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..: fd 7f 0c ff ff 7f mvtc #0x7fffff, intb
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..: fd 7f 08 ff ff 7f mvtc #0x7fffff, bpsw
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...: fd 7f 09 ff ff 7f mvtc #0x7fffff, bpc
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...: fd 7f 0b ff ff 7f mvtc #0x7fffff, fintv
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...: fd 73 00 00 00 00 80 mvtc #0x80000000, psw
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...: fd 73 03 00 00 00 80 mvtc #0x80000000, fpsw
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...: fd 73 02 00 00 00 80 mvtc #0x80000000, usp
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...: fd 73 0a 00 00 00 80 mvtc #0x80000000, isp
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...: fd 73 0c 00 00 00 80 mvtc #0x80000000, intb
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...: fd 73 08 00 00 00 80 mvtc #0x80000000, bpsw
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...: fd 73 09 00 00 00 80 mvtc #0x80000000, bpc
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...: fd 73 0b 00 00 00 80 mvtc #0x80000000, fintv
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...: fd 73 00 ff ff ff 7f mvtc #0x7fffffff, psw
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...: fd 73 03 ff ff ff 7f mvtc #0x7fffffff, fpsw
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...: fd 73 02 ff ff ff 7f mvtc #0x7fffffff, usp
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...: fd 73 0a ff ff ff 7f mvtc #0x7fffffff, isp
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...: fd 73 0c ff ff ff 7f mvtc #0x7fffffff, intb
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...: fd 73 08 ff ff ff 7f mvtc #0x7fffffff, bpsw
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...: fd 73 09 ff ff ff 7f mvtc #0x7fffffff, bpc
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...: fd 73 0b ff ff ff 7f mvtc #0x7fffffff, fintv
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...: fd 68 00 mvtc r0, psw
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...: fd 68 03 mvtc r0, fpsw
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...: fd 68 02 mvtc r0, usp
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...: fd 68 0a mvtc r0, isp
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...: fd 68 0c mvtc r0, intb
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...: fd 68 08 mvtc r0, bpsw
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...: fd 68 09 mvtc r0, bpc
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...: fd 68 0b mvtc r0, fintv
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...: fd 68 f0 mvtc r15, psw
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...: fd 68 f3 mvtc r15, fpsw
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...: fd 68 f2 mvtc r15, usp
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...: fd 68 fa mvtc r15, isp
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...: fd 68 fc mvtc r15, intb
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...: fd 68 f8 mvtc r15, bpsw
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...: fd 68 f9 mvtc r15, bpc
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...: fd 68 fb mvtc r15, fintv
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@ -14,4 +14,4 @@ Disassembly of section \.text:
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a: 7e e8 popc bpsw
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c: 7e e9 popc bpc
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e: 7e eb popc fintv
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10: 7e e4 popc cpen
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@ -14,4 +14,4 @@ Disassembly of section \.text:
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a: 7e c8 pushc bpsw
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c: 7e c9 pushc bpc
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e: 7e cb pushc fintv
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10: 7e c4 pushc cpen
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