gas/testsuite/
2006-03-07 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2428 * gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and x86-64-rep-suffix. * gas/i386/naked.d: Replace repz with rep. * gas/i386/x86_64.d: Likewise. * gas/i386/rep-suffix.d: New file. * gas/i386/rep-suffix.s: Likewise. * gas/i386/rep.d: Likewise. * gas/i386/rep.s: Likewise. * gas/i386/x86-64-rep-suffix.d: Likewise. * gas/i386/x86-64-rep-suffix.s: Likewise. * gas/i386/x86-64-rep.d: Likewise. * gas/i386/x86-64-rep.s: Likewise. opcodes/ 2006-03-07 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2428 * i386-dis.c (REP_Fixup): New function. (AL): Remove duplicate. (Xbr): New. (Xvr): Likewise. (Ybr): Likewise. (Yvr): Likewise. (indirDXr): Likewise. (ALr): Likewise. (eAXr): Likewise. (dis386): Updated entries of ins, outs, movs, lods and stos.
This commit is contained in:
parent
4b1d9c5854
commit
35c52694b9
@ -1,3 +1,21 @@
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2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/2428
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* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
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x86-64-rep-suffix.
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* gas/i386/naked.d: Replace repz with rep.
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* gas/i386/x86_64.d: Likewise.
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* gas/i386/rep-suffix.d: New file.
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* gas/i386/rep-suffix.s: Likewise.
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* gas/i386/rep.d: Likewise.
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* gas/i386/rep.s: Likewise.
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* gas/i386/x86-64-rep-suffix.d: Likewise.
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* gas/i386/x86-64-rep-suffix.s: Likewise.
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* gas/i386/x86-64-rep.d: Likewise.
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* gas/i386/x86-64-rep.s: Likewise.
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2006-03-07 Richard Sandiford <richard@codesourcery.com>
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* gas/arm/abs12.s, gas/arm/abs12.d: New test.
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@ -69,6 +69,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_list_test "cr-err" ""
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run_dump_test "svme"
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run_dump_test "merom"
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run_dump_test "rep"
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run_dump_test "rep-suffix"
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# These tests require support for 8 and 16 bit relocs,
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# so we only run them for ELF and COFF targets.
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@ -138,6 +140,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-drx"
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run_dump_test "x86-64-drx-suffix"
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run_dump_test "x86-64-merom"
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run_dump_test "x86-64-rep"
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run_dump_test "x86-64-rep-suffix"
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if { ![istarget "*-*-aix*"]
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&& ![istarget "*-*-beos*"]
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@ -15,7 +15,7 @@ Disassembly of section .text:
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1b: 8c 2c ed 00 00 00 00 [ ]*movw %gs,0x0\(,%ebp,8\)
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22: 26 88 25 00 00 00 00 [ ]*mov %ah,%es:0x0
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29: 2e 8b 74 14 80 [ ]*mov %cs:0xffffff80\(%esp,%edx,1\),%esi
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2e: f3 65 a5 [ ]*repz movsl %gs:\(%esi\),%es:\(%edi\)
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2e: f3 65 a5 [ ]*rep movsl %gs:\(%esi\),%es:\(%edi\)
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31: ec [ ]*in \(%dx\),%al
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32: 66 ef [ ]*out %ax,\(%dx\)
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34: 67 d2 14 [ ]*addr16 rclb %cl,\(%si\)
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15
gas/testsuite/gas/i386/rep-suffix.d
Normal file
15
gas/testsuite/gas/i386/rep-suffix.d
Normal file
@ -0,0 +1,15 @@
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#objdump: -dwMsuffix
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#name: i386 rep prefix (with suffixes)
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.*: +file format .*
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Disassembly of section .text:
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0+000 <_start>:
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0: f3 ac[ ]+rep lodsb %ds:\(%esi\),%al
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2: f3 aa[ ]+rep stosb %al,%es:\(%edi\)
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4: f3 66 ad[ ]+rep lodsw %ds:\(%esi\),%ax
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7: f3 66 ab[ ]+rep stosw %ax,%es:\(%edi\)
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a: f3 ad[ ]+rep lodsl %ds:\(%esi\),%eax
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c: f3 ab[ ]+rep stosl %eax,%es:\(%edi\)
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#pass
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9
gas/testsuite/gas/i386/rep-suffix.s
Normal file
9
gas/testsuite/gas/i386/rep-suffix.s
Normal file
@ -0,0 +1,9 @@
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# Disassembling with -Msuffix.
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.text
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_start:
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rep lodsb
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rep stosb
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rep lodsw
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rep stosw
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rep lodsl
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rep stosl
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50
gas/testsuite/gas/i386/rep.d
Normal file
50
gas/testsuite/gas/i386/rep.d
Normal file
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#objdump: -dw
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#name: i386 rep prefix
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.*: +file format .*
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Disassembly of section .text:
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0+ <_start>:
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0: f3 6c[ ]+rep insb \(%dx\),%es:\(%edi\)
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2: f3 6e[ ]+rep outsb %ds:\(%esi\),\(%dx\)
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4: f3 a4[ ]+rep movsb %ds:\(%esi\),%es:\(%edi\)
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6: f3 ac[ ]+rep lods %ds:\(%esi\),%al
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8: f3 aa[ ]+rep stos %al,%es:\(%edi\)
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a: f3 a6[ ]+repz cmpsb %es:\(%edi\),%ds:\(%esi\)
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c: f3 ae[ ]+repz scas %es:\(%edi\),%al
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e: f3 66 6d[ ]+rep insw \(%dx\),%es:\(%edi\)
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11: f3 66 6f[ ]+rep outsw %ds:\(%esi\),\(%dx\)
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14: f3 66 a5[ ]+rep movsw %ds:\(%esi\),%es:\(%edi\)
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17: f3 66 ad[ ]+rep lods %ds:\(%esi\),%ax
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1a: f3 66 ab[ ]+rep stos %ax,%es:\(%edi\)
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1d: f3 66 a7[ ]+repz cmpsw %es:\(%edi\),%ds:\(%esi\)
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20: f3 66 af[ ]+repz scas %es:\(%edi\),%ax
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23: f3 6d[ ]+rep insl \(%dx\),%es:\(%edi\)
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25: f3 6f[ ]+rep outsl %ds:\(%esi\),\(%dx\)
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27: f3 a5[ ]+rep movsl %ds:\(%esi\),%es:\(%edi\)
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29: f3 ad[ ]+rep lods %ds:\(%esi\),%eax
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2b: f3 ab[ ]+rep stos %eax,%es:\(%edi\)
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2d: f3 a7[ ]+repz cmpsl %es:\(%edi\),%ds:\(%esi\)
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2f: f3 af[ ]+repz scas %es:\(%edi\),%eax
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31: f3 67 6c[ ]+rep addr16 insb \(%dx\),%es:\(%di\)
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34: f3 67 6e[ ]+rep addr16 outsb %ds:\(%si\),\(%dx\)
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37: f3 67 a4[ ]+rep addr16 movsb %ds:\(%si\),%es:\(%di\)
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3a: f3 67 ac[ ]+rep addr16 lods %ds:\(%si\),%al
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3d: f3 67 aa[ ]+rep addr16 stos %al,%es:\(%di\)
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40: f3 67 a6[ ]+repz addr16 cmpsb %es:\(%di\),%ds:\(%si\)
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43: f3 67 ae[ ]+repz addr16 scas %es:\(%di\),%al
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46: f3 67 66 6d[ ]+rep addr16 insw \(%dx\),%es:\(%di\)
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4a: f3 67 66 6f[ ]+rep addr16 outsw %ds:\(%si\),\(%dx\)
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4e: f3 67 66 a5[ ]+rep addr16 movsw %ds:\(%si\),%es:\(%di\)
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52: f3 67 66 ad[ ]+rep addr16 lods %ds:\(%si\),%ax
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56: f3 67 66 ab[ ]+rep addr16 stos %ax,%es:\(%di\)
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5a: f3 67 66 a7[ ]+repz addr16 cmpsw %es:\(%di\),%ds:\(%si\)
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5e: f3 67 66 af[ ]+repz addr16 scas %es:\(%di\),%ax
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62: f3 67 6d[ ]+rep addr16 insl \(%dx\),%es:\(%di\)
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65: f3 67 6f[ ]+rep addr16 outsl %ds:\(%si\),\(%dx\)
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68: f3 67 a5[ ]+rep addr16 movsl %ds:\(%si\),%es:\(%di\)
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6b: f3 67 ad[ ]+rep addr16 lods %ds:\(%si\),%eax
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6e: f3 67 ab[ ]+rep addr16 stos %eax,%es:\(%di\)
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71: f3 67 a7[ ]+repz addr16 cmpsl %es:\(%di\),%ds:\(%si\)
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74: f3 67 af[ ]+repz addr16 scas %es:\(%di\),%eax
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50
gas/testsuite/gas/i386/rep.s
Normal file
50
gas/testsuite/gas/i386/rep.s
Normal file
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.text
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_start:
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rep insb
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rep outsb
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rep movsb
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rep lodsb
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rep stosb
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repz cmpsb
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repz scasb
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rep insw
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rep outsw
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rep movsw
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rep lodsw
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rep stosw
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repz cmpsw
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repz scasw
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rep insl
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rep outsl
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rep movsl
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rep lodsl
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rep stosl
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repz cmpsl
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repz scasl
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addr16 rep insb
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addr16 rep outsb
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addr16 rep movsb
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addr16 rep lodsb
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addr16 rep stosb
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addr16 repz cmpsb
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addr16 repz scasb
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addr16 rep insw
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addr16 rep outsw
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addr16 rep movsw
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addr16 rep lodsw
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addr16 rep stosw
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addr16 repz cmpsw
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addr16 repz scasw
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addr16 rep insl
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addr16 rep outsl
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addr16 rep movsl
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addr16 rep lodsl
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addr16 rep stosl
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addr16 repz cmpsl
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addr16 repz scasl
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17
gas/testsuite/gas/i386/x86-64-rep-suffix.d
Normal file
17
gas/testsuite/gas/i386/x86-64-rep-suffix.d
Normal file
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#objdump: -dwMsuffix
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#name: x86-64 rep prefix (with suffixes)
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.*: +file format .*
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Disassembly of section .text:
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0+000 <_start>:
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0: f3 ac[ ]+rep lodsb %ds:\(%rsi\),%al
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2: f3 aa[ ]+rep stosb %al,%es:\(%rdi\)
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4: f3 66 ad[ ]+rep lodsw %ds:\(%rsi\),%ax
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7: f3 66 ab[ ]+rep stosw %ax,%es:\(%rdi\)
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a: f3 ad[ ]+rep lodsl %ds:\(%rsi\),%eax
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c: f3 ab[ ]+rep stosl %eax,%es:\(%rdi\)
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e: f3 48 ad[ ]+rep lodsq %ds:\(%rsi\),%rax
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11: f3 48 ab[ ]+rep stosq %rax,%es:\(%rdi\)
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#pass
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11
gas/testsuite/gas/i386/x86-64-rep-suffix.s
Normal file
11
gas/testsuite/gas/i386/x86-64-rep-suffix.s
Normal file
@ -0,0 +1,11 @@
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# Disassembling with -Msuffix.
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.text
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_start:
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rep lodsb
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rep stosb
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rep lodsw
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rep stosw
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rep lodsl
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rep stosl
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rep lodsq
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rep stosq
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61
gas/testsuite/gas/i386/x86-64-rep.d
Normal file
61
gas/testsuite/gas/i386/x86-64-rep.d
Normal file
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#objdump: -dw
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#name: x86-64 rep prefix
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.*: +file format .*
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Disassembly of section .text:
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0+ <_start>:
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0: f3 6c[ ]+rep insb \(%dx\),%es:\(%rdi\)
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2: f3 6e[ ]+rep outsb %ds:\(%rsi\),\(%dx\)
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4: f3 a4[ ]+rep movsb %ds:\(%rsi\),%es:\(%rdi\)
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6: f3 ac[ ]+rep lods %ds:\(%rsi\),%al
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8: f3 aa[ ]+rep stos %al,%es:\(%rdi\)
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a: f3 a6[ ]+repz cmpsb %es:\(%rdi\),%ds:\(%rsi\)
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c: f3 ae[ ]+repz scas %es:\(%rdi\),%al
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e: f3 66 6d[ ]+rep insw \(%dx\),%es:\(%rdi\)
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11: f3 66 6f[ ]+rep outsw %ds:\(%rsi\),\(%dx\)
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14: f3 66 a5[ ]+rep movsw %ds:\(%rsi\),%es:\(%rdi\)
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17: f3 66 ad[ ]+rep lods %ds:\(%rsi\),%ax
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1a: f3 66 ab[ ]+rep stos %ax,%es:\(%rdi\)
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1d: f3 66 a7[ ]+repz cmpsw %es:\(%rdi\),%ds:\(%rsi\)
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20: f3 66 af[ ]+repz scas %es:\(%rdi\),%ax
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23: f3 6d[ ]+rep insl \(%dx\),%es:\(%rdi\)
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25: f3 6f[ ]+rep outsl %ds:\(%rsi\),\(%dx\)
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27: f3 a5[ ]+rep movsl %ds:\(%rsi\),%es:\(%rdi\)
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29: f3 ad[ ]+rep lods %ds:\(%rsi\),%eax
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2b: f3 ab[ ]+rep stos %eax,%es:\(%rdi\)
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2d: f3 a7[ ]+repz cmpsl %es:\(%rdi\),%ds:\(%rsi\)
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2f: f3 af[ ]+repz scas %es:\(%rdi\),%eax
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31: f3 48 a5[ ]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
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34: f3 48 ad[ ]+rep lods %ds:\(%rsi\),%rax
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37: f3 48 ab[ ]+rep stos %rax,%es:\(%rdi\)
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3a: f3 48 a7[ ]+repz cmpsq %es:\(%rdi\),%ds:\(%rsi\)
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3d: f3 48 af[ ]+repz scas %es:\(%rdi\),%rax
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40: f3 67 6c[ ]+rep addr32 insb \(%dx\),%es:\(%edi\)
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43: f3 67 6e[ ]+rep addr32 outsb %ds:\(%esi\),\(%dx\)
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46: f3 67 a4[ ]+rep addr32 movsb %ds:\(%esi\),%es:\(%edi\)
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49: f3 67 ac[ ]+rep addr32 lods %ds:\(%esi\),%al
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4c: f3 67 aa[ ]+rep addr32 stos %al,%es:\(%edi\)
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4f: f3 67 a6[ ]+repz addr32 cmpsb %es:\(%edi\),%ds:\(%esi\)
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52: f3 67 ae[ ]+repz addr32 scas %es:\(%edi\),%al
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55: f3 67 66 6d[ ]+rep addr32 insw \(%dx\),%es:\(%edi\)
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59: f3 67 66 6f[ ]+rep addr32 outsw %ds:\(%esi\),\(%dx\)
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5d: f3 67 66 a5[ ]+rep addr32 movsw %ds:\(%esi\),%es:\(%edi\)
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61: f3 67 66 ad[ ]+rep addr32 lods %ds:\(%esi\),%ax
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65: f3 67 66 ab[ ]+rep addr32 stos %ax,%es:\(%edi\)
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69: f3 67 66 a7[ ]+repz addr32 cmpsw %es:\(%edi\),%ds:\(%esi\)
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6d: f3 67 66 af[ ]+repz addr32 scas %es:\(%edi\),%ax
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71: f3 67 6d[ ]+rep addr32 insl \(%dx\),%es:\(%edi\)
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74: f3 67 6f[ ]+rep addr32 outsl %ds:\(%esi\),\(%dx\)
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77: f3 67 a5[ ]+rep addr32 movsl %ds:\(%esi\),%es:\(%edi\)
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7a: f3 67 ad[ ]+rep addr32 lods %ds:\(%esi\),%eax
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7d: f3 67 ab[ ]+rep addr32 stos %eax,%es:\(%edi\)
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80: f3 67 a7[ ]+repz addr32 cmpsl %es:\(%edi\),%ds:\(%esi\)
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83: f3 67 af[ ]+repz addr32 scas %es:\(%edi\),%eax
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86: f3 67 48 a5[ ]+rep addr32 movsq %ds:\(%esi\),%es:\(%edi\)
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8a: f3 67 48 ad[ ]+rep addr32 lods %ds:\(%esi\),%rax
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8e: f3 67 48 ab[ ]+rep addr32 stos %rax,%es:\(%edi\)
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92: f3 67 48 a7[ ]+repz addr32 cmpsq %es:\(%edi\),%ds:\(%esi\)
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96: f3 67 48 af[ ]+repz addr32 scas %es:\(%edi\),%rax
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#pass
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62
gas/testsuite/gas/i386/x86-64-rep.s
Normal file
62
gas/testsuite/gas/i386/x86-64-rep.s
Normal file
@ -0,0 +1,62 @@
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.text
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_start:
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rep insb
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rep outsb
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rep movsb
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rep lodsb
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rep stosb
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repz cmpsb
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repz scasb
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rep insw
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rep outsw
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rep movsw
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rep lodsw
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rep stosw
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repz cmpsw
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repz scasw
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rep insl
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rep outsl
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rep movsl
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rep lodsl
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rep stosl
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repz cmpsl
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repz scasl
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rep movsq
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rep lodsq
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rep stosq
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repz cmpsq
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repz scasq
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addr32 rep insb
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addr32 rep outsb
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addr32 rep movsb
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addr32 rep lodsb
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addr32 rep stosb
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addr32 repz cmpsb
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addr32 repz scasb
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addr32 rep insw
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addr32 rep outsw
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addr32 rep movsw
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addr32 rep lodsw
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addr32 rep stosw
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addr32 repz cmpsw
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addr32 repz scasw
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addr32 rep insl
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addr32 rep outsl
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addr32 rep movsl
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addr32 rep lodsl
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addr32 rep stosl
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addr32 repz cmpsl
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addr32 repz scasl
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addr32 rep movsq
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addr32 rep lodsq
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addr32 rep stosq
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addr32 repz cmpsq
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addr32 repz scasq
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@ -37,9 +37,9 @@ Disassembly of section .text:
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[ ]+56: 41 0f 20 c0[ ]+mov[ ]+%cr0,%r8
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[ ]+5a: 44 0f 20 c0[ ]+mov[ ]+%cr8,%rax
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[ ]+5e: 44 0f 22 c0[ ]+mov[ ]+%rax,%cr8
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[ ]+62: f3 48 a5[ ]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
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[ ]+65: f3 66 a5[ ]+repz movsw %ds:\(%rsi\),%es:\(%rdi\)
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[ ]+68: f3 48 a5[ ]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
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[ ]+62: f3 48 a5[ ]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
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[ ]+65: f3 66 a5[ ]+rep movsw %ds:\(%rsi\),%es:\(%rdi\)
|
||||
[ ]+68: f3 48 a5[ ]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
|
||||
[ ]+6b: b0 11[ ]+mov[ ]+\$0x11,%al
|
||||
[ ]+6d: b4 11[ ]+mov[ ]+\$0x11,%ah
|
||||
[ ]+6f: 40 b4 11[ ]+mov[ ]+\$0x11,%spl
|
||||
|
@ -1,3 +1,17 @@
|
||||
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
PR binutils/2428
|
||||
* i386-dis.c (REP_Fixup): New function.
|
||||
(AL): Remove duplicate.
|
||||
(Xbr): New.
|
||||
(Xvr): Likewise.
|
||||
(Ybr): Likewise.
|
||||
(Yvr): Likewise.
|
||||
(indirDXr): Likewise.
|
||||
(ALr): Likewise.
|
||||
(eAXr): Likewise.
|
||||
(dis386): Updated entries of ins, outs, movs, lods and stos.
|
||||
|
||||
2006-03-05 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* cgen-ibld.in (insert_normal): Cope with attempts to insert a
|
||||
|
@ -101,6 +101,7 @@ static void INVLPG_Fixup (int, int);
|
||||
static void BadOp (void);
|
||||
static void SEG_Fixup (int, int);
|
||||
static void VMX_Fixup (int, int);
|
||||
static void REP_Fixup (int, int);
|
||||
|
||||
struct dis_private {
|
||||
/* Points to first byte not fetched. */
|
||||
@ -276,7 +277,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
|
||||
#define eSI OP_IMREG, eSI_reg
|
||||
#define eDI OP_IMREG, eDI_reg
|
||||
#define AL OP_IMREG, al_reg
|
||||
#define AL OP_IMREG, al_reg
|
||||
#define CL OP_IMREG, cl_reg
|
||||
#define DL OP_IMREG, dl_reg
|
||||
#define BL OP_IMREG, bl_reg
|
||||
@ -315,6 +315,15 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
|
||||
#define OPSUF OP_3DNowSuffix, 0
|
||||
#define OPSIMD OP_SIMD_Suffix, 0
|
||||
|
||||
/* Used handle "rep" prefix for string instructions. */
|
||||
#define Xbr REP_Fixup, eSI_reg
|
||||
#define Xvr REP_Fixup, eSI_reg
|
||||
#define Ybr REP_Fixup, eDI_reg
|
||||
#define Yvr REP_Fixup, eDI_reg
|
||||
#define indirDXr REP_Fixup, indir_dx_reg
|
||||
#define ALr REP_Fixup, al_reg
|
||||
#define eAXr REP_Fixup, eAX_reg
|
||||
|
||||
#define cond_jump_flag NULL, cond_jump_mode
|
||||
#define loop_jcxz_flag NULL, loop_jcxz_mode
|
||||
|
||||
@ -629,10 +638,10 @@ static const struct dis386 dis386[] = {
|
||||
{ "imulS", Gv, Ev, Iv },
|
||||
{ "pushT", sIb, XX, XX },
|
||||
{ "imulS", Gv, Ev, sIb },
|
||||
{ "ins{b||b|}", Yb, indirDX, XX },
|
||||
{ "ins{R||R|}", Yv, indirDX, XX },
|
||||
{ "outs{b||b|}", indirDX, Xb, XX },
|
||||
{ "outs{R||R|}", indirDX, Xv, XX },
|
||||
{ "ins{b||b|}", Ybr, indirDX, XX },
|
||||
{ "ins{R||R|}", Yvr, indirDX, XX },
|
||||
{ "outs{b||b|}", indirDXr, Xb, XX },
|
||||
{ "outs{R||R|}", indirDXr, Xv, XX },
|
||||
/* 70 */
|
||||
{ "joH", Jb, XX, cond_jump_flag },
|
||||
{ "jnoH", Jb, XX, cond_jump_flag },
|
||||
@ -692,17 +701,17 @@ static const struct dis386 dis386[] = {
|
||||
{ "movS", eAX, Ov, XX },
|
||||
{ "movB", Ob, AL, XX },
|
||||
{ "movS", Ov, eAX, XX },
|
||||
{ "movs{b||b|}", Yb, Xb, XX },
|
||||
{ "movs{R||R|}", Yv, Xv, XX },
|
||||
{ "movs{b||b|}", Ybr, Xb, XX },
|
||||
{ "movs{R||R|}", Yvr, Xv, XX },
|
||||
{ "cmps{b||b|}", Xb, Yb, XX },
|
||||
{ "cmps{R||R|}", Xv, Yv, XX },
|
||||
/* a8 */
|
||||
{ "testB", AL, Ib, XX },
|
||||
{ "testS", eAX, Iv, XX },
|
||||
{ "stosB", Yb, AL, XX },
|
||||
{ "stosS", Yv, eAX, XX },
|
||||
{ "lodsB", AL, Xb, XX },
|
||||
{ "lodsS", eAX, Xv, XX },
|
||||
{ "stosB", Ybr, AL, XX },
|
||||
{ "stosS", Yvr, eAX, XX },
|
||||
{ "lodsB", ALr, Xb, XX },
|
||||
{ "lodsS", eAXr, Xv, XX },
|
||||
{ "scasB", AL, Yb, XX },
|
||||
{ "scasS", eAX, Yv, XX },
|
||||
/* b0 */
|
||||
@ -4777,3 +4786,76 @@ OP_VMX (int bytemode, int sizeflag)
|
||||
strcpy (obuf, "vmptrld");
|
||||
OP_E (bytemode, sizeflag);
|
||||
}
|
||||
|
||||
static void
|
||||
REP_Fixup (int bytemode, int sizeflag)
|
||||
{
|
||||
/* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
|
||||
lods and stos. */
|
||||
size_t ilen = 0;
|
||||
|
||||
if (prefixes & PREFIX_REPZ)
|
||||
switch (*insn_codep)
|
||||
{
|
||||
case 0x6e: /* outsb */
|
||||
case 0x6f: /* outsw/outsl */
|
||||
case 0xa4: /* movsb */
|
||||
case 0xa5: /* movsw/movsl/movsq */
|
||||
if (!intel_syntax)
|
||||
ilen = 5;
|
||||
else
|
||||
ilen = 4;
|
||||
break;
|
||||
case 0xaa: /* stosb */
|
||||
case 0xab: /* stosw/stosl/stosq */
|
||||
case 0xac: /* lodsb */
|
||||
case 0xad: /* lodsw/lodsl/lodsq */
|
||||
if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
|
||||
ilen = 5;
|
||||
else
|
||||
ilen = 4;
|
||||
break;
|
||||
case 0x6c: /* insb */
|
||||
case 0x6d: /* insl/insw */
|
||||
if (!intel_syntax)
|
||||
ilen = 4;
|
||||
else
|
||||
ilen = 3;
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
break;
|
||||
}
|
||||
|
||||
if (ilen != 0)
|
||||
{
|
||||
size_t olen;
|
||||
char *p;
|
||||
|
||||
olen = strlen (obuf);
|
||||
p = obuf + olen - ilen - 1 - 4;
|
||||
/* Handle "repz [addr16|addr32]". */
|
||||
if ((prefixes & PREFIX_ADDR))
|
||||
p -= 1 + 6;
|
||||
|
||||
memmove (p + 3, p + 4, olen - (p + 3 - obuf));
|
||||
}
|
||||
|
||||
switch (bytemode)
|
||||
{
|
||||
case al_reg:
|
||||
case eAX_reg:
|
||||
case indir_dx_reg:
|
||||
OP_IMREG (bytemode, sizeflag);
|
||||
break;
|
||||
case eDI_reg:
|
||||
OP_ESreg (bytemode, sizeflag);
|
||||
break;
|
||||
case eSI_reg:
|
||||
OP_DSreg (bytemode, sizeflag);
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user