RISC-V: Add .insn CA support.

gas/
	* config/tc-riscv.c (validate_riscv_insn) <'F'>: Add support for CF6
	and CF2 operands.
	(riscv_ip) <'F'>: Likewise.
	* doc/c-riscv.texi (RISC-V-Formats): Add func6 abbreviation.  Use rs2
	instead of rs1 in CR description.  Add CA docs.
	* gas/testsuite/riscv/insn.s: Add use of .insn ca.
	* gas/testsuite/riscv/insn.d: Update to match.
	include/
	* opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
	(OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
	opcodes/
	* riscv-opc.c (ciw): Fix whitespace to align columns.
	(ca): New.

include/opcode/riscv.h

@@ -247,10 +247,14 @@ static const char * const riscv_pred_succ[16] =
 #define OP_MASK_CRS2S 0x7
 #define OP_SH_CRS2S 2
 
+#define OP_MASK_CFUNCT6                0x3f
+#define OP_SH_CFUNCT6          10
 #define OP_MASK_CFUNCT4                0xf
 #define OP_SH_CFUNCT4          12
 #define OP_MASK_CFUNCT3                0x7
 #define OP_SH_CFUNCT3          13
+#define OP_MASK_CFUNCT2                0x3
+#define OP_SH_CFUNCT2          5
 
 /* ABI names for selected x-registers.  */