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tic4x: sign extension using shifts

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Don't do that.  Especially don't use shift counts that assume the type
being shifted is 32 bits when the type is long/unsigned long.  Also
reverts part of a change I made on 2019-12-11 to tic4x_print_register
that on closer inspection turns out to be unnecessary.

include/
	* opcode/tic4x.h (EXTR): Delete.
	(EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
	extension using shifts.  Do trim INSERTU value to specified bitfield.
opcodes/
	* tic4x-dis.c (tic4x_print_register): Remove dead code.
gas/
	* config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
	insertion.
This commit is contained in:
Alan Modra 2020-01-12 20:16:22 +10:30
parent 202e762b32
commit 5496abe1c5
6 changed files with 24 additions and 8 deletions
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5
gas/ChangeLog
View File

@ -1,3 +1,8 @@
2020-01-13 Alan Modra <amodra@gmail.com>
* config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
insertion.
2020-01-10 Alan Modra <amodra@gmail.com>
* testsuite/gas/elf/pr14891.s: Don't start directives in first column.

2
gas/config/tc-tic4x.c
View File

@ -2193,7 +2193,7 @@ tic4x_operands_match (tic4x_inst_t *inst, tic4x_insn_t *tinsn, int check)
}
else if (exp->X_add_number < 32 && IS_CPU_TIC3X (tic4x_cpu))
{
INSERTU (opcode, exp->X_add_number | 0x20, 4, 0);
INSERTU (opcode, exp->X_add_number | 0x20, 5, 0);
continue;
}
else

6
include/ChangeLog
View File

@ -1,3 +1,9 @@
2020-01-13 Alan Modra <amodra@gmail.com>
* opcode/tic4x.h (EXTR): Delete.
(EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
extension using shifts. Do trim INSERTU value to specified bitfield.
2020-01-10 Alan Modra <amodra@gmail.com>
* opcode/spu.h: Formatting.

12
include/opcode/tic4x.h
View File

@ -23,11 +23,13 @@
#define IS_CPU_TIC4X(v) ((v) == 0 || (v) == 40 || (v) == 44)
/* Define some bitfield extraction/insertion macros. */
#define EXTR(inst, m, l) ((inst) << (31 - (m)) >> (31 - ((m) - (l))))
#define EXTRU(inst, m, l) EXTR ((unsigned long)(inst), (m), (l))
#define EXTRS(inst, m, l) EXTR ((long)(inst), (m), (l))
#define INSERTU(inst, val, m, l) (inst |= ((val) << (l)))
#define INSERTS(inst, val, m, l) INSERTU (inst, ((val) & ((1 << ((m) - (l) + 1)) - 1)), m, l)
#define EXTRU(inst, m, l) \
(((inst) >> (l)) & ((2u << ((m) - (l))) - 1))
#define EXTRS(inst, m, l) \
((int) ((EXTRU (inst, m, l) ^ (1u << ((m) - (l)))) - (1u << ((m) - (l)))))
#define INSERTU(inst, val, m, l) \
((inst) |= ((val) & ((2u << ((m) - (l))) - 1)) << (l))
#define INSERTS INSERTU
/* Define register numbers. */
typedef enum

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2020-01-13 Alan Modra <amodra@gmail.com>
* tic4x-dis.c (tic4x_print_register): Remove dead code.
2020-01-13 Alan Modra <amodra@gmail.com>
* fr30-ibld.c: Regenerate.

3
opcodes/tic4x-dis.c
View File

@ -148,8 +148,7 @@ tic4x_print_register (struct disassemble_info *info, unsigned long regno)
= (tic4x_register_t *)(tic4x_registers + i);
}
}
if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX)
|| registertable[regno] == NULL)
if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX))
return 0;
if (info != NULL)
(*info->fprintf_func) (info->stream, "%s", registertable[regno]->name);