Use address mapping levels for 68hc11 simulator (kill overlap hack)

This commit is contained in:
Stephane Carrez 2000-08-11 18:44:59 +00:00
parent 351aa9f657
commit 63348d048f
9 changed files with 67 additions and 39 deletions

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@ -1,3 +1,26 @@
2000-08-11 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* sim-main.h (m68hc11_map_level): Define level of address mappings.
* dv-m68hc11eepr.c (struct m68hc11eepr ): New flag to indicate
whether the eeprom is currently mapped or not.
(m68hc11eepr_port_event): Use the flag to see if we must unmap
or map the eeprom. Update the flag to reflect the current state.
Use M6811_EEPROM_LEVEL when mapping the eeprom.
(m68hc11eepr_finish): Remove overlap hack.
(attach_m68hc11eepr_regs): Use M6811_IO_LEVEL when mapping the
config and control registers.
* dv-m68hc11.c (m68hc11cpu_finish): Remove overlap hack.
(attach_m68hc11_regs): Use M6811_IO_LEVEL.
(m68hc11cpu_io_write): Likewise when unmapping and re-mapping.
* dv-m68hc11spi.c (m68hc11spi_finish): Likewise.
(attach_m68hc11spi_regs): Likewise.
* dv-m68hc11tim.c (m68hc11tim_finish): Likewise.
(attach_m68hc11tim_regs): Likewise.
* dv-m68hc11sio.c (m68hc11sio_finish): Likewise.
(attach_m68hc11sio_regs): Likewise.
* interp.c (sim_open): Likewise.
* dv-nvram.c (attach_nvram_regs): Likewise.
Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
* configure, config.in: Regenerate.

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@ -198,7 +198,7 @@ attach_m68hc11_regs (struct hw *me,
&reg.size,
&controller->attach_size, me);
hw_attach_address (hw_parent (me), 0,
hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
controller->attach_space,
controller->attach_address,
controller->attach_size,
@ -237,7 +237,6 @@ m68hc11cpu_finish (struct hw *me)
struct m68hc11cpu *controller;
controller = HW_ZALLOC (me, struct m68hc11cpu);
me->overlap_mode_hw = 1;
set_hw_data (me, controller);
set_hw_io_read_buffer (me, m68hc11cpu_io_read_buffer);
set_hw_io_write_buffer (me, m68hc11cpu_io_write_buffer);
@ -490,13 +489,13 @@ m68hc11cpu_io_write (struct hw *me, sim_cpu *cpu,
{
struct m68hc11cpu *controller = hw_data (me);
hw_detach_address (hw_parent (me), 0,
hw_detach_address (hw_parent (me), M6811_IO_LEVEL,
controller->attach_space,
controller->attach_address,
controller->attach_size,
me);
controller->attach_address = (val & 0x0F0) << 12;
hw_attach_address (hw_parent (me), 0,
hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
controller->attach_space,
controller->attach_address,
controller->attach_size,

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@ -88,7 +88,8 @@ struct m68hc11eepr
address_word base_address; /* control register base */
int attach_space;
unsigned size;
int mapped;
/* Current state of the eeprom programing:
- eeprom_wmode indicates whether the EEPROM address and byte have
been latched.
@ -205,8 +206,10 @@ attach_m68hc11eepr_regs (struct hw *me,
/* Attach the two IO registers that control the EEPROM.
The EEPROM is only attached at reset time because it may
be enabled/disabled by the EEON bit in the CONFIG register. */
hw_attach_address (hw_parent (me), 0, io_map, M6811_PPROG, 1, me);
hw_attach_address (hw_parent (me), 0, io_map, M6811_CONFIG, 1, me);
hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
io_map, M6811_PPROG, 1, me);
hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
io_map, M6811_CONFIG, 1, me);
if (hw_find_property (me, "file") == NULL)
controller->file_name = "m6811.eeprom";
@ -218,7 +221,8 @@ attach_m68hc11eepr_regs (struct hw *me,
controller->eeprom = (char*) malloc (attach_size + 1);
controller->eeprom_min_cycles = 10000;
controller->size = attach_size + 1;
controller->mapped = 0;
m6811eepr_memory_rw (controller, O_RDONLY);
}
@ -267,19 +271,23 @@ m68hc11eepr_port_event (struct hw *me,
see Motorola spec). */
if (cpu->ios[M6811_CONFIG] & M6811_EEON)
{
hw_attach_address (hw_parent (me), 0,
controller->attach_space,
controller->base_address,
controller->size - 1,
me);
if (controller->mapped)
hw_attach_address (hw_parent (me), M6811_EEPROM_LEVEL,
controller->attach_space,
controller->base_address,
controller->size - 1,
me);
controller->mapped = 0;
}
else
{
hw_detach_address (hw_parent (me), 0,
controller->attach_space,
controller->base_address,
controller->size - 1,
me);
if (!controller->mapped)
hw_detach_address (hw_parent (me), M6811_EEPROM_LEVEL,
controller->attach_space,
controller->base_address,
controller->size - 1,
me);
controller->mapped = 1;
}
break;
}
@ -297,7 +305,6 @@ m68hc11eepr_finish (struct hw *me)
struct m68hc11eepr *controller;
controller = HW_ZALLOC (me, struct m68hc11eepr);
me->overlap_mode_hw = 1;
set_hw_data (me, controller);
set_hw_io_read_buffer (me, m68hc11eepr_io_read_buffer);
set_hw_io_write_buffer (me, m68hc11eepr_io_write_buffer);

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@ -118,7 +118,7 @@ static void
attach_m68hc11sio_regs (struct hw *me,
struct m68hc11sio *controller)
{
hw_attach_address (hw_parent (me), 0, io_map,
hw_attach_address (hw_parent (me), M6811_IO_LEVEL, io_map,
M6811_SCI_FIRST_REG,
M6811_SCI_LAST_REG - M6811_SCI_FIRST_REG + 1,
me);
@ -143,7 +143,6 @@ m68hc11sio_finish (struct hw *me)
struct m68hc11sio *controller;
controller = HW_ZALLOC (me, struct m68hc11sio);
me->overlap_mode_hw = 1;
set_hw_data (me, controller);
set_hw_io_read_buffer (me, m68hc11sio_io_read_buffer);
set_hw_io_write_buffer (me, m68hc11sio_io_write_buffer);

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@ -113,7 +113,7 @@ static void
attach_m68hc11spi_regs (struct hw *me,
struct m68hc11spi *controller)
{
hw_attach_address (hw_parent (me), 0, io_map,
hw_attach_address (hw_parent (me), M6811_IO_LEVEL, io_map,
M6811_SPI_FIRST_REG,
M6811_SPI_LAST_REG - M6811_SPI_FIRST_REG + 1,
me);
@ -125,7 +125,6 @@ m68hc11spi_finish (struct hw *me)
struct m68hc11spi *controller;
controller = HW_ZALLOC (me, struct m68hc11spi);
me->overlap_mode_hw = 1;
set_hw_data (me, controller);
set_hw_io_read_buffer (me, m68hc11spi_io_read_buffer);
set_hw_io_write_buffer (me, m68hc11spi_io_write_buffer);

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@ -103,7 +103,7 @@ static void
attach_m68hc11tim_regs (struct hw *me,
struct m68hc11tim *controller)
{
hw_attach_address (hw_parent (me), 0, io_map,
hw_attach_address (hw_parent (me), M6811_IO_LEVEL, io_map,
M6811_TIMER_FIRST_REG,
M6811_TIMER_LAST_REG - M6811_TIMER_FIRST_REG + 1,
me);
@ -116,7 +116,6 @@ m68hc11tim_finish (struct hw *me)
struct m68hc11tim *controller;
controller = HW_ZALLOC (me, struct m68hc11tim);
me->overlap_mode_hw = 1;
set_hw_data (me, controller);
set_hw_io_read_buffer (me, m68hc11tim_io_read_buffer);
set_hw_io_write_buffer (me, m68hc11tim_io_write_buffer);

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@ -44,11 +44,6 @@
PROPERTIES
overlap? <bool>
Boolean property which indicates whether the device can overlap
another device. By default, overlapping is not allowed.
reg <base> <length>
Base and size of the non-volatile ram bank.
@ -135,11 +130,6 @@ attach_nvram_regs (struct hw *me, struct nvram *controller)
reg_property_spec reg;
int result, oerrno;
/* Get the flag that controls overlapping of ram bank to another device. */
if (hw_find_property (me, "overlap?") != NULL
&& hw_find_boolean_property (me, "overlap?"))
me->overlap_mode_hw = 1;
/* Get ram bank description (base and size). */
if (hw_find_property (me, "reg") == NULL)
hw_abort (me, "Missing \"reg\" property");

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@ -163,10 +163,11 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback,
/* Allocate core managed memory */
/* the monitor */
sim_do_commandf (sd, "memory region 0x%lx,0x%lx",
sim_do_commandf (sd, "memory region 0x%lx@%d,0x%lx",
/* MONITOR_BASE, MONITOR_SIZE */
0x8000, 0x8000);
sim_do_command (sd, " memory region 0x000,0x8000");
0x8000, M6811_RAM_LEVEL, 0x8000);
sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
M6811_RAM_LEVEL);
sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F");
}
@ -195,7 +196,6 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback,
sim_hw_parse (sd, "/m68hc11/nvram/reg 0x0 256");
sim_hw_parse (sd, "/m68hc11/nvram/file m68hc11.ram");
sim_hw_parse (sd, "/m68hc11/nvram/mode save-modified");
sim_hw_parse (sd, "/m68hc11/nvram/overlap? true");
/*sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/pram"); */
}
if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11eepr/reg") == 0)

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@ -54,6 +54,18 @@ struct _sim_cpu;
#include "interrupts.h"
#include <setjmp.h>
/* Specifies the level of mapping for the IO, EEprom, nvram and external
RAM. IO registers are mapped over everything and the external RAM
is last (ie, it can be hidden by everything above it in the list). */
enum m68hc11_map_level
{
M6811_IO_LEVEL,
M6811_EEPROM_LEVEL,
M6811_NVRAM_LEVEL,
M6811_RAM_LEVEL
};
#define X_REGNUM 0
#define D_REGNUM 1
#define Y_REGNUM 2