ubsan: tic4x: segv and signed shifts
* tic4x-dis.c (tic4x_print_register): Formatting. Don't segfault on NULL registertable entry. (tic4x_hash_opcode): Use unsigned arithmetic.
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@ -1,3 +1,9 @@
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2019-12-11 Alan Modra <amodra@gmail.com>
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* tic4x-dis.c (tic4x_print_register): Formatting. Don't segfault
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on NULL registertable entry.
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(tic4x_hash_opcode): Use unsigned arithmetic.
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2019-12-11 Alan Modra <amodra@gmail.com>
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* s12z-opc.c (z_decode_signed_value): Avoid signed overflow.
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@ -137,17 +137,19 @@ tic4x_print_register (struct disassemble_info *info, unsigned long regno)
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{
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registertable = xmalloc (sizeof (tic4x_register_t *) * REG_TABLE_SIZE);
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for (i = 0; i < tic3x_num_registers; i++)
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registertable[tic3x_registers[i].regno] = (tic4x_register_t *) (tic3x_registers + i);
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registertable[tic3x_registers[i].regno]
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= (tic4x_register_t *) (tic3x_registers + i);
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if (IS_CPU_TIC4X (tic4x_version))
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{
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/* Add C4x additional registers, overwriting
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any C3x registers if necessary. */
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for (i = 0; i < tic4x_num_registers; i++)
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registertable[tic4x_registers[i].regno] =
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(tic4x_register_t *)(tic4x_registers + i);
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registertable[tic4x_registers[i].regno]
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= (tic4x_register_t *)(tic4x_registers + i);
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}
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}
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if ((int) regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX))
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if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX)
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|| registertable[regno] == NULL)
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return 0;
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if (info != NULL)
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(*info->fprintf_func) (info->stream, "%s", registertable[regno]->name);
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@ -639,9 +641,9 @@ tic4x_hash_opcode (tic4x_inst_t **optable,
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const tic4x_inst_t *inst,
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const unsigned long tic4x_oplevel)
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{
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int j;
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int opcode = inst->opcode >> (32 - TIC4X_HASH_SIZE);
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int opmask = inst->opmask >> (32 - TIC4X_HASH_SIZE);
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unsigned int j;
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unsigned int opcode = inst->opcode >> (32 - TIC4X_HASH_SIZE);
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unsigned int opmask = inst->opmask >> (32 - TIC4X_HASH_SIZE);
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/* Use a TIC4X_HASH_SIZE bit index as a hash index. We should
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have unique entries so there's no point having a linked list
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