x86-64: adjust far indirect branch handling
An unwanted side effect of 5990e377e5a3 ("x86-64: Intel64 adjustments for insns dealing with far pointers") was that with -mintel64 LCALL and LJMP would now default to 64-bit operand size. Since 64-bit far branches aren't portable, the default operand size should still be 32-bit. However, since the 64-bit variant is permitted, an ambiguous operand warning should be issued. As to the actual code change, please note that the conditional surrounding the switch() that gets adjusted covers several cases which are of no interest to or benign in 64-bit mode, hence the new conditional added can be quite a bit less involved.
This commit is contained in:
parent
da4977e00b
commit
828c2a2580
@ -1,3 +1,14 @@
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2020-06-09 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_suffix): Restrict defaulting to 'q'
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suffix.
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* testsuite/gas/i386/noreg64.s: Add lcall/ljmp cases.
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* testsuite/gas/i386/noreg64.d: Adjust expectations.
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* testsuite/gas/i386/noreg-intel64.d,
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testsuite/gas/i386/noreg-intel64.l,
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testsuite/gas/i386/noreg-intel64.s: New.
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* testsuite/gas/i386/i386.exp: Run new tests.
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2020-06-09 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (vex_encoding_error): New enumerator.
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@ -6836,7 +6836,9 @@ process_suffix (void)
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case CODE_64BIT:
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if (!i.tm.opcode_modifier.no_qsuf)
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{
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i.suffix = QWORD_MNEM_SUFFIX;
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if (i.tm.opcode_modifier.jump == JUMP_BYTE
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|| i.tm.opcode_modifier.no_lsuf)
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i.suffix = QWORD_MNEM_SUFFIX;
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break;
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}
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/* Fall through. */
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@ -759,6 +759,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_list_test "x86-64-sysenter-amd" "-mamd64"
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run_dump_test "noreg64"
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run_list_test "noreg64"
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run_dump_test "noreg-intel64"
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run_list_test "noreg-intel64" "-I${srcdir}/$subdir -mintel64"
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run_list_test "movx64" "-al"
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run_list_test "cvtsi2sX"
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run_dump_test "x86-64-sse4_1"
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5
gas/testsuite/gas/i386/noreg-intel64.d
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5
gas/testsuite/gas/i386/noreg-intel64.d
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@ -0,0 +1,5 @@
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#as: -mintel64 -moperand-check=none
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#objdump: -dw
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#name: 64-bit insns not sizeable through register operands
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#source: noreg64.s
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#dump: noreg64.d
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134
gas/testsuite/gas/i386/noreg-intel64.l
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134
gas/testsuite/gas/i386/noreg-intel64.l
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@ -0,0 +1,134 @@
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.*: Assembler messages:
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.*:[1-9][0-9]*: Warning: .* `adc'
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.*:[1-9][0-9]*: Warning: .* `adc'
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.*:[1-9][0-9]*: Warning: .* `adc'
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.*:[1-9][0-9]*: Warning: .* `adc'
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.*:[1-9][0-9]*: Warning: .* `add'
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.*:[1-9][0-9]*: Warning: .* `add'
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.*:[1-9][0-9]*: Warning: .* `add'
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.*:[1-9][0-9]*: Warning: .* `add'
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.*:[1-9][0-9]*: Warning: .* `and'
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.*:[1-9][0-9]*: Warning: .* `and'
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.*:[1-9][0-9]*: Warning: .* `and'
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.*:[1-9][0-9]*: Warning: .* `and'
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.*:[1-9][0-9]*: Warning: .* `bt'
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.*:[1-9][0-9]*: Warning: .* `btc'
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.*:[1-9][0-9]*: Warning: .* `btr'
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.*:[1-9][0-9]*: Warning: .* `bts'
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.*:[1-9][0-9]*: Warning: .* `cmp'
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.*:[1-9][0-9]*: Warning: .* `cmp'
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.*:[1-9][0-9]*: Warning: .* `cmp'
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.*:[1-9][0-9]*: Warning: .* `cmp'
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.*:[1-9][0-9]*: Warning: .* `cmps'
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.*:[1-9][0-9]*: Warning: .* `cmps'
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.*:[1-9][0-9]*: Warning: .* `crc32'
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.*:[1-9][0-9]*: Warning: .* `crc32'
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.*:[1-9][0-9]*: Warning: .* `dec'
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.*:[1-9][0-9]*: Warning: .* `div'
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.*:[1-9][0-9]*: Warning: .* `fadd'
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.*:[1-9][0-9]*: Warning: .* `fcom'
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.*:[1-9][0-9]*: Warning: .* `fcomp'
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.*:[1-9][0-9]*: Warning: .* `fdiv'
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.*:[1-9][0-9]*: Warning: .* `fdivr'
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.*:[1-9][0-9]*: Warning: .* `fiadd'
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.*:[1-9][0-9]*: Warning: .* `ficom'
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.*:[1-9][0-9]*: Warning: .* `ficomp'
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.*:[1-9][0-9]*: Warning: .* `fidiv'
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.*:[1-9][0-9]*: Warning: .* `fidivr'
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.*:[1-9][0-9]*: Warning: .* `fild'
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.*:[1-9][0-9]*: Warning: .* `fimul'
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.*:[1-9][0-9]*: Warning: .* `fist'
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.*:[1-9][0-9]*: Warning: .* `fistp'
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.*:[1-9][0-9]*: Warning: .* `fisttp'
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.*:[1-9][0-9]*: Warning: .* `fisub'
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.*:[1-9][0-9]*: Warning: .* `fisubr'
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.*:[1-9][0-9]*: Warning: .* `fld'
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.*:[1-9][0-9]*: Warning: .* `fmul'
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.*:[1-9][0-9]*: Warning: .* `fst'
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.*:[1-9][0-9]*: Warning: .* `fstp'
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.*:[1-9][0-9]*: Warning: .* `fsub'
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.*:[1-9][0-9]*: Warning: .* `fsubr'
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.*:[1-9][0-9]*: Warning: .* `idiv'
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.*:[1-9][0-9]*: Warning: .* `imul'
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.*:[1-9][0-9]*: Warning: .* `in'
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.*:[1-9][0-9]*: Warning: .* `in'
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.*:[1-9][0-9]*: Warning: .* `inc'
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.*:[1-9][0-9]*: Warning: .* `ins'
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.*:[1-9][0-9]*: Warning: .* `ins'
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.*:[1-9][0-9]*: Warning: .* `iret'
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.*:[1-9][0-9]*: Warning: .* `lcall'
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.*:[1-9][0-9]*: Warning: .* `ljmp'
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.*:[1-9][0-9]*: Warning: .* `lods'
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.*:[1-9][0-9]*: Warning: .* `lods'
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.*:[1-9][0-9]*: Warning: .* `lret'
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.*:[1-9][0-9]*: Warning: .* `lret'
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.*:[1-9][0-9]*: Warning: .* `mov'
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.*:[1-9][0-9]*: Warning: .* `mov'
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.*:[1-9][0-9]*: Warning: .* `mov'
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.*:[1-9][0-9]*: Warning: .* `movs'
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.*:[1-9][0-9]*: Warning: .* `movs'
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.*:[1-9][0-9]*: Warning: .* `mul'
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.*:[1-9][0-9]*: Warning: .* `neg'
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.*:[1-9][0-9]*: Warning: .* `nop'
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.*:[1-9][0-9]*: Warning: .* `not'
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.*:[1-9][0-9]*: Warning: .* `or'
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.*:[1-9][0-9]*: Warning: .* `or'
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.*:[1-9][0-9]*: Warning: .* `or'
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.*:[1-9][0-9]*: Warning: .* `or'
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.*:[1-9][0-9]*: Warning: .* `out'
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.*:[1-9][0-9]*: Warning: .* `out'
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.*:[1-9][0-9]*: Warning: .* `outs'
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.*:[1-9][0-9]*: Warning: .* `outs'
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.*:[1-9][0-9]*: Warning: .* `ptwrite'
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.*:[1-9][0-9]*: Warning: .* `rcl'
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.*:[1-9][0-9]*: Warning: .* `rcl'
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.*:[1-9][0-9]*: Warning: .* `rcl'
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.*:[1-9][0-9]*: Warning: .* `rcl'
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.*:[1-9][0-9]*: Warning: .* `rcr'
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.*:[1-9][0-9]*: Warning: .* `rcr'
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.*:[1-9][0-9]*: Warning: .* `rcr'
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.*:[1-9][0-9]*: Warning: .* `rcr'
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.*:[1-9][0-9]*: Warning: .* `rol'
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.*:[1-9][0-9]*: Warning: .* `rol'
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.*:[1-9][0-9]*: Warning: .* `rol'
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.*:[1-9][0-9]*: Warning: .* `rol'
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.*:[1-9][0-9]*: Warning: .* `ror'
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.*:[1-9][0-9]*: Warning: .* `ror'
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.*:[1-9][0-9]*: Warning: .* `ror'
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.*:[1-9][0-9]*: Warning: .* `ror'
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.*:[1-9][0-9]*: Warning: .* `sbb'
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.*:[1-9][0-9]*: Warning: .* `sbb'
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.*:[1-9][0-9]*: Warning: .* `sbb'
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.*:[1-9][0-9]*: Warning: .* `sbb'
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.*:[1-9][0-9]*: Warning: .* `scas'
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.*:[1-9][0-9]*: Warning: .* `scas'
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.*:[1-9][0-9]*: Warning: .* `sal'
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.*:[1-9][0-9]*: Warning: .* `sal'
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.*:[1-9][0-9]*: Warning: .* `sal'
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.*:[1-9][0-9]*: Warning: .* `sal'
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.*:[1-9][0-9]*: Warning: .* `sar'
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.*:[1-9][0-9]*: Warning: .* `sar'
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.*:[1-9][0-9]*: Warning: .* `sar'
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.*:[1-9][0-9]*: Warning: .* `sar'
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.*:[1-9][0-9]*: Warning: .* `shl'
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.*:[1-9][0-9]*: Warning: .* `shl'
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.*:[1-9][0-9]*: Warning: .* `shl'
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.*:[1-9][0-9]*: Warning: .* `shl'
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.*:[1-9][0-9]*: Warning: .* `shr'
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.*:[1-9][0-9]*: Warning: .* `shr'
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.*:[1-9][0-9]*: Warning: .* `shr'
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.*:[1-9][0-9]*: Warning: .* `shr'
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.*:[1-9][0-9]*: Warning: .* `stos'
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.*:[1-9][0-9]*: Warning: .* `stos'
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.*:[1-9][0-9]*: Warning: .* `sub'
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.*:[1-9][0-9]*: Warning: .* `sub'
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.*:[1-9][0-9]*: Warning: .* `sub'
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.*:[1-9][0-9]*: Warning: .* `sub'
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.*:[1-9][0-9]*: Warning: .* `sysret'
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.*:[1-9][0-9]*: Warning: .* `test'
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.*:[1-9][0-9]*: Warning: .* `test'
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.*:[1-9][0-9]*: Warning: .* `test'
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.*:[1-9][0-9]*: Warning: .* `xor'
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.*:[1-9][0-9]*: Warning: .* `xor'
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.*:[1-9][0-9]*: Warning: .* `xor'
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.*:[1-9][0-9]*: Warning: .* `xor'
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1
gas/testsuite/gas/i386/noreg-intel64.s
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1
gas/testsuite/gas/i386/noreg-intel64.s
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.include "noreg64.s"
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@ -66,8 +66,10 @@ Disassembly of section .text:
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*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
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*[a-f0-9]+: cf iret *
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*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
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*[a-f0-9]+: ff 18 lcall \*\(%rax\)
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*[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
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*[a-f0-9]+: 0f 01 18 lidt \(%rax\)
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*[a-f0-9]+: ff 28 ljmp \*\(%rax\)
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*[a-f0-9]+: 0f 00 10 lldt \(%rax\)
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*[a-f0-9]+: 0f 01 30 lmsw \(%rax\)
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*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
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@ -59,8 +59,10 @@ noreg:
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ins %dx, %es:(%rdi)
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iret
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jmp *(%rax)
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lcall *(%rax)
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lgdt (%rax)
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lidt (%rax)
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ljmp *(%rax)
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lldt (%rax)
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lmsw (%rax)
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lods
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