yggdrasil/binutils-gdb
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

sim: v850: rename v850.dc to align with other ports

Browse Source 
Other arches use the .dc extension for the instruction decode table.
This commit is contained in:
Mike Frysinger 2022-11-11 00:58:59 +07:00
parent ef7c5fd15d
commit 897fc27b25
3 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sim/Makefile.in
View File

@ -1628,7 +1628,7 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850-dc
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
all: config.h
$(MAKE) $(AM_MAKEFLAGS) all-recursive

2
sim/v850/local.mk
View File

@ -51,7 +51,7 @@ $(%C%_BUILT_SRC_FROM_IGEN): %D%/stamp-igen
%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
%C%_IGEN_INSN = $(srcdir)/%D%/v850.igen
%C%_IGEN_DC = $(srcdir)/%D%/v850-dc
%C%_IGEN_DC = $(srcdir)/%D%/v850.dc
%D%/stamp-igen: $(%C%_IGEN_INSN) $(%C%_IGEN_DC) $(IGEN)
$(AM_V_GEN)$(IGEN_RUN) \
$(%C%_IGEN_TRACE) \

0
sim/v850/v850-dc → sim/v850/v850.dc
View File