arc: Add ARCv2 XML target along with refactoring

A few changes have been made to make the register support simpler,
more flexible and extendible.  The trigger for most of these changes
are the remarks [1] made earlier for v2 of this patch.  The noticeable
improvements are:

- The arc XML target features are placed under gdb/features/arc
- There are two cores (based on ISA) and one auxiliary feature:
  v1-core: ARC600, ARC601, ARC700
  v2-core: ARC EM, ARC HS
  aux: common in both
- The XML target features represent a minimalistic sane set of
  registers irrespective of application (baremetal or linux).
- A concept of "feature" class has been introduced in the code.
  The "feature" object is constructed from BFD and GDBARCH data.
  It contains necessary information (ISA and register size) to
  determine which XML target feature to use.
- A new structure (ARC_REGISTER_FEATURE) is added that allows
  providing index, names, and the necessity of registers. This
  simplifies the sanity checks and future extendibility.
- Documnetation has been updated to reflect ARC features better.
- Although the feature names has changed, there still exists
  backward compatibility with older names through
  find_obsolete_[core,aux]_names() functions.

The last two points were inspired from RiscV port.

[1]
https://sourceware.org/pipermail/gdb-patches/2020-May/168511.html

gdb/ChangeLog:

	* arch/arc.h
	  (arc_gdbarch_features): New class to stir the selection of target XML.
	  (arc_create_target_description): Use FEATURES to choose XML target.
	  (arc_lookup_target_description): Use arc_create_target_description
	  to create _new_ target descriptions or return the already created
	  ones if the FEATURES is the same.
	* arch/arc.c: Implementation of prototypes described above.
	* gdb/arc-tdep.h (arc_regnum enum): Add more registers.
	  (arc_gdbarch_features_init): Initialize the FEATURES struct.
	* arc-tdep.c (*_feature_name): Make feature names consistent.
	  (arc_register_feature): A new struct to hold information about
	  registers of a particular target/feature.
	  (arc_check_tdesc_feature): Check if XML provides registers in
	  compliance with ARC_REGISTER_FEATURE structs.
	  (arc_update_acc_reg_names): Add aliases for r58 and r59.
	  (determine_*_reg_feature_set): Which feature name to look for.
	  (arc_gdbarch_features_init): Given MACH and ABFD, initialize FEATURES.
	  (mach_type_to_arc_isa): Convert from a set of binutils machine types
	  to expected ISA enums to be used in arc_gdbarch_features structs.
	* features/Makefile (FEATURE_XMLFILES): Add new files.
	* gdb/features/arc/v1-aux.c: New file.
	* gdb/features/arc/v1-aux.xml: Likewise.
	* gdb/features/arc/v1-core.c: Likewise.
	* gdb/features/arc/v1-core.xml: Likewise.
	* gdb/features/arc/v2-aux.c: Likewise.
	* gdb/features/arc/v2-aux.xml: Likewise.
	* gdb/features/arc/v2-core.c: Likewise.
	* gdb/features/arc/v2-core.xml: Likewise.
	* NEWS (Changes since GDB 9): Announce obsolence of old feature names.

gdb/doc/ChangeLog:

	* gdb.texinfo (Synopsys ARC): Update the documentation for ARC
	Features.

gdb/testsuite/ChangeLog:

	* gdb.arch/arc-tdesc-cpu.xml: Use new feature names.
This commit is contained in:
Shahab Vahedi 2020-07-09 17:43:13 +02:00
parent 8cac2b318b
commit 995d3a197d
19 changed files with 697 additions and 355 deletions

View File

@ -1,3 +1,35 @@
2020-08-25 Shahab Vahedi <shahab@synopsys.com>
* arch/arc.h
(arc_gdbarch_features): New class to stir the selection of target XML.
(arc_create_target_description): Use FEATURES to choose XML target.
(arc_lookup_target_description): Use arc_create_target_description
to create _new_ target descriptions or return the already created
ones if the FEATURES is the same.
* arch/arc.c: Implementation of prototypes described above.
* gdb/arc-tdep.h (arc_regnum enum): Add more registers.
(arc_gdbarch_features_init): Initialize the FEATURES struct.
* arc-tdep.c (*_feature_name): Make feature names consistent.
(arc_register_feature): A new struct to hold information about
registers of a particular target/feature.
(arc_check_tdesc_feature): Check if XML provides registers in
compliance with ARC_REGISTER_FEATURE structs.
(arc_update_acc_reg_names): Add aliases for r58 and r59.
(determine_*_reg_feature_set): Which feature name to look for.
(arc_gdbarch_features_init): Given MACH and ABFD, initialize FEATURES.
(mach_type_to_arc_isa): Convert from a set of binutils machine types
to expected ISA enums to be used in arc_gdbarch_features structs.
* features/Makefile (FEATURE_XMLFILES): Add new files.
* gdb/features/arc/v1-aux.c: New file.
* gdb/features/arc/v1-aux.xml: Likewise.
* gdb/features/arc/v1-core.c: Likewise.
* gdb/features/arc/v1-core.xml: Likewise.
* gdb/features/arc/v2-aux.c: Likewise.
* gdb/features/arc/v2-aux.xml: Likewise.
* gdb/features/arc/v2-core.c: Likewise.
* gdb/features/arc/v2-core.xml: Likewise.
* NEWS (Changes since GDB 9): Announce obsolence of old feature names.
2020-08-25 Gaius Mulley <gaiusmod2@gmail.com>
Andrew Burgess <andrew.burgess@embecosm.com>

View File

@ -3,6 +3,11 @@
*** Changes since GDB 9
* There are new feature names for ARC targets: "org.gnu.gdb.arc.core"
and "org.gnu.gdb.arc.aux". The old names are still supported but
must be considered obsolete. They will be deprecated after some
grace period.
* Help and apropos commands will now show the documentation of a
command only once, even if that command has one or more aliases.
These commands now show the command name, then all of its aliases,

View File

@ -21,6 +21,7 @@
/* GDB header files. */
#include "defs.h"
#include "arch-utils.h"
#include "elf-bfd.h"
#include "disasm.h"
#include "dwarf2/frame.h"
#include "frame-base.h"
@ -41,6 +42,7 @@
/* Standard headers. */
#include <algorithm>
#include <sstream>
/* The frame unwind cache for ARC. */
@ -91,64 +93,212 @@ int arc_debug;
static struct cmd_list_element *maintenance_print_arc_list = NULL;
/* XML target description features. */
/* A set of registers that we expect to find in a tdesc_feature. These
are used in ARC_TDESC_INIT when processing the target description. */
static const char core_v2_feature_name[] = "org.gnu.gdb.arc.core.v2";
static const char
core_reduced_v2_feature_name[] = "org.gnu.gdb.arc.core-reduced.v2";
static const char
core_arcompact_feature_name[] = "org.gnu.gdb.arc.core.arcompact";
static const char aux_minimal_feature_name[] = "org.gnu.gdb.arc.aux-minimal";
struct arc_register_feature
{
/* Information for a single register. */
struct register_info
{
/* The GDB register number for this register. */
int regnum;
/* XML target description known registers. */
/* List of names for this register. The first name in this list is the
preferred name, the name GDB will use when describing this register. */
std::vector<const char *> names;
static const char *const core_v2_register_names[] = {
"r0", "r1", "r2", "r3",
"r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11",
"r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19",
"r20", "r21", "r22", "r23",
"r24", "r25", "gp", "fp",
"sp", "ilink", "r30", "blink",
"r32", "r33", "r34", "r35",
"r36", "r37", "r38", "r39",
"r40", "r41", "r42", "r43",
"r44", "r45", "r46", "r47",
"r48", "r49", "r50", "r51",
"r52", "r53", "r54", "r55",
"r56", "r57", "accl", "acch",
"lp_count", "reserved", "limm", "pcl",
/* When true, this register must be present in this feature set. */
bool required_p;
};
/* The name for this feature. This is the name used to find this feature
within the target description. */
const char *name;
/* List of all the registers that we expect to encounter in this register
set. */
std::vector<struct register_info> registers;
};
static const char *const aux_minimal_register_names[] = {
"pc", "status32",
/* Obsolete feature names for backward compatibility. */
static const char *ARC_CORE_V1_OBSOLETE_FEATURE_NAME
= "org.gnu.gdb.arc.core.arcompact";
static const char *ARC_CORE_V2_OBSOLETE_FEATURE_NAME
= "org.gnu.gdb.arc.core.v2";
static const char *ARC_CORE_V2_REDUCED_OBSOLETE_FEATURE_NAME
= "org.gnu.gdb.arc.core-reduced.v2";
static const char *ARC_AUX_OBSOLETE_FEATURE_NAME
= "org.gnu.gdb.arc.aux-minimal";
/* Modern feature names. */
static const char *ARC_CORE_FEATURE_NAME = "org.gnu.gdb.arc.core";
static const char *ARC_AUX_FEATURE_NAME = "org.gnu.gdb.arc.aux";
/* ARCv1 (ARC600, ARC601, ARC700) general core registers feature set.
See also arc_update_acc_reg_names() for "accl/acch" names. */
static struct arc_register_feature arc_v1_core_reg_feature =
{
ARC_CORE_FEATURE_NAME,
{
{ ARC_R0_REGNUM + 0, { "r0" }, true },
{ ARC_R0_REGNUM + 1, { "r1" }, true },
{ ARC_R0_REGNUM + 2, { "r2" }, true },
{ ARC_R0_REGNUM + 3, { "r3" }, true },
{ ARC_R0_REGNUM + 4, { "r4" }, false },
{ ARC_R0_REGNUM + 5, { "r5" }, false },
{ ARC_R0_REGNUM + 6, { "r6" }, false },
{ ARC_R0_REGNUM + 7, { "r7" }, false },
{ ARC_R0_REGNUM + 8, { "r8" }, false },
{ ARC_R0_REGNUM + 9, { "r9" }, false },
{ ARC_R0_REGNUM + 10, { "r10" }, true },
{ ARC_R0_REGNUM + 11, { "r11" }, true },
{ ARC_R0_REGNUM + 12, { "r12" }, true },
{ ARC_R0_REGNUM + 13, { "r13" }, true },
{ ARC_R0_REGNUM + 14, { "r14" }, true },
{ ARC_R0_REGNUM + 15, { "r15" }, true },
{ ARC_R0_REGNUM + 16, { "r16" }, false },
{ ARC_R0_REGNUM + 17, { "r17" }, false },
{ ARC_R0_REGNUM + 18, { "r18" }, false },
{ ARC_R0_REGNUM + 19, { "r19" }, false },
{ ARC_R0_REGNUM + 20, { "r20" }, false },
{ ARC_R0_REGNUM + 21, { "r21" }, false },
{ ARC_R0_REGNUM + 22, { "r22" }, false },
{ ARC_R0_REGNUM + 23, { "r23" }, false },
{ ARC_R0_REGNUM + 24, { "r24" }, false },
{ ARC_R0_REGNUM + 25, { "r25" }, false },
{ ARC_R0_REGNUM + 26, { "gp" }, true },
{ ARC_R0_REGNUM + 27, { "fp" }, true },
{ ARC_R0_REGNUM + 28, { "sp" }, true },
{ ARC_R0_REGNUM + 29, { "ilink1" }, false },
{ ARC_R0_REGNUM + 30, { "ilink2" }, false },
{ ARC_R0_REGNUM + 31, { "blink" }, true },
{ ARC_R0_REGNUM + 32, { "r32" }, false },
{ ARC_R0_REGNUM + 33, { "r33" }, false },
{ ARC_R0_REGNUM + 34, { "r34" }, false },
{ ARC_R0_REGNUM + 35, { "r35" }, false },
{ ARC_R0_REGNUM + 36, { "r36" }, false },
{ ARC_R0_REGNUM + 37, { "r37" }, false },
{ ARC_R0_REGNUM + 38, { "r38" }, false },
{ ARC_R0_REGNUM + 39, { "r39" }, false },
{ ARC_R0_REGNUM + 40, { "r40" }, false },
{ ARC_R0_REGNUM + 41, { "r41" }, false },
{ ARC_R0_REGNUM + 42, { "r42" }, false },
{ ARC_R0_REGNUM + 43, { "r43" }, false },
{ ARC_R0_REGNUM + 44, { "r44" }, false },
{ ARC_R0_REGNUM + 45, { "r45" }, false },
{ ARC_R0_REGNUM + 46, { "r46" }, false },
{ ARC_R0_REGNUM + 47, { "r47" }, false },
{ ARC_R0_REGNUM + 48, { "r48" }, false },
{ ARC_R0_REGNUM + 49, { "r49" }, false },
{ ARC_R0_REGNUM + 50, { "r50" }, false },
{ ARC_R0_REGNUM + 51, { "r51" }, false },
{ ARC_R0_REGNUM + 52, { "r52" }, false },
{ ARC_R0_REGNUM + 53, { "r53" }, false },
{ ARC_R0_REGNUM + 54, { "r54" }, false },
{ ARC_R0_REGNUM + 55, { "r55" }, false },
{ ARC_R0_REGNUM + 56, { "r56" }, false },
{ ARC_R0_REGNUM + 57, { "r57" }, false },
{ ARC_R0_REGNUM + 58, { "r58", "accl" }, false },
{ ARC_R0_REGNUM + 59, { "r59", "acch" }, false },
{ ARC_R0_REGNUM + 60, { "lp_count" }, false },
{ ARC_R0_REGNUM + 61, { "reserved" }, false },
{ ARC_R0_REGNUM + 62, { "limm" }, false },
{ ARC_R0_REGNUM + 63, { "pcl" }, true }
}
};
static const char *const core_arcompact_register_names[] = {
"r0", "r1", "r2", "r3",
"r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11",
"r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19",
"r20", "r21", "r22", "r23",
"r24", "r25", "gp", "fp",
"sp", "ilink1", "ilink2", "blink",
"r32", "r33", "r34", "r35",
"r36", "r37", "r38", "r39",
"r40", "r41", "r42", "r43",
"r44", "r45", "r46", "r47",
"r48", "r49", "r50", "r51",
"r52", "r53", "r54", "r55",
"r56", "r57", "r58", "r59",
"lp_count", "reserved", "limm", "pcl",
/* ARCv2 (ARCHS) general core registers feature set. See also
arc_update_acc_reg_names() for "accl/acch" names. */
static struct arc_register_feature arc_v2_core_reg_feature =
{
ARC_CORE_FEATURE_NAME,
{
{ ARC_R0_REGNUM + 0, { "r0" }, true },
{ ARC_R0_REGNUM + 1, { "r1" }, true },
{ ARC_R0_REGNUM + 2, { "r2" }, true },
{ ARC_R0_REGNUM + 3, { "r3" }, true },
{ ARC_R0_REGNUM + 4, { "r4" }, false },
{ ARC_R0_REGNUM + 5, { "r5" }, false },
{ ARC_R0_REGNUM + 6, { "r6" }, false },
{ ARC_R0_REGNUM + 7, { "r7" }, false },
{ ARC_R0_REGNUM + 8, { "r8" }, false },
{ ARC_R0_REGNUM + 9, { "r9" }, false },
{ ARC_R0_REGNUM + 10, { "r10" }, true },
{ ARC_R0_REGNUM + 11, { "r11" }, true },
{ ARC_R0_REGNUM + 12, { "r12" }, true },
{ ARC_R0_REGNUM + 13, { "r13" }, true },
{ ARC_R0_REGNUM + 14, { "r14" }, true },
{ ARC_R0_REGNUM + 15, { "r15" }, true },
{ ARC_R0_REGNUM + 16, { "r16" }, false },
{ ARC_R0_REGNUM + 17, { "r17" }, false },
{ ARC_R0_REGNUM + 18, { "r18" }, false },
{ ARC_R0_REGNUM + 19, { "r19" }, false },
{ ARC_R0_REGNUM + 20, { "r20" }, false },
{ ARC_R0_REGNUM + 21, { "r21" }, false },
{ ARC_R0_REGNUM + 22, { "r22" }, false },
{ ARC_R0_REGNUM + 23, { "r23" }, false },
{ ARC_R0_REGNUM + 24, { "r24" }, false },
{ ARC_R0_REGNUM + 25, { "r25" }, false },
{ ARC_R0_REGNUM + 26, { "gp" }, true },
{ ARC_R0_REGNUM + 27, { "fp" }, true },
{ ARC_R0_REGNUM + 28, { "sp" }, true },
{ ARC_R0_REGNUM + 29, { "ilink" }, false },
{ ARC_R0_REGNUM + 30, { "r30" }, true },
{ ARC_R0_REGNUM + 31, { "blink" }, true },
{ ARC_R0_REGNUM + 32, { "r32" }, false },
{ ARC_R0_REGNUM + 33, { "r33" }, false },
{ ARC_R0_REGNUM + 34, { "r34" }, false },
{ ARC_R0_REGNUM + 35, { "r35" }, false },
{ ARC_R0_REGNUM + 36, { "r36" }, false },
{ ARC_R0_REGNUM + 37, { "r37" }, false },
{ ARC_R0_REGNUM + 38, { "r38" }, false },
{ ARC_R0_REGNUM + 39, { "r39" }, false },
{ ARC_R0_REGNUM + 40, { "r40" }, false },
{ ARC_R0_REGNUM + 41, { "r41" }, false },
{ ARC_R0_REGNUM + 42, { "r42" }, false },
{ ARC_R0_REGNUM + 43, { "r43" }, false },
{ ARC_R0_REGNUM + 44, { "r44" }, false },
{ ARC_R0_REGNUM + 45, { "r45" }, false },
{ ARC_R0_REGNUM + 46, { "r46" }, false },
{ ARC_R0_REGNUM + 47, { "r47" }, false },
{ ARC_R0_REGNUM + 48, { "r48" }, false },
{ ARC_R0_REGNUM + 49, { "r49" }, false },
{ ARC_R0_REGNUM + 50, { "r50" }, false },
{ ARC_R0_REGNUM + 51, { "r51" }, false },
{ ARC_R0_REGNUM + 52, { "r52" }, false },
{ ARC_R0_REGNUM + 53, { "r53" }, false },
{ ARC_R0_REGNUM + 54, { "r54" }, false },
{ ARC_R0_REGNUM + 55, { "r55" }, false },
{ ARC_R0_REGNUM + 56, { "r56" }, false },
{ ARC_R0_REGNUM + 57, { "r57" }, false },
{ ARC_R0_REGNUM + 58, { "r58", "accl" }, false },
{ ARC_R0_REGNUM + 59, { "r59", "acch" }, false },
{ ARC_R0_REGNUM + 60, { "lp_count" }, false },
{ ARC_R0_REGNUM + 61, { "reserved" }, false },
{ ARC_R0_REGNUM + 62, { "limm" }, false },
{ ARC_R0_REGNUM + 63, { "pcl" }, true }
}
};
/* The common auxiliary registers feature set. The REGNUM field
must match the ARC_REGNUM enum in arc-tdep.h. */
static const struct arc_register_feature arc_common_aux_reg_feature =
{
ARC_AUX_FEATURE_NAME,
{
{ ARC_FIRST_AUX_REGNUM + 0, { "pc" }, true },
{ ARC_FIRST_AUX_REGNUM + 1, { "status32" }, true },
{ ARC_FIRST_AUX_REGNUM + 2, { "lp_start" }, false },
{ ARC_FIRST_AUX_REGNUM + 3, { "lp_end" }, false },
{ ARC_FIRST_AUX_REGNUM + 4, { "bta" }, false }
}
};
static char *arc_disassembler_options = NULL;
/* Possible arc target descriptors. */
static struct target_desc *tdesc_arc_list[ARC_SYS_TYPE_NUM];
/* Functions are sorted in the order as they are used in the
_initialize_arc_tdep (), which uses the same order as gdbarch.h. Static
functions are defined before the first invocation. */
@ -1717,192 +1867,254 @@ static const struct frame_base arc_normal_base = {
arc_frame_base_address
};
static enum arc_isa
mach_type_to_arc_isa (const unsigned long mach)
{
switch (mach)
{
case bfd_mach_arc_arc600:
case bfd_mach_arc_arc601:
case bfd_mach_arc_arc700:
return ARC_ISA_ARCV1;
case bfd_mach_arc_arcv2:
return ARC_ISA_ARCV2;
default:
internal_error (__FILE__, __LINE__,
_("unknown machine id %lu"), mach);
}
}
/* Common construction code for ARC_GDBARCH_FEATURES struct. If there
is no ABFD, then a FEATURE with default values is returned. */
static arc_gdbarch_features
arc_gdbarch_features_create (const bfd *abfd, const unsigned long mach)
{
/* Use 4 as a fallback value. */
int reg_size = 4;
/* Try to guess the features parameters by looking at the binary to be
executed. If the user is providing a binary that does not match the
target, then tough luck. This is the last effort to makes sense of
what's going on. */
if (abfd != nullptr && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
{
unsigned char eclass = elf_elfheader (abfd)->e_ident[EI_CLASS];
if (eclass == ELFCLASS32)
reg_size = 4;
else if (eclass == ELFCLASS64)
reg_size = 8;
else
internal_error (__FILE__, __LINE__,
_("unknown ELF header class %d"), eclass);
}
/* MACH from a bfd_arch_info struct is used here. It should be a safe
bet, as it looks like the struct is always initialized even when we
don't pass any elf file to GDB at all (it uses default arch in that
case). */
arc_isa isa = mach_type_to_arc_isa (mach);
return arc_gdbarch_features (reg_size, isa);
}
/* Look for obsolete core feature names in TDESC. */
static const struct tdesc_feature *
find_obsolete_core_names (const struct target_desc *tdesc)
{
const struct tdesc_feature *feat = nullptr;
feat = tdesc_find_feature (tdesc, ARC_CORE_V1_OBSOLETE_FEATURE_NAME);
if (feat == nullptr)
feat = tdesc_find_feature (tdesc, ARC_CORE_V2_OBSOLETE_FEATURE_NAME);
if (feat == nullptr)
feat = tdesc_find_feature
(tdesc, ARC_CORE_V2_REDUCED_OBSOLETE_FEATURE_NAME);
return feat;
}
/* Look for obsolete aux feature names in TDESC. */
static const struct tdesc_feature *
find_obsolete_aux_names (const struct target_desc *tdesc)
{
return tdesc_find_feature (tdesc, ARC_AUX_OBSOLETE_FEATURE_NAME);
}
/* Based on the MACH value, determines which core register features set
must be used. */
static arc_register_feature *
determine_core_reg_feature_set (const unsigned long mach)
{
switch (mach_type_to_arc_isa (mach))
{
case ARC_ISA_ARCV1:
return &arc_v1_core_reg_feature;
case ARC_ISA_ARCV2:
return &arc_v2_core_reg_feature;
default:
gdb_assert_not_reached
("Unknown machine type to determine the core feature set.");
}
}
/* At the moment, there is only 1 auxiliary register features set.
This is a place holder for future extendability. */
static const arc_register_feature *
determine_aux_reg_feature_set ()
{
return &arc_common_aux_reg_feature;
}
/* Update accumulator register names (ACCH/ACCL) for r58 and r59 in the
register sets. The endianness determines the assignment:
,------.------.
| acch | accl |
,----|------+------|
| LE | r59 | r58 |
| BE | r58 | r59 |
`----^------^------' */
static void
arc_update_acc_reg_names (const int byte_order)
{
const char *r58_alias
= byte_order == BFD_ENDIAN_LITTLE ? "accl" : "acch";
const char *r59_alias
= byte_order == BFD_ENDIAN_LITTLE ? "acch" : "accl";
/* Subscript 1 must be OK because those registers have 2 names. */
arc_v1_core_reg_feature.registers[ARC_R58_REGNUM].names[1] = r58_alias;
arc_v1_core_reg_feature.registers[ARC_R59_REGNUM].names[1] = r59_alias;
arc_v2_core_reg_feature.registers[ARC_R58_REGNUM].names[1] = r58_alias;
arc_v2_core_reg_feature.registers[ARC_R59_REGNUM].names[1] = r59_alias;
}
/* Go through all the registers in REG_SET and check if they exist
in FEATURE. The TDESC_DATA is updated with the register number
in REG_SET if it is found in the feature. If a required register
is not found, this function returns false. */
static bool
arc_check_tdesc_feature (struct tdesc_arch_data *tdesc_data,
const struct tdesc_feature *feature,
const struct arc_register_feature *reg_set)
{
for (const auto &reg : reg_set->registers)
{
bool found = false;
for (const char *name : reg.names)
{
found
= tdesc_numbered_register (feature, tdesc_data, reg.regnum, name);
if (found)
break;
}
if (!found && reg.required_p)
{
std::ostringstream reg_names;
for (std::size_t i = 0; i < reg.names.size(); ++i)
{
if (i == 0)
reg_names << "'" << reg.names[0] << "'";
else
reg_names << " or '" << reg.names[0] << "'";
}
arc_print (_("Error: Cannot find required register(s) %s "
"in feature '%s'.\n"), reg_names.str ().c_str (),
feature->name.c_str ());
return false;
}
}
return true;
}
/* Initialize target description for the ARC.
Returns TRUE if input tdesc was valid and in this case it will assign TDESC
Returns true if input TDESC was valid and in this case it will assign TDESC
and TDESC_DATA output parameters. */
static bool
arc_tdesc_init (struct gdbarch_info info, const struct target_desc **tdesc,
struct tdesc_arch_data **tdesc_data)
{
const struct target_desc *tdesc_loc = info.target_desc;
if (arc_debug)
debug_printf ("arc: Target description initialization.\n");
const struct target_desc *tdesc_loc = info.target_desc;
/* Depending on whether this is ARCompact or ARCv2 we will assign
different default registers sets (which will differ in exactly two core
registers). GDB will also refuse to accept register feature from invalid
ISA - v2 features can be used only with v2 ARChitecture. We read
bfd_arch_info, which looks like to be a safe bet here, as it looks like it
is always initialized even when we don't pass any elf file to GDB at all
(it uses default arch in this case). Also GDB will call this function
multiple times, and if XML target description file contains architecture
specifications, then GDB will set this architecture to info.bfd_arch_info,
overriding value from ELF file if they are different. That means that,
where matters, this value is always our best guess on what CPU we are
debugging. It has been noted that architecture specified in tdesc file
has higher precedence over ELF and even "set architecture" - that is,
using "set architecture" command will have no effect when tdesc has "arch"
tag. */
/* Cannot use arc_mach_is_arcv2 (), because gdbarch is not created yet. */
const int is_arcv2 = (info.bfd_arch_info->mach == bfd_mach_arc_arcv2);
bool is_reduced_rf;
const char *const *core_regs;
const char *core_feature_name;
/* If target doesn't provide a description, use the default ones. */
if (!tdesc_has_registers (tdesc_loc))
{
if (is_arcv2)
tdesc_loc = arc_read_description (ARC_SYS_TYPE_ARCV2);
else
tdesc_loc = arc_read_description (ARC_SYS_TYPE_ARCOMPACT);
arc_gdbarch_features features
= arc_gdbarch_features_create (info.abfd,
info.bfd_arch_info->mach);
tdesc_loc = arc_lookup_target_description (features);
}
else
gdb_assert (tdesc_loc != nullptr);
if (arc_debug)
debug_printf ("arc: Have got a target description\n");
const struct tdesc_feature *feature_core
= tdesc_find_feature (tdesc_loc, ARC_CORE_FEATURE_NAME);
const struct tdesc_feature *feature_aux
= tdesc_find_feature (tdesc_loc, ARC_AUX_FEATURE_NAME);
/* Maybe there still is a chance to salvage the input. */
if (feature_core == nullptr)
feature_core = find_obsolete_core_names (tdesc_loc);
if (feature_aux == nullptr)
feature_aux = find_obsolete_aux_names (tdesc_loc);
if (feature_core == nullptr)
{
if (arc_debug)
debug_printf ("arc: Using provided register set.\n");
}
gdb_assert (tdesc_loc != NULL);
/* Now we can search for base registers. Core registers can be either full
or reduced. Summary:
- core.v2 + aux-minimal
- core-reduced.v2 + aux-minimal
- core.arcompact + aux-minimal
NB: It is entirely feasible to have ARCompact with reduced core regs, but
we ignore that because GCC doesn't support that and at the same time
ARCompact is considered obsolete, so there is not much reason to support
that. */
const struct tdesc_feature *feature
= tdesc_find_feature (tdesc_loc, core_v2_feature_name);
if (feature != NULL)
{
/* Confirm that register and architecture match, to prevent accidents in
some situations. This code will trigger an error if:
1. XML tdesc doesn't specify arch explicitly, registers are for arch
X, but ELF specifies arch Y.
2. XML tdesc specifies arch X, but contains registers for arch Y.
It will not protect from case where XML or ELF specify arch X,
registers are for the same arch X, but the real target is arch Y. To
detect this case we need to check IDENTITY register. */
if (!is_arcv2)
{
arc_print (_("Error: ARC v2 target description supplied for "
"non-ARCv2 target.\n"));
return false;
}
is_reduced_rf = false;
core_feature_name = core_v2_feature_name;
core_regs = core_v2_register_names;
}
else
{
feature = tdesc_find_feature (tdesc_loc, core_reduced_v2_feature_name);
if (feature != NULL)
{
if (!is_arcv2)
{
arc_print (_("Error: ARC v2 target description supplied for "
"non-ARCv2 target.\n"));
return false;
}
is_reduced_rf = true;
core_feature_name = core_reduced_v2_feature_name;
core_regs = core_v2_register_names;
}
else
{
feature = tdesc_find_feature (tdesc_loc,
core_arcompact_feature_name);
if (feature != NULL)
{
if (is_arcv2)
{
arc_print (_("Error: ARCompact target description supplied "
"for non-ARCompact target.\n"));
return false;
}
is_reduced_rf = false;
core_feature_name = core_arcompact_feature_name;
core_regs = core_arcompact_register_names;
}
else
{
arc_print (_("Error: Couldn't find core register feature in "
"supplied target description."));
return false;
}
}
}
struct tdesc_arch_data *tdesc_data_loc = tdesc_data_alloc ();
gdb_assert (feature != NULL);
int valid_p = 1;
for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++)
{
/* If rf16, then skip extra registers. */
if (is_reduced_rf && ((i >= ARC_R4_REGNUM && i <= ARC_R9_REGNUM)
|| (i >= ARC_R16_REGNUM && i <= ARC_R25_REGNUM)))
continue;
valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i,
core_regs[i]);
/* - Ignore errors in extension registers - they are optional.
- Ignore missing ILINK because it doesn't make sense for Linux.
- Ignore missing ILINK2 when architecture is ARCompact, because it
doesn't make sense for Linux targets.
In theory those optional registers should be in separate features, but
that would create numerous but tiny features, which looks like an
overengineering of a rather simple task. */
if (!valid_p && (i <= ARC_SP_REGNUM || i == ARC_BLINK_REGNUM
|| i == ARC_LP_COUNT_REGNUM || i == ARC_PCL_REGNUM
|| (i == ARC_R30_REGNUM && is_arcv2)))
{
arc_print (_("Error: Cannot find required register `%s' in "
"feature `%s'.\n"), core_regs[i], core_feature_name);
tdesc_data_cleanup (tdesc_data_loc);
return false;
}
}
/* Mandatory AUX registers are intentionally few and are common between
ARCompact and ARC v2, so same code can be used for both. */
feature = tdesc_find_feature (tdesc_loc, aux_minimal_feature_name);
if (feature == NULL)
{
arc_print (_("Error: Cannot find required feature `%s' in supplied "
"target description.\n"), aux_minimal_feature_name);
tdesc_data_cleanup (tdesc_data_loc);
arc_print (_("Error: Cannot find required feature '%s' in supplied "
"target description.\n"), ARC_CORE_FEATURE_NAME);
return false;
}
for (int i = ARC_FIRST_AUX_REGNUM; i <= ARC_LAST_AUX_REGNUM; i++)
if (feature_aux == nullptr)
{
const char *name = aux_minimal_register_names[i - ARC_FIRST_AUX_REGNUM];
valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i, name);
if (!valid_p)
{
arc_print (_("Error: Cannot find required register `%s' "
"in feature `%s'.\n"),
name, tdesc_feature_name (feature));
tdesc_data_cleanup (tdesc_data_loc);
return false;
}
arc_print (_("Error: Cannot find required feature '%s' in supplied "
"target description.\n"), ARC_AUX_FEATURE_NAME);
return false;
}
const arc_register_feature *arc_core_reg_feature
= determine_core_reg_feature_set (info.bfd_arch_info->mach);
const arc_register_feature *arc_aux_reg_feature
= determine_aux_reg_feature_set ();
struct tdesc_arch_data *tdesc_data_loc = tdesc_data_alloc ();
arc_update_acc_reg_names (info.byte_order);
bool valid_p = arc_check_tdesc_feature (tdesc_data_loc,
feature_core,
arc_core_reg_feature);
valid_p &= arc_check_tdesc_feature (tdesc_data_loc,
feature_aux,
arc_aux_reg_feature);
if (!valid_p)
{
if (arc_debug)
debug_printf ("arc: Target description is not valid\n");
tdesc_data_cleanup (tdesc_data_loc);
return false;
}
*tdesc = tdesc_loc;
@ -2131,38 +2343,6 @@ dump_arc_instruction_command (const char *args, int from_tty)
arc_insn_dump (insn);
}
/* See arc-tdep.h. */
const target_desc *
arc_read_description (arc_sys_type sys_type)
{
if (arc_debug)
debug_printf ("arc: Reading target description for \"%s\".\n",
arc_sys_type_to_str (sys_type));
gdb_assert ((sys_type >= 0) && (sys_type < ARC_SYS_TYPE_NUM));
struct target_desc *tdesc = tdesc_arc_list[sys_type];
if (tdesc == nullptr)
{
tdesc = arc_create_target_description (sys_type);
tdesc_arc_list[sys_type] = tdesc;
if (arc_debug)
{
const char *arch = tdesc_architecture_name (tdesc);
const char *abi = tdesc_osabi_name (tdesc);
arch = arch != NULL ? arch : "";
abi = abi != NULL ? abi : "";
debug_printf ("arc: Created target description for "
"\"%s\": arch=\"%s\", ABI=\"%s\"\n",
arc_sys_type_to_str (sys_type), arch, abi);
}
}
return tdesc;
}
void _initialize_arc_tdep ();
void
_initialize_arc_tdep ()

View File

@ -35,7 +35,6 @@ enum arc_regnum
{
/* Core registers. */
ARC_R0_REGNUM = 0,
ARC_FIRST_CORE_REGNUM = ARC_R0_REGNUM,
ARC_R1_REGNUM = 1,
ARC_R4_REGNUM = 4,
ARC_R7_REGNUM = 7,
@ -54,6 +53,9 @@ enum arc_regnum
ARC_R30_REGNUM,
/* Return address from function. */
ARC_BLINK_REGNUM,
/* Accumulator registers. */
ARC_R58_REGNUM = 58,
ARC_R59_REGNUM,
/* Zero-delay loop counter. */
ARC_LP_COUNT_REGNUM = 60,
/* Reserved register number. There should never be a register with such
@ -69,14 +71,21 @@ enum arc_regnum
/* Program counter, aligned to 4-bytes, read-only. */
ARC_PCL_REGNUM,
ARC_LAST_CORE_REGNUM = ARC_PCL_REGNUM,
/* AUX registers. */
/* Actual program counter. */
ARC_PC_REGNUM,
ARC_FIRST_AUX_REGNUM = ARC_PC_REGNUM,
/* Status register. */
ARC_STATUS32_REGNUM,
ARC_LAST_REGNUM = ARC_STATUS32_REGNUM,
ARC_LAST_AUX_REGNUM = ARC_STATUS32_REGNUM,
/* Zero-delay loop start instruction. */
ARC_LP_START_REGNUM,
/* Zero-delay loop next-after-last instruction. */
ARC_LP_END_REGNUM,
/* Branch target address. */
ARC_BTA_REGNUM,
ARC_LAST_AUX_REGNUM = ARC_BTA_REGNUM,
ARC_LAST_REGNUM = ARC_LAST_AUX_REGNUM,
/* Additional ABI constants. */
ARC_FIRST_ARG_REGNUM = ARC_R0_REGNUM,
@ -164,7 +173,4 @@ CORE_ADDR arc_insn_get_branch_target (const struct arc_instruction &insn);
CORE_ADDR arc_insn_get_linear_next_pc (const struct arc_instruction &insn);
/* Get the correct ARC target description for the given system type. */
const target_desc *arc_read_description (arc_sys_type sys_type);
#endif /* ARC_TDEP_H */

View File

@ -17,42 +17,106 @@
#include "gdbsupport/common-defs.h"
#include <stdlib.h>
#include "arc.h"
#include <stdlib.h>
#include <unordered_map>
#include <string>
/* Target description features. */
#include "features/arc/core-v2.c"
#include "features/arc/aux-v2.c"
#include "features/arc/core-arcompact.c"
#include "features/arc/aux-arcompact.c"
#include "features/arc/v1-core.c"
#include "features/arc/v1-aux.c"
#include "features/arc/v2-core.c"
#include "features/arc/v2-aux.c"
/* See arc.h. */
#ifndef GDBSERVER
#define STATIC_IN_GDB static
#else
#define STATIC_IN_GDB
#endif
target_desc *
arc_create_target_description (arc_sys_type sys_type)
STATIC_IN_GDB target_desc *
arc_create_target_description (const struct arc_gdbarch_features &features)
{
/* Create a new target description. */
target_desc *tdesc = allocate_target_description ();
#ifndef IN_PROCESS_AGENT
std::string arch_name;
/* Architecture names here must match the ones in
ARCH_INFO_STRUCT in bfd/cpu-arc.c. */
if (features.isa == ARC_ISA_ARCV1 && features.reg_size == 4)
arch_name = "arc:ARC700";
else if (features.isa == ARC_ISA_ARCV2 && features.reg_size == 4)
arch_name = "arc:ARCv2";
else
{
std::string msg = string_printf
("Cannot determine architecture: ISA=%d; bitness=%d",
features.isa, 8 * features.reg_size);
gdb_assert_not_reached (msg.c_str ());
}
set_tdesc_architecture (tdesc, arch_name.c_str ());
#endif
long regnum = 0;
#ifndef IN_PROCESS_AGENT
if (sys_type == ARC_SYS_TYPE_ARCV2)
set_tdesc_architecture (tdesc, "arc:ARCv2");
else
set_tdesc_architecture (tdesc, "arc:ARC700");
#endif
if (sys_type == ARC_SYS_TYPE_ARCV2)
switch (features.isa)
{
regnum = create_feature_arc_core_v2 (tdesc, regnum);
regnum = create_feature_arc_aux_v2 (tdesc, regnum);
}
else
{
regnum = create_feature_arc_core_arcompact (tdesc, regnum);
regnum = create_feature_arc_aux_arcompact (tdesc, regnum);
case ARC_ISA_ARCV1:
regnum = create_feature_arc_v1_core (tdesc, regnum);
regnum = create_feature_arc_v1_aux (tdesc, regnum);
break;
case ARC_ISA_ARCV2:
regnum = create_feature_arc_v2_core (tdesc, regnum);
regnum = create_feature_arc_v2_aux (tdesc, regnum);
break;
default:
std::string msg = string_printf
("Cannot choose target description XML: %d", features.isa);
gdb_assert_not_reached (msg.c_str ());
}
return tdesc;
}
#ifndef GDBSERVER
/* Wrapper used by std::unordered_map to generate hash for features set. */
struct arc_gdbarch_features_hasher
{
std::size_t
operator() (const arc_gdbarch_features &features) const noexcept
{
return features.hash ();
}
};
/* Cache of previously created target descriptions, indexed by the hash
of the features set used to create them. */
static std::unordered_map<arc_gdbarch_features,
const target_desc_up,
arc_gdbarch_features_hasher> arc_tdesc_cache;
/* See arch/arc.h. */
const target_desc *
arc_lookup_target_description (const struct arc_gdbarch_features &features)
{
/* Lookup in the cache first. If found, return the pointer from the
"target_desc_up" type which is a "unique_ptr". This should be fine
as the "arc_tdesc_cache" will persist until GDB terminates. */
const auto it = arc_tdesc_cache.find (features);
if (it != arc_tdesc_cache.end ())
return it->second.get ();
target_desc *tdesc = arc_create_target_description (features);
/* Add the newly created target description to the repertoire. */
arc_tdesc_cache.emplace (features, tdesc);
return tdesc;
}
#endif /* !GDBSERVER */

View File

@ -20,29 +20,68 @@
#include "gdbsupport/tdesc.h"
/* Supported ARC system hardware types. */
enum arc_sys_type
/* Supported ARC ISAs. */
enum arc_isa
{
ARC_SYS_TYPE_ARCOMPACT = 0, /* ARC600 or ARC700 */
ARC_SYS_TYPE_ARCV2, /* ARC EM or ARC HS */
ARC_SYS_TYPE_NUM
ARC_ISA_ARCV1 = 1, /* a.k.a. ARCompact (ARC600, ARC700) */
ARC_ISA_ARCV2 /* such as ARC EM and ARC HS */
};
static inline const char *
arc_sys_type_to_str (const arc_sys_type type)
struct arc_gdbarch_features
{
switch (type)
{
case ARC_SYS_TYPE_ARCOMPACT:
return "ARC_SYS_TYPE_ARCOMPACT";
case ARC_SYS_TYPE_ARCV2:
return "ARC_SYS_TYPE_ARCV2";
default:
return "Invalid";
}
}
arc_gdbarch_features (int reg_size, arc_isa isa)
: reg_size (reg_size), isa (isa)
{}
/* Register size in bytes. Possible values are 4, and 8. A 0 indicates
an uninitialised value. */
const int reg_size;
/* See ARC_ISA enum. */
const arc_isa isa;
/* Equality operator. */
bool operator== (const struct arc_gdbarch_features &rhs) const
{
return (reg_size == rhs.reg_size && isa == rhs.isa);
}
/* Inequality operator. */
bool operator!= (const struct arc_gdbarch_features &rhs) const
{
return !(*this == rhs);
}
/* Used by std::unordered_map to hash the feature sets. The hash is
calculated in the manner below:
REG_SIZE | ISA
5-bits | 4-bits */
std::size_t hash () const noexcept
{
std::size_t val = ((reg_size & 0x1f) << 8 | (isa & 0xf) << 0);
return val;
}
};
#ifdef GDBSERVER
/* Create and return a target description that is compatible with FEATURES.
The only external client of this must be the gdbserver which manipulates
the returned data. */
target_desc *arc_create_target_description
(const struct arc_gdbarch_features &features);
#else
/* Lookup the cache for a target description matching the FEATURES.
If nothing is found, then create one and return it. */
const target_desc *arc_lookup_target_description
(const struct arc_gdbarch_features &features);
#endif /* GDBSERVER */
/* Create target description for the specified system type. */
target_desc *arc_create_target_description (arc_sys_type sys_type);
#endif /* ARCH_ARC_H */

View File

@ -1,3 +1,8 @@
2020-08-25 Shahab Vahedi <shahab@synopsys.com>
* gdb.texinfo (Synopsys ARC): Update the documentation for ARC
Features.
2020-08-07 Tom Tromey <tromey@adacore.com>
* gdb.texinfo (Ravenscar Profile): Add examples.

View File

@ -45265,40 +45265,41 @@ it should contain registers @samp{pauth_dmask} and @samp{pauth_cmask}.
@subsection ARC Features
@cindex target descriptions, ARC Features
ARC processors are highly configurable, so even core registers and their number
are not completely predetermined. In addition flags and PC registers which are
important to @value{GDBN} are not ``core'' registers in ARC. It is required
that one of the core registers features is present.
@samp{org.gnu.gdb.arc.aux-minimal} feature is mandatory.
ARC processors are so configurable that even core registers and their numbers
are not predetermined completely. Moreover, @emph{flags} and @emph{PC}
registers, which are important to @value{GDBN}, are not ``core'' registers in
ARC. Therefore, there are two features that their presence is mandatory:
@samp{org.gnu.gdb.arc.core} and @samp{org.gnu.gdb.arc.aux}.
The @samp{org.gnu.gdb.arc.core.v2} feature is required for ARC EM and ARC HS
targets with a normal register file. It should contain registers @samp{r0}
through @samp{r25}, @samp{gp}, @samp{fp}, @samp{sp}, @samp{r30}, @samp{blink},
@samp{lp_count} and @samp{pcl}. This feature may contain register @samp{ilink}
and any of extension core registers @samp{r32} through @samp{r59/acch}.
@samp{ilink} and extension core registers are not available to read/write, when
debugging GNU/Linux applications, thus @samp{ilink} is made optional.
The @samp{org.gnu.gdb.arc.core} feature is required for all targets. It must
contain registers:
The @samp{org.gnu.gdb.arc.core-reduced.v2} feature is required for ARC EM and
ARC HS targets with a reduced register file. It should contain registers
@samp{r0} through @samp{r3}, @samp{r10} through @samp{r15}, @samp{gp},
@samp{fp}, @samp{sp}, @samp{r30}, @samp{blink}, @samp{lp_count} and @samp{pcl}.
This feature may contain register @samp{ilink} and any of extension core
registers @samp{r32} through @samp{r59/acch}.
@itemize @minus
@item
@samp{r0} through @samp{r25} for normal register file targets.
@item
@samp{r0} through @samp{r3}, and @samp{r10} through @samp{r15} for reduced
register file targets.
@item
@samp{gp}, @samp{fp}, @samp{sp}, @samp{r30}@footnote{Not necessary for ARCv1.},
@samp{blink}, @samp{lp_count}, @samp{pcl}.
@end itemize
The @samp{org.gnu.gdb.arc.core.arcompact} feature is required for ARCompact
targets with a normal register file. It should contain registers @samp{r0}
through @samp{r25}, @samp{gp}, @samp{fp}, @samp{sp}, @samp{r30}, @samp{blink},
@samp{lp_count} and @samp{pcl}. This feature may contain registers
@samp{ilink1}, @samp{ilink2} and any of extension core registers @samp{r32}
through @samp{r59/acch}. @samp{ilink1} and @samp{ilink2} and extension core
registers are not available when debugging GNU/Linux applications. The only
difference with @samp{org.gnu.gdb.arc.core.v2} feature is in the names of
@samp{ilink1} and @samp{ilink2} registers and that @samp{r30} is mandatory in
ARC v2, but @samp{ilink2} is optional on ARCompact.
In case of an ARCompact target (ARCv1 ISA), the @samp{org.gnu.gdb.arc.core}
feature may contain registers @samp{ilink1} and @samp{ilink2}. While in case
of ARC EM and ARC HS targets (ARCv2 ISA), register @samp{ilink} may be present.
The difference between ARCv1 and ARCv2 is the naming of registers @emph{29th}
and @emph{30th}. They are called @samp{ilink1} and @samp{ilink2} for ARCv1 and
are optional. For ARCv2, they are called @samp{ilink} and @samp{r30} and only
@samp{ilink} is optional. The optionality of @samp{ilink*} registers is
because of their inaccessibility during user space debugging sessions.
The @samp{org.gnu.gdb.arc.aux-minimal} feature is required for all ARC
targets. It should contain registers @samp{pc} and @samp{status32}.
Extension core registers @samp{r32} through @samp{r59} are optional and their
existence depends on the configuration. When debugging GNU/Linux applications,
i.e.@: user space debugging, these core registers are not available.
The @samp{org.gnu.gdb.arc.aux} feature is required for all ARC targets. It
should at least contain @samp{pc} and @samp{status32} registers.
@node ARM Features
@subsection ARM Features

View File

@ -201,10 +201,10 @@ $(outdir)/%.dat: %.xml number-regs.xsl sort-regs.xsl gdbserver-regs.xsl
FEATURE_XMLFILES = aarch64-core.xml \
aarch64-fpu.xml \
aarch64-pauth.xml \
arc/core-v2.xml \
arc/aux-v2.xml \
arc/core-arcompact.xml \
arc/aux-arcompact.xml \
arc/v1-core.xml \
arc/v1-aux.xml \
arc/v2-core.xml \
arc/v2-aux.xml \
arm/arm-core.xml \
arm/arm-fpa.xml \
arm/arm-m-profile.xml \

View File

@ -1,14 +1,14 @@
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
Original: aux-arcompact.xml */
Original: v1-aux.xml */
#include "gdbsupport/tdesc.h"
static int
create_feature_arc_aux_arcompact (struct target_desc *result, long regnum)
create_feature_arc_v1_aux (struct target_desc *result, long regnum)
{
struct tdesc_feature *feature;
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux-minimal");
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux");
tdesc_type_with_fields *type_with_fields;
type_with_fields = tdesc_create_flags (feature, "status32_type", 4);
tdesc_add_flag (type_with_fields, 0, "H");
@ -27,5 +27,8 @@ create_feature_arc_aux_arcompact (struct target_desc *result, long regnum)
tdesc_create_reg (feature, "pc", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "status32", regnum++, 1, NULL, 32, "status32_type");
tdesc_create_reg (feature, "lp_start", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "lp_end", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "bta", regnum++, 1, NULL, 32, "code_ptr");
return regnum;
}

View File

@ -6,7 +6,7 @@
notice and this notice are preserved. -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arc.aux-minimal">
<feature name="org.gnu.gdb.arc.aux">
<flags id="status32_type" size="4">
<field name="H" start="0" end="0"/>
<field name="E" start="1" end="2"/>
@ -19,10 +19,13 @@
<field name="N" start="10" end="10"/>
<field name="Z" start="11" end="11"/>
<field name="L" start="12" end="12"/>
<field name="R" start="13" end="13"/>
<field name="R" start="13" end="13"/>
<field name="SE" start="14" end="14"/>
</flags>
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="status32" bitsize="32" type="status32_type"/>
<reg name="lp_start" bitsize="32" type="code_ptr"/>
<reg name="lp_end" bitsize="32" type="code_ptr"/>
<reg name="bta" bitsize="32" type="code_ptr"/>
</feature>

View File

@ -1,14 +1,14 @@
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
Original: core-arcompact.xml */
Original: v1-core.xml */
#include "gdbsupport/tdesc.h"
static int
create_feature_arc_core_arcompact (struct target_desc *result, long regnum)
create_feature_arc_v1_core (struct target_desc *result, long regnum)
{
struct tdesc_feature *feature;
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core.arcompact");
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core");
tdesc_create_reg (feature, "r0", regnum++, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r1", regnum++, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r2", regnum++, 1, NULL, 32, "int");
@ -38,8 +38,6 @@ create_feature_arc_core_arcompact (struct target_desc *result, long regnum)
tdesc_create_reg (feature, "gp", regnum++, 1, NULL, 32, "data_ptr");
tdesc_create_reg (feature, "fp", regnum++, 1, NULL, 32, "data_ptr");
tdesc_create_reg (feature, "sp", regnum++, 1, NULL, 32, "data_ptr");
tdesc_create_reg (feature, "ilink1", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "ilink2", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "blink", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "lp_count", regnum++, 1, NULL, 32, "uint32");
tdesc_create_reg (feature, "pcl", regnum++, 1, NULL, 32, "code_ptr");

View File

@ -6,7 +6,7 @@
notice and this notice are preserved. -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arc.core.arcompact">
<feature name="org.gnu.gdb.arc.core">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
@ -40,8 +40,6 @@
<reg name="sp" bitsize="32" type="data_ptr"/>
<!-- Code pointers. -->
<reg name="ilink1" bitsize="32" type="code_ptr"/>
<reg name="ilink2" bitsize="32" type="code_ptr"/>
<reg name="blink" bitsize="32" type="code_ptr"/>
<!-- Here goes extension core registers: r32 - r59 -->

View File

@ -1,14 +1,14 @@
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
Original: aux-v2.xml */
Original: v2-aux.xml */
#include "gdbsupport/tdesc.h"
static int
create_feature_arc_aux_v2 (struct target_desc *result, long regnum)
create_feature_arc_v2_aux (struct target_desc *result, long regnum)
{
struct tdesc_feature *feature;
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux-minimal");
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux");
tdesc_type_with_fields *type_with_fields;
type_with_fields = tdesc_create_flags (feature, "status32_type", 4);
tdesc_add_flag (type_with_fields, 0, "H");
@ -31,5 +31,8 @@ create_feature_arc_aux_v2 (struct target_desc *result, long regnum)
tdesc_create_reg (feature, "pc", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "status32", regnum++, 1, NULL, 32, "status32_type");
tdesc_create_reg (feature, "lp_start", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "lp_end", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "bta", regnum++, 1, NULL, 32, "code_ptr");
return regnum;
}

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@ -6,7 +6,7 @@
notice and this notice are preserved. -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arc.aux-minimal">
<feature name="org.gnu.gdb.arc.aux">
<flags id="status32_type" size="4">
<field name="H" start="0" end="0"/>
<field name="E" start="1" end="4"/>
@ -29,4 +29,7 @@
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="status32" bitsize="32" type="status32_type"/>
<reg name="lp_start" bitsize="32" type="code_ptr"/>
<reg name="lp_end" bitsize="32" type="code_ptr"/>
<reg name="bta" bitsize="32" type="code_ptr"/>
</feature>

View File

@ -1,14 +1,14 @@
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
Original: core-v2.xml */
Original: v2-core.xml */
#include "gdbsupport/tdesc.h"
static int
create_feature_arc_core_v2 (struct target_desc *result, long regnum)
create_feature_arc_v2_core (struct target_desc *result, long regnum)
{
struct tdesc_feature *feature;
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core.v2");
feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core");
tdesc_create_reg (feature, "r0", regnum++, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r1", regnum++, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r2", regnum++, 1, NULL, 32, "int");
@ -38,7 +38,6 @@ create_feature_arc_core_v2 (struct target_desc *result, long regnum)
tdesc_create_reg (feature, "gp", regnum++, 1, NULL, 32, "data_ptr");
tdesc_create_reg (feature, "fp", regnum++, 1, NULL, 32, "data_ptr");
tdesc_create_reg (feature, "sp", regnum++, 1, NULL, 32, "data_ptr");
tdesc_create_reg (feature, "ilink", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "r30", regnum++, 1, NULL, 32, "int");
tdesc_create_reg (feature, "blink", regnum++, 1, NULL, 32, "code_ptr");
tdesc_create_reg (feature, "lp_count", regnum++, 1, NULL, 32, "uint32");

View File

@ -6,7 +6,7 @@
notice and this notice are preserved. -->
<!DOCTYPE target SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arc.core.v2">
<feature name="org.gnu.gdb.arc.core">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
@ -42,12 +42,11 @@
<!-- Code pointers. R30 is general purpose, but it used to be ILINK2 in
ARCompact, thus its odd position in between of special purpose registers.
GCC does't use this register, so it isn't a member of a general group. -->
<reg name="ilink" bitsize="32" type="code_ptr"/>
<reg name="r30" bitsize="32" group=""/>
<reg name="blink" bitsize="32" type="code_ptr"/>
<!-- Here goes extension core registers: r32 - r57. -->
<!-- Here goes ACCL/ACCH registers, r58, r59. -->
<!-- Extension core registers: r32 - r57. -->
<!-- ACCL/ACCH registers: r58, r59. -->
<!-- Loop counter. -->
<reg name="lp_count" bitsize="32" type="uint32"/>

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@ -1,3 +1,7 @@
2020-08-25 Shahab Vahedi <shahab@synopsys.com>
* gdb.arch/arc-tdesc-cpu.xml: Use new feature names.
2020-08-25 Simon Marchi <simon.marchi@polymtl.ca>
PR gdb/26532

View File

@ -9,7 +9,7 @@
<target>
<architecture>arc:HS</architecture>
<feature name="org.gnu.gdb.arc.core.v2">
<feature name="org.gnu.gdb.arc.core">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
@ -46,7 +46,7 @@
<reg name="pcl" bitsize="32"/>
</feature>
<feature name="org.gnu.gdb.arc.aux-minimal">
<feature name="org.gnu.gdb.arc.aux">
<reg name="pc" bitsize="32"/>
<reg name="status32" bitsize="32"/>
</feature>