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Fix opcode for 64-bit jecxz

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gas/testsuite/

	PR gas/14859
	* gas/i386/x86-64-opcode.s: Add jecxz.
	* gas/i386/x86-64-opcode.d: Updated.

opcodes/

	PR gas/14859
	* i386-opc.tbl: Fix opcode for 64-bit jecxz.
	* i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu 2012-11-20 14:21:33 +00:00
parent 0b7fe784ac
commit 9b30cccca9
6 changed files with 18 additions and 2 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2012-11-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/14859
* gas/i386/x86-64-opcode.s: Add jecxz.
* gas/i386/x86-64-opcode.d: Updated.
2012-11-20 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the

1
gas/testsuite/gas/i386/x86-64-opcode.d
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@ -296,4 +296,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 07 sysret
[ ]*[a-f0-9]+: 0f 01 f8 swapgs
[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
[ ]*[a-f0-9]+: 67 e3 ff jecxz 0x49d
#pass

2
gas/testsuite/gas/i386/x86-64-opcode.s
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@ -424,3 +424,5 @@
swapgs # -- -- -- -- 0F 01 f8
pushw $0x2222
jecxz .+2

7
opcodes/ChangeLog
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@ -1,3 +1,10 @@
2012-11-20 Kirill Yukhin <kirill.yukhin@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
PR gas/14859
* i386-opc.tbl: Fix opcode for 64-bit jecxz.
* i386-tbl.h: Regenerated.
2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.txt: Fix srstu and strag opcodes.

2
opcodes/i386-opc.tbl
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@ -390,7 +390,7 @@ jg, 1, 0x7f, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,
// jcxz vs. jecxz is chosen on the basis of the address size prefix.
jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
jecxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
jecxz, 1, 0x67e3, None, 2, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S }
jecxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S }
jrcxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp8|Disp32|Disp32S }
// The loop instructions also use the address size prefix to select

2
opcodes/i386-tbl.h
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@ -3417,7 +3417,7 @@ const insn_template i386_optab[] =
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "jecxz", 1, 0x67e3, None, 2,
{ "jecxz", 1, 0xe3, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,