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2003-06-27 Michael Snyder <msnyder@redhat.com>

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* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
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Michael Snyder 2003-07-23 21:17:33 +00:00
parent 15dee5d561
commit 9e1d0fc1a1
2 changed files with 2 additions and 1 deletions
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1
sim/sh/ChangeLog
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@ -4,6 +4,7 @@
2003-06-27 Michael Snyder <msnyder@redhat.com> 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
* gencode.c (gensim_caselist): The movy instructions use * gencode.c (gensim_caselist): The movy instructions use
registers R6 and R7 (not R4 and R5 like the movx insns). registers R6 and R7 (not R4 and R5 like the movx insns).

2
sim/sh/gencode.c
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@ -1259,7 +1259,7 @@ op movsxy_tab[] =
"R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;", "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
"iword &= 0xfd53; goto top;", "iword &= 0xfd53; goto top;",
}, },
{ "n", "n8","movx.w <DSP_Aa>,@<REG_x>+REG_8","111100xxaa101000", { "n", "n8","movx.w <DSP_Aa>,@<REG_x>+REG_8","111100xxaa101100",
"WWAT (R[n], DSP_R (m) >> 16);", "WWAT (R[n], DSP_R (m) >> 16);",
"R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];", "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
"iword &= 0xfd53; goto top;", "iword &= 0xfd53; goto top;",