Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT.

binutils * objdump.c (is_significant_symbol_name): New function.
	(remove_useless_symbols): Do not remove significanr symbols.
	(find_symbol_for_address): If an exact match for the specified
	address has not been found, try scanning the dynamic relocs to see
	if one of these matches the address.  If so, use the symbol
	associated with the reloc.
	(objdump_print_addr_with_symbol): Do not print offsets to symbols
	with no value.
	(disassemble_section): Only use dynamic relocs if the user
	requested this.
	(disassemble_data): Always load dynamic relocs if they are
	available.

ld	* ld-aarch64/emit-relocs-515-be.d: Adjust output to match change
	in objdump.
	* ld-aarch64/emit-relocs-515.d: Likewise.
	* ld-aarch64/emit-relocs-516-be.d: Likewise.
	* ld-aarch64/emit-relocs-516.d: Likewise.
	* ld-aarch64/farcall-b-plt.d: Likewise.
	* ld-aarch64/farcall-bl-plt.d: Likewise.
	* ld-aarch64/gc-plt-relocs.d: Likewise.
	* ld-aarch64/tls-desc-ie.d: Likewise.
	* ld-aarch64/tls-tiny-desc.d: Likewise.
	* ld-aarch64/tls-tiny-gd.d: Likewise.
	* ld-aarch64/tls-tiny-ie.d: Likewise.
	* ld-arm/arm-app-abs32.d: Likewise.
	* ld-arm/arm-app.d: Likewise.
	* ld-arm/arm-lib-plt32.d: Likewise.
	* ld-arm/arm-lib.d: Likewise.
	* ld-arm/armthumb-lib.d: Likewise.
	* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
	* ld-arm/farcall-mixed-app-v5.d: Likewise.
	* ld-arm/farcall-mixed-app.d: Likewise.
	* ld-arm/farcall-mixed-app2.d: Likewise.
	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
	* ld-arm/farcall-mixed-lib.d: Likewise.
	* ld-arm/ifunc-10.dd: Likewise.
	* ld-arm/ifunc-14.dd: Likewise.
	* ld-arm/ifunc-15.dd: Likewise.
	* ld-arm/ifunc-3.dd: Likewise.
	* ld-arm/ifunc-4.dd: Likewise.
	* ld-arm/ifunc-9.dd: Likewise.
	* ld-arm/long-plt-format.d: Likewise.
	* ld-arm/mixed-app-v5.d: Likewise.
	* ld-arm/mixed-app.d: Likewise.
	* ld-arm/mixed-lib.d: Likewise.
	* ld-arm/tls-lib-loc.d: Likewise.
	* ld-cris/dso-pltdis1.d: Likewise.
	* ld-cris/dso-pltdis2.d: Likewise.
	* ld-cris/dso12-pltdis.d: Likewise.
	* ld-elf/symbolic-func.r: Likewise.
	* ld-frv/fdpic-pie-1.d: Likewise.
	* ld-frv/fdpic-pie-2.d: Likewise.
	* ld-frv/fdpic-pie-6.d: Likewise.
	* ld-frv/fdpic-pie-7.d: Likewise.
	* ld-frv/fdpic-pie-8.d: Likewise.
	* ld-frv/fdpic-shared-1.d: Likewise.
	* ld-frv/fdpic-shared-2.d: Likewise.
	* ld-frv/fdpic-shared-3.d: Likewise.
	* ld-frv/fdpic-shared-4.d: Likewise.
	* ld-frv/fdpic-shared-5.d: Likewise.
	* ld-frv/fdpic-shared-6.d: Likewise.
	* ld-frv/fdpic-shared-7.d: Likewise.
	* ld-frv/fdpic-shared-8.d: Likewise.
	* ld-frv/fdpic-shared-local-2.d: Likewise.
	* ld-frv/fdpic-shared-local-8.d: Likewise.
	* ld-frv/fdpic-static-1.d: Likewise.
	* ld-frv/fdpic-static-2.d: Likewise.
	* ld-frv/fdpic-static-6.d: Likewise.
	* ld-frv/fdpic-static-7.d: Likewise.
	* ld-frv/fdpic-static-8.d: Likewise.
	* ld-frv/tls-dynamic-2.d: Likewise.
	* ld-frv/tls-initial-shared-2.d: Likewise.
	* ld-frv/tls-relax-shared-2.d: Likewise.
	* ld-frv/tls-shared-2.d: Likewise.
	* ld-i386/plt-nacl.pd: Likewise.
	* ld-i386/plt-pic-nacl.pd: Likewise.
	* ld-i386/plt-pic.pd: Likewise.
	* ld-i386/plt.pd: Likewise.
	* ld-i386/pr19636-1d-nacl.d: Likewise.
	* ld-i386/pr19636-1d.d: Likewise.
	* ld-i386/pr19636-2c-nacl.d: Likewise.
	* ld-i386/pr19636-2c.d: Likewise.
	* ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* ld-ifunc/pr17154-i386.d: Likewise.
	* ld-ifunc/pr17154-x86-64.d: Likewise.
	* ld-m68k/plt1-68020.d: Likewise.
	* ld-m68k/plt1-cpu32.d: Likewise.
	* ld-m68k/plt1-isab.d: Likewise.
	* ld-m68k/plt1-isac.d: Likewise.
	* ld-metag/shared.d: Likewise.
	* ld-metag/stub_pic_app.d: Likewise.
	* ld-metag/stub_pic_shared.d: Likewise.
	* ld-metag/stub_shared.d: Likewise.
	* ld-s390/tlsbin_64.dd: Likewise.
	* ld-s390/tlspic_64.dd: Likewise.
	* ld-tic6x/shlib-1.dd: Likewise.
	* ld-tic6x/shlib-1b.dd: Likewise.
	* ld-tic6x/shlib-1rb.dd: Likewise.
	* ld-tic6x/shlib-app-1.dd: Likewise.
	* ld-tic6x/shlib-app-1b.dd: Likewise.
	* ld-tic6x/shlib-app-1r.dd: Likewise.
	* ld-tic6x/shlib-app-1rb.dd: Likewise.
	* ld-tic6x/shlib-noindex.dd: Likewise.
	* ld-vax-elf/export-class-data.dd: Likewise.
	* ld-vax-elf/plt-local-lib.dd: Likewise.
	* ld-vax-elf/plt-local.dd: Likewise.
	* ld-x86-64/bnd-ifunc-2.d: Likewise.
	* ld-x86-64/bnd-plt-1.d: Likewise.
	* ld-x86-64/gotpcrel1.dd: Likewise.
	* ld-x86-64/libno-plt-1b.dd: Likewise.
	* ld-x86-64/load1c-nacl.d: Likewise.
	* ld-x86-64/load1c.d: Likewise.
	* ld-x86-64/load1d-nacl.d: Likewise.
	* ld-x86-64/load1d.d: Likewise.
	* ld-x86-64/mov1a.d: Likewise.
	* ld-x86-64/mov1b.d: Likewise.
	* ld-x86-64/mov1c.d: Likewise.
	* ld-x86-64/mov1d.d: Likewise.
	* ld-x86-64/mov2a.d: Likewise.
	* ld-x86-64/mov2b.d: Likewise.
	* ld-x86-64/mov2c.d: Likewise.
	* ld-x86-64/mov2d.d: Likewise.
	* ld-x86-64/mpx3.dd: Likewise.
	* ld-x86-64/mpx4.dd: Likewise.
	* ld-x86-64/no-plt-1a.dd: Likewise.
	* ld-x86-64/no-plt-1b.dd: Likewise.
	* ld-x86-64/no-plt-1c.dd: Likewise.
	* ld-x86-64/no-plt-1e.dd: Likewise.
	* ld-x86-64/no-plt-1f.dd: Likewise.
	* ld-x86-64/no-plt-1g.dd: Likewise.
	* ld-x86-64/plt-main-bnd.dd: Likewise.
	* ld-x86-64/plt-nacl.pd: Likewise.
	* ld-x86-64/plt.pd: Likewise.
	* ld-x86-64/pr18591.d: Likewise.
	* ld-x86-64/pr19609-1c.d: Likewise.
	* ld-x86-64/pr19609-1e.d: Likewise.
	* ld-x86-64/pr19609-1j.d: Likewise.
	* ld-x86-64/pr19609-1l.d: Likewise.
	* ld-x86-64/pr19609-1m.d: Likewise.
	* ld-x86-64/pr19609-5b.d: Likewise.
	* ld-x86-64/pr19609-5c.d: Likewise.
	* ld-x86-64/pr19609-5e.d: Likewise.
	* ld-x86-64/pr19609-6b.d: Likewise.
	* ld-x86-64/pr19609-7b.d: Likewise.
	* ld-x86-64/pr19609-7d.d: Likewise.
	* ld-x86-64/pr19636-2d.d: Likewise.
	* ld-x86-64/pr20093-1.d: Likewise.
	* ld-x86-64/pr20093-2.d: Likewise.
	* ld-x86-64/pr20253-1b.d: Likewise.
	* ld-x86-64/pr20253-1d.d: Likewise.
	* ld-x86-64/pr20253-1f.d: Likewise.
	* ld-x86-64/pr20253-1h.d: Likewise.
	* ld-x86-64/pr20253-1j.d: Likewise.
	* ld-x86-64/pr20253-1l.d: Likewise.
	* ld-x86-64/protected3.d: Likewise.
	* ld-x86-64/tlsbin.dd: Likewise.
	* ld-x86-64/tlsbin2.dd: Likewise.
	* ld-x86-64/tlsbindesc.dd: Likewise.
	* ld-x86-64/tlsdesc-nacl.pd: Likewise.
	* ld-x86-64/tlsdesc.dd: Likewise.
	* ld-x86-64/tlsdesc.pd: Likewise.
	* ld-x86-64/tlsgd10.dd: Likewise.
	* ld-x86-64/tlsgd5.dd: Likewise.
	* ld-x86-64/tlsgd6.dd: Likewise.
	* ld-x86-64/tlsgd8.dd: Likewise.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.
	* ld-x86-64/tlspic2.dd: Likewise.

2016-10-11  Nick Clifton  <nickc@redhat.com>

	PR ld/20535
	* emultempl/elf32.em (_search_needed): Add support for pseudo
	environment variables supported by ld.so.  Namely $ORIGIN, $LIB
	and $PLATFORM.
	* configure.ac: Add getauxval to list AC_CHECK_FUNCS list.
	* config.in: Regenerate.
	* configure: Regenerate.

2016-10-11  Alan Modra  <amodra@gmail.com>

	* ldlang.c (lang_do_assignments_1): Descend into output section
	statements that do not yet have bfd sections.  Set symbol section
	temporarily for symbols defined in such statements to the undefined
	section.  Don't error on data or reloc statements until final phase.
	* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
	in expld.section.
	* testsuite/ld-mmix/bpo-10.d: Adjust.
	* testsuite/ld-mmix/bpo-11.d: Adjust.

2016-10-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* emulparams/elf64_s390.sh: Move binary start to 16M.
	* testsuite/ld-s390/tlsbin_64.dd: Adjust testcases accordingly.
	* testsuite/ld-s390/tlsbin_64.rd: Likewise.

2016-10-07  Alan Modra  <amodra@gmail.com>

	* ldexp.c (MAX): Define.
	(exp_unop, exp_binop, exp_trinop): Alloc at least enough for
	etree_type.value.

2016-10-07  Alan Modra  <amodra@gmail.com>

	* testsuite/lib/ld-lib.exp (is_generic_elf): New, extracted from..
	* testsuite/ld-elf/elf.exp: ..here.

2016-10-06  Ludovic Court?s  <ludo@gnu.org>

	* emulparams/elf32bmipn32-defs.sh: Shift quote of
	"x$EMULATION_NAME" to the left to work around
	<http://ftp.gnu.org/gnu/bash/bash-4.2-patches/bash42-007>.

2016-10-06  Alan Modra  <amodra@gmail.com>

	* lexsup.c: Spell fall through comments consistently and add
	missing fall through comments.

2016-10-06  Alan Modra  <amodra@gmail.com>

	* plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning
	by adding return.

2016-10-04  Alan Modra  <amodra@gmail.com>

	* ld.texinfo (Expression Section): Update result of arithmetic
	expressions.
	* ldexp.c (arith_result_section): New function.
	(fold_binary): Use it.

2016-10-04  Alan Modra  <amodra@gmail.com>

	* ldexp.c (exp_value_fold): New function.
	(exp_unop, exp_binop, exp_trinop): Use it.

2016-09-30  Alan Modra  <amodra@gmail.com>

	* scripttempl/v850.sc: Don't reference __ctbp, __ep, __gp when
	not relocating.
	* scripttempl/v850_rh850.sc: Likewise.

2016-09-30  Alan Modra  <amodra@gmail.com>

	PR ld/20528
	* testsuite/ld-elf/pr20528a.d: xfail generic elf targets.  Allow
	multiple .text sections for hppa-linux.
	* testsuite/ld-elf/pr20528b.d: Likewise.

2016-09-30  Alan Modra  <amodra@gmail.com>

	* ldmain.c (default_bfd_error_handler): New function pointer.
	(ld_bfd_error_handler): New function.
	(main): Arrange to call it on bfd errors/warnings.
	(ld_bfd_assert_handler): Enable tail call.

2016-09-30  Alan Modra  <amodra@gmail.com>

	* ldlang.c (ignore_bfd_errors): Update params.

2016-09-29  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/20528
	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
	merge 2 sections with different SHF_EXCLUDE.
	* testsuite/ld-elf/pr20528a.d: New file.
	* testsuite/ld-elf/pr20528a.s: Likewise.
	* testsuite/ld-elf/pr20528b.d: Likewise.
	* testsuite/ld-elf/pr20528b.s: Likewise.

2016-09-28  Christophe Lyon  <christophe.lyon@linaro.org>

	PR ld/20608
	* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
	* testsuite/ld-arm/farcall-mixed-app2.d: New file.
	* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
	* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
	* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.

2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>

	* Makefile.in: Regenerate.
	* configure: Likewise.

2016-09-26  Alan Modra  <amodra@gmail.com>

	* testsuite/ld-powerpc/attr-gnu-4-4.s: Delete.
	* testsuite/ld-powerpc/attr-gnu-4-14.d: Delete.
	* testsuite/ld-powerpc/attr-gnu-4-24.d: Delete.
	* testsuite/ld-powerpc/attr-gnu-4-34.d: Delete.
	* testsuite/ld-powerpc/attr-gnu-4-41.d: Delete.
	* testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning.
	* testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output.
	* testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise.
	* testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.

2016-09-23  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>

	PR ld/20595
	* testsuite/ld-arm/unwind-4.d: Add -q option to linker command
	line and -r option to objdump command line.  Match emitted relocs
	to make sure that superflous relocs are not generated.

2016-09-23  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* emulparams/elf64_s390.sh: Change TEXT_START_ADDR to 256MB.
	* testsuite/ld-s390/tlsbin_64.dd: Adjust testcase accordingly.
	* testsuite/ld-s390/tlsbin_64.rd: Likewise.

2016-09-22  Nick Clifton  <nickc@redhat.com>

	* emultempl/elf32.em (_try_needed): In verbose mode, report failed
	attempts to find a needed library.

2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>

	* testsuite/ld-aarch64/emit-relocs-28.d: Expect spaces after ","
	in addresses.
	* testsuite/ld-aarch64/emit-relocs-301-be.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-301.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-302-be.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-302.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-310-be.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-310.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-313.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-515-be.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-515.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-516-be.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-516.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-531.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-532.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-533.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-535.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-536.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-537.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-538.d: Likewise.
	* testsuite/ld-aarch64/erratum835769.d: Likewise.
	* testsuite/ld-aarch64/erratum843419.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
	* testsuite/ld-aarch64/gc-plt-relocs.d: Likewise.
	* testsuite/ld-aarch64/ifunc-21.d: Likewise.
	* testsuite/ld-aarch64/ifunc-7c.d: Likewise.
	* testsuite/ld-aarch64/tls-desc-ie.d: Likewise.
	* testsuite/ld-aarch64/tls-large-desc-be.d: Likewise.
	* testsuite/ld-aarch64/tls-large-desc.d: Likewise.
	* testsuite/ld-aarch64/tls-large-ie-be.d: Likewise.
	* testsuite/ld-aarch64/tls-large-ie.d: Likewise.
	* testsuite/ld-aarch64/tls-relax-all.d: Likewise.
	* testsuite/ld-aarch64/tls-relax-gd-ie.d: Likewise.
	* testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d: Likewise.
	* testsuite/ld-aarch64/tls-relax-gdesc-ie.d: Likewise.
	* testsuite/ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise.
	* testsuite/ld-aarch64/tls-relax-large-desc-ie.d: Likewise.
	* testsuite/ld-aarch64/tls-tiny-desc.d: Likewise.
	* testsuite/ld-aarch64/tls-tiny-gd.d: Likewise.

gas	* gas/arm/tls.d: Adjust output to match change in objdump.
This commit is contained in:
Nick Clifton 2016-10-11 13:50:10 +01:00
parent 199fa1b708
commit a24bb4f0cc
165 changed files with 934 additions and 688 deletions

View File

@ -1,3 +1,18 @@
2016-10-11 Nick Clifton <nickc@redhat.com>
* objdump.c (is_significant_symbol_name): New function.
(remove_useless_symbols): Do not remove significanr symbols.
(find_symbol_for_address): If an exact match for the specified
address has not been found, try scanning the dynamic relocs to see
if one of these matches the address. If so, use the symbol
associated with the reloc.
(objdump_print_addr_with_symbol): Do not print offsets to symbols
with no value.
(disassemble_section): Only use dynamic relocs if the user
requested this.
(disassemble_data): Always load dynamic relocs if they are
available.
2016-10-06 Alan Modra <amodra@gmail.com>
* dlltool.c: Spell fall through comments consistently.

View File

@ -615,6 +615,18 @@ slurp_dynamic_symtab (bfd *abfd)
return sy;
}
/* Some symbol names are significant and should be kept in the
table of sorted symbol names, even if they are marked as
debugging/section symbols. */
static bfd_boolean
is_significant_symbol_name (const char * name)
{
return strcmp (name, ".plt") == 0
|| strcmp (name, ".got") == 0
|| strcmp (name, ".plt.got") == 0;
}
/* Filter out (in place) symbols that are useless for disassembly.
COUNT is the number of elements in SYMBOLS.
Return the number of useful symbols. */
@ -630,7 +642,8 @@ remove_useless_symbols (asymbol **symbols, long count)
if (sym->name == NULL || sym->name[0] == '\0')
continue;
if (sym->flags & (BSF_DEBUGGING | BSF_SECTION_SYM))
if ((sym->flags & (BSF_DEBUGGING | BSF_SECTION_SYM))
&& ! is_significant_symbol_name (sym->name))
continue;
if (bfd_is_und_section (sym->section)
|| bfd_is_com_section (sym->section))
@ -913,11 +926,14 @@ find_symbol_for_address (bfd_vma vma,
/* The symbol we want is now in min, the low end of the range we
were searching. If there are several symbols with the same
value, we want the first one. */
value, we want the first (non-section/non-debugging) one. */
thisplace = min;
while (thisplace > 0
&& (bfd_asymbol_value (sorted_syms[thisplace])
== bfd_asymbol_value (sorted_syms[thisplace - 1])))
== bfd_asymbol_value (sorted_syms[thisplace - 1]))
&& ((sorted_syms[thisplace - 1]->flags
& (BSF_SECTION_SYM | BSF_DEBUGGING)) == 0)
)
--thisplace;
/* Prefer a symbol in the current section if we have multple symbols
@ -1003,6 +1019,41 @@ find_symbol_for_address (bfd_vma vma,
return NULL;
}
/* If we have not found an exact match for the specified address
and we have dynamic relocations available, then we can produce
a better result by matching a relocation to the address and
using the symbol associated with that relocation. */
if (!want_section
&& aux->dynrelbuf != NULL
&& sorted_syms[thisplace]->value != vma
/* If we have matched a synthetic symbol, then stick with that. */
&& (sorted_syms[thisplace]->flags & BSF_SYNTHETIC) == 0)
{
long rel_count;
arelent ** rel_pp;
for (rel_count = aux->dynrelcount, rel_pp = aux->dynrelbuf;
rel_count--;)
{
arelent * rel = rel_pp[rel_count];
if (rel->address == vma
&& rel->sym_ptr_ptr != NULL
/* Absolute relocations do not provide a more helpful symbolic address. */
&& ! bfd_is_abs_section ((* rel->sym_ptr_ptr)->section))
{
if (place != NULL)
* place = thisplace;
return * rel->sym_ptr_ptr;
}
/* We are scanning backwards, so if we go below the target address
we have failed. */
if (rel_pp[rel_count]->address < vma)
break;
}
}
if (place != NULL)
*place = thisplace;
@ -1040,8 +1091,21 @@ objdump_print_addr_with_sym (bfd *abfd, asection *sec, asymbol *sym,
else
{
(*inf->fprintf_func) (inf->stream, " <");
objdump_print_symname (abfd, inf, sym);
if (bfd_asymbol_value (sym) > vma)
if (bfd_asymbol_value (sym) == vma)
;
/* Undefined symbols in an executables and dynamic objects do not have
a value associated with them, so it does not make sense to display
an offset relative to them. Normally we would not be provided with
this kind of symbol, but the target backend might choose to do so,
and the code in find_symbol_for_address might return an as yet
unresolved symbol associated with a dynamic reloc. */
else if ((bfd_get_file_flags (abfd) & (EXEC_P | DYNAMIC))
&& bfd_is_und_section (sym->section))
;
else if (bfd_asymbol_value (sym) > vma)
{
(*inf->fprintf_func) (inf->stream, "-0x");
objdump_print_value (bfd_asymbol_value (sym) - vma, inf, TRUE);
@ -1051,6 +1115,7 @@ objdump_print_addr_with_sym (bfd *abfd, asection *sec, asymbol *sym,
(*inf->fprintf_func) (inf->stream, "+0x");
objdump_print_value (vma - bfd_asymbol_value (sym), inf, TRUE);
}
(*inf->fprintf_func) (inf->stream, ">");
}
@ -2006,7 +2071,7 @@ disassemble_section (bfd *abfd, asection *section, void *inf)
/* Decide which set of relocs to use. Load them if necessary. */
paux = (struct objdump_disasm_info *) pinfo->application_data;
if (paux->dynrelbuf)
if (paux->dynrelbuf && dump_dynamic_reloc_info)
{
rel_pp = paux->dynrelbuf;
rel_count = paux->dynrelcount;
@ -2283,13 +2348,11 @@ disassemble_data (bfd *abfd)
/* Allow the target to customize the info structure. */
disassemble_init_for_target (& disasm_info);
/* Pre-load the dynamic relocs if we are going
to be dumping them along with the disassembly. */
if (dump_dynamic_reloc_info)
/* Pre-load the dynamic relocs as we may need them during the disassembly. */
{
long relsize = bfd_get_dynamic_reloc_upper_bound (abfd);
if (relsize < 0)
if (relsize < 0 && dump_dynamic_reloc_info)
bfd_fatal (bfd_get_filename (abfd));
if (relsize > 0)

View File

@ -1,3 +1,7 @@
2016-10-11 Nick Clifton <nickc@redhat.com>
* gas/arm/tls.d: Adjust output to match change in objdump.
2016-10-11 Jiong Wang <jiong.wang@arm.com>
PR target/20666

View File

@ -15,7 +15,7 @@ Disassembly of section .text:
0: e1a00000 nop ; .*
0: R_ARM_TLS_DESCSEQ af
4: e59f0014 ldr r0, \[pc, #20\] ; 20 .*
8: fa000000 blx 8 <ae\+.*>
8: fa000000 blx 8 <ae.*>
8: R_ARM_TLS_CALL ae
c: e1a00000 nop ; .*
0+10 <.arm_pool>:
@ -34,7 +34,7 @@ Disassembly of section .text:
26: 46c0 nop ; .*
26: R_ARM_THM_TLS_DESCSEQ tf
28: 4805 ldr r0, \[pc, #20\] ; \(40 .*\)
2a: f000 e800 blx 4 <te\+0x4>
2a: f000 e800 blx 4 <te.*>
2a: R_ARM_THM_TLS_CALL te
2e: 46c0 nop ; .*
30: 00000002 .word 0x00000002

View File

@ -1,3 +1,167 @@
2016-10-11 Nick Clifton <nickc@redhat.com>
* ld-aarch64/emit-relocs-515-be.d: Adjust output to match change
in objdump.
* ld-aarch64/emit-relocs-515.d: Likewise.
* ld-aarch64/emit-relocs-516-be.d: Likewise.
* ld-aarch64/emit-relocs-516.d: Likewise.
* ld-aarch64/farcall-b-plt.d: Likewise.
* ld-aarch64/farcall-bl-plt.d: Likewise.
* ld-aarch64/gc-plt-relocs.d: Likewise.
* ld-aarch64/tls-desc-ie.d: Likewise.
* ld-aarch64/tls-tiny-desc.d: Likewise.
* ld-aarch64/tls-tiny-gd.d: Likewise.
* ld-aarch64/tls-tiny-ie.d: Likewise.
* ld-arm/arm-app-abs32.d: Likewise.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
* ld-arm/farcall-mixed-app-v5.d: Likewise.
* ld-arm/farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-app2.d: Likewise.
* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
* ld-arm/ifunc-10.dd: Likewise.
* ld-arm/ifunc-14.dd: Likewise.
* ld-arm/ifunc-15.dd: Likewise.
* ld-arm/ifunc-3.dd: Likewise.
* ld-arm/ifunc-4.dd: Likewise.
* ld-arm/ifunc-9.dd: Likewise.
* ld-arm/long-plt-format.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
* ld-arm/tls-lib-loc.d: Likewise.
* ld-cris/dso-pltdis1.d: Likewise.
* ld-cris/dso-pltdis2.d: Likewise.
* ld-cris/dso12-pltdis.d: Likewise.
* ld-elf/symbolic-func.r: Likewise.
* ld-frv/fdpic-pie-1.d: Likewise.
* ld-frv/fdpic-pie-2.d: Likewise.
* ld-frv/fdpic-pie-6.d: Likewise.
* ld-frv/fdpic-pie-7.d: Likewise.
* ld-frv/fdpic-pie-8.d: Likewise.
* ld-frv/fdpic-shared-1.d: Likewise.
* ld-frv/fdpic-shared-2.d: Likewise.
* ld-frv/fdpic-shared-3.d: Likewise.
* ld-frv/fdpic-shared-4.d: Likewise.
* ld-frv/fdpic-shared-5.d: Likewise.
* ld-frv/fdpic-shared-6.d: Likewise.
* ld-frv/fdpic-shared-7.d: Likewise.
* ld-frv/fdpic-shared-8.d: Likewise.
* ld-frv/fdpic-shared-local-2.d: Likewise.
* ld-frv/fdpic-shared-local-8.d: Likewise.
* ld-frv/fdpic-static-1.d: Likewise.
* ld-frv/fdpic-static-2.d: Likewise.
* ld-frv/fdpic-static-6.d: Likewise.
* ld-frv/fdpic-static-7.d: Likewise.
* ld-frv/fdpic-static-8.d: Likewise.
* ld-frv/tls-dynamic-2.d: Likewise.
* ld-frv/tls-initial-shared-2.d: Likewise.
* ld-frv/tls-relax-shared-2.d: Likewise.
* ld-frv/tls-shared-2.d: Likewise.
* ld-i386/plt-nacl.pd: Likewise.
* ld-i386/plt-pic-nacl.pd: Likewise.
* ld-i386/plt-pic.pd: Likewise.
* ld-i386/plt.pd: Likewise.
* ld-i386/pr19636-1d-nacl.d: Likewise.
* ld-i386/pr19636-1d.d: Likewise.
* ld-i386/pr19636-2c-nacl.d: Likewise.
* ld-i386/pr19636-2c.d: Likewise.
* ld-ifunc/ifunc-21-x86-64.d: Likewise.
* ld-ifunc/ifunc-22-x86-64.d: Likewise.
* ld-ifunc/pr17154-i386.d: Likewise.
* ld-ifunc/pr17154-x86-64.d: Likewise.
* ld-m68k/plt1-68020.d: Likewise.
* ld-m68k/plt1-cpu32.d: Likewise.
* ld-m68k/plt1-isab.d: Likewise.
* ld-m68k/plt1-isac.d: Likewise.
* ld-metag/shared.d: Likewise.
* ld-metag/stub_pic_app.d: Likewise.
* ld-metag/stub_pic_shared.d: Likewise.
* ld-metag/stub_shared.d: Likewise.
* ld-s390/tlsbin_64.dd: Likewise.
* ld-s390/tlspic_64.dd: Likewise.
* ld-tic6x/shlib-1.dd: Likewise.
* ld-tic6x/shlib-1b.dd: Likewise.
* ld-tic6x/shlib-1rb.dd: Likewise.
* ld-tic6x/shlib-app-1.dd: Likewise.
* ld-tic6x/shlib-app-1b.dd: Likewise.
* ld-tic6x/shlib-app-1r.dd: Likewise.
* ld-tic6x/shlib-app-1rb.dd: Likewise.
* ld-tic6x/shlib-noindex.dd: Likewise.
* ld-vax-elf/export-class-data.dd: Likewise.
* ld-vax-elf/plt-local-lib.dd: Likewise.
* ld-vax-elf/plt-local.dd: Likewise.
* ld-x86-64/bnd-ifunc-2.d: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
* ld-x86-64/gotpcrel1.dd: Likewise.
* ld-x86-64/libno-plt-1b.dd: Likewise.
* ld-x86-64/load1c-nacl.d: Likewise.
* ld-x86-64/load1c.d: Likewise.
* ld-x86-64/load1d-nacl.d: Likewise.
* ld-x86-64/load1d.d: Likewise.
* ld-x86-64/mov1a.d: Likewise.
* ld-x86-64/mov1b.d: Likewise.
* ld-x86-64/mov1c.d: Likewise.
* ld-x86-64/mov1d.d: Likewise.
* ld-x86-64/mov2a.d: Likewise.
* ld-x86-64/mov2b.d: Likewise.
* ld-x86-64/mov2c.d: Likewise.
* ld-x86-64/mov2d.d: Likewise.
* ld-x86-64/mpx3.dd: Likewise.
* ld-x86-64/mpx4.dd: Likewise.
* ld-x86-64/no-plt-1a.dd: Likewise.
* ld-x86-64/no-plt-1b.dd: Likewise.
* ld-x86-64/no-plt-1c.dd: Likewise.
* ld-x86-64/no-plt-1e.dd: Likewise.
* ld-x86-64/no-plt-1f.dd: Likewise.
* ld-x86-64/no-plt-1g.dd: Likewise.
* ld-x86-64/plt-main-bnd.dd: Likewise.
* ld-x86-64/plt-nacl.pd: Likewise.
* ld-x86-64/plt.pd: Likewise.
* ld-x86-64/pr18591.d: Likewise.
* ld-x86-64/pr19609-1c.d: Likewise.
* ld-x86-64/pr19609-1e.d: Likewise.
* ld-x86-64/pr19609-1j.d: Likewise.
* ld-x86-64/pr19609-1l.d: Likewise.
* ld-x86-64/pr19609-1m.d: Likewise.
* ld-x86-64/pr19609-5b.d: Likewise.
* ld-x86-64/pr19609-5c.d: Likewise.
* ld-x86-64/pr19609-5e.d: Likewise.
* ld-x86-64/pr19609-6b.d: Likewise.
* ld-x86-64/pr19609-7b.d: Likewise.
* ld-x86-64/pr19609-7d.d: Likewise.
* ld-x86-64/pr19636-2d.d: Likewise.
* ld-x86-64/pr20093-1.d: Likewise.
* ld-x86-64/pr20093-2.d: Likewise.
* ld-x86-64/pr20253-1b.d: Likewise.
* ld-x86-64/pr20253-1d.d: Likewise.
* ld-x86-64/pr20253-1f.d: Likewise.
* ld-x86-64/pr20253-1h.d: Likewise.
* ld-x86-64/pr20253-1j.d: Likewise.
* ld-x86-64/pr20253-1l.d: Likewise.
* ld-x86-64/protected3.d: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbin2.dd: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlsdesc-nacl.pd: Likewise.
* ld-x86-64/tlsdesc.dd: Likewise.
* ld-x86-64/tlsdesc.pd: Likewise.
* ld-x86-64/tlsgd10.dd: Likewise.
* ld-x86-64/tlsgd5.dd: Likewise.
* ld-x86-64/tlsgd6.dd: Likewise.
* ld-x86-64/tlsgd8.dd: Likewise.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
* ld-x86-64/tlspic2.dd: Likewise.
2016-10-11 Nick Clifton <nickc@redhat.com>
PR ld/20535

View File

@ -12,7 +12,7 @@ Disassembly of section .text:
10008: 8b020021 add x1, x1, x2
1000c: d2a00000 movz x0, #0x0, lsl #16
10010: 8b000020 add x0, x1, x0
10014: 9400000c bl 10044 \<test\+0x44\>
10014: 9400000c bl 10044 \<.*\>
10018: d503201f nop
1001c: 00000000 .word 0x00000000
10020: 0000ffe4 .word 0x0000ffe4

View File

@ -12,7 +12,7 @@ Disassembly of section .text:
10008: 8b020021 add x1, x1, x2
1000c: d2a00000 movz x0, #0x0, lsl #16
10010: 8b000020 add x0, x1, x0
10014: 9400000c bl 10044 \<test\+0x44\>
10014: 9400000c bl 10044 \<.*\>
10018: d503201f nop
1001c: 0000ffe4 .word 0x0000ffe4
10020: 00000000 .word 0x00000000

View File

@ -13,7 +13,7 @@ Disassembly of section .text:
1000c: f2800100 movk x0, #0x8
10010: f2800300 movk x0, #0x18
10014: 8b000020 add x0, x1, x0
10018: 9400000c bl 10048 \<test\+0x48\>
10018: 9400000c bl 10048 \<.*\>
1001c: d503201f nop
10020: 00000000 .word 0x00000000
10024: 0000ffe0 .word 0x0000ffe0

View File

@ -13,7 +13,7 @@ Disassembly of section .text:
1000c: f2800100 movk x0, #0x8
10010: f2800300 movk x0, #0x18
10014: 8b000020 add x0, x1, x0
10018: 9400000c bl 10048 \<test\+0x48\>
10018: 9400000c bl 10048 \<.*\>
1001c: d503201f nop
10020: 0000ffe0 .word 0x0000ffe0
10024: 00000000 .word 0x00000000

View File

@ -7,7 +7,7 @@
Disassembly of section .plt:
.* <foo@plt.*>:
.* <.plt>:
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
.*: .* adrp x16, .* <__foo_veneer\+.*>
.*: .* ldr x17, \[x16, #.*\]
@ -32,7 +32,7 @@ Disassembly of section .text:
.*: .* b .* <__foo_veneer\+.*>
.* <__foo_veneer>:
.*: .* adrp x16, 0 <foo@plt.*>
.*: .* adrp x16, 0 <.*>
.*: .* add x16, x16, #.*
.*: d61f0200 br x16
...

View File

@ -7,7 +7,7 @@
Disassembly of section .plt:
.* <foo@plt.*>:
.* <.plt>:
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
.*: .* adrp x16, .* <__foo_veneer\+.*>
.*: .* ldr x17, \[x16, #.*\]
@ -32,7 +32,7 @@ Disassembly of section .text:
.*: .* b .* <__foo_veneer\+.*>
.* <__foo_veneer>:
.*: .* adrp x16, 0 <foo@plt.*>
.*: .* adrp x16, 0 <.*>
.*: .* add x16, x16, #.*
.*: d61f0200 br x16
...

View File

@ -20,7 +20,7 @@ DYNAMIC SYMBOL TABLE:
Disassembly of section .text:
0+8000 \<_start\>:
8000: 9400000c bl 8030 \<foo\+0x24\>
8000: 9400000c bl 8030 \<.*>
0+8004 \<hidfn\>:
8004: 8a000000 and x0, x0, x0

View File

@ -4,7 +4,7 @@
#...
+10000: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
+10004: 91004000 add x0, x0, #0x10
+10008: 94000016 bl 10060 <v1\+0x10060>
+10008: 94000016 bl 10060 <.*>
+1000c: d503201f nop
+10010: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
+10014: f9400400 ldr x0, \[x0, #8\]

View File

@ -6,8 +6,8 @@
Disassembly of section .text:
0000000000010000 \<test\>:
+10000: 58080141 ldr x1, 20028 \<_GLOBAL_OFFSET_TABLE_\+0x28\>
+10004: 10080120 adr x0, 20028 \<_GLOBAL_OFFSET_TABLE_\+0x28\>
+10000: 58080141 ldr x1, 20028 \<var>
+10004: 10080120 adr x0, 20028 \<var>
+10008: d63f0020 blr x1
Disassembly of section .plt:

View File

@ -6,8 +6,8 @@
Disassembly of section .text:
0000000000010000 \<test\>:
+10000: 10080040 adr x0, 20008 \<_GLOBAL_OFFSET_TABLE_\+0x8\>
+10004: 9400000a bl 1002c \<test\+0x2c\>
+10000: 10080040 adr x0, 20008 \<var>
+10004: 9400000a bl 1002c \<.*>
+10008: d503201f nop
Disassembly of section .plt:

View File

@ -3,6 +3,6 @@
#objdump: -dr
#...
+10000: d53bd042 mrs x2, tpidr_el0
+10004: 58080020 ldr x0, 20008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+10004: 58080020 ldr x0, 20008 <.*>
+10008: 8b000040 add x0, x2, x0
+1000c: b9400000 ldr w0, \[x0\]

View File

@ -6,9 +6,9 @@ start address .*
Disassembly of section .plt:
.* <lib_func1@plt-0x14>:
.* <.plt>:
+.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
+.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1@plt-0x4>
+.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
+.*: e08fe00e add lr, pc, lr
+.*: e5bef008 ldr pc, \[lr, #8\]!
+.*: .* .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <lib_func1@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <app_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <app_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <app_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00008000 <bar@plt-0x14>:
00008000 <.*>:
8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <bar@plt-0x4>
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*>
8008: e08fe00e add lr, pc, lr
800c: e5bef008 ldr pc, \[lr, #8\]!
8010: 00000ffc \.word 0x00000ffc

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00008000 <bar@plt-0x14>:
00008000 <.plt>:
8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <bar@plt-0x4>
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*>
8008: e08fe00e add lr, pc, lr
800c: e5bef008 ldr pc, \[lr, #8\]!
8010: 00001004 \.word 0x00001004

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00008000 <bar@plt-0x14>:
00008000 <.plt>:
8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <bar@plt-0x4>
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*>
8008: e08fe00e add lr, pc, lr
800c: e5bef008 ldr pc, \[lr, #8\]!
8010: 00000ffc \.word 0x00000ffc

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00008e00 <targetfn@plt-0x14>:
00008e00 <.plt>:
8e00: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <targetfn@plt-0x4>
8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <.*>
8e08: e08fe00e add lr, pc, lr
8e0c: e5bef008 ldr pc, \[lr, #8\]!
8e10: 0001027c \.word 0x0001027c

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00008000 <bar@plt-0x14>:
00008000 <.plt>:
8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <bar@plt-0x4>
8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*>
8008: e08fe00e add lr, pc, lr
800c: e5bef008 ldr pc, \[lr, #8\]!
8010: 00000ffc \.word 0x00000ffc

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <lib_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <lib_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <lib_func2@plt-0x14>:
.* <.*>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -5,9 +5,9 @@ start address 0x.*
Disassembly of section .plt:
.* <app_func@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .* .word .*

View File

@ -5,9 +5,9 @@ start address 0x.*
Disassembly of section .plt:
.* <app_func@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00009000 <atf2@plt-0x14>:
00009000 <.plt>:
9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <atf2@plt-0x4>
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*>
9008: e08fe00e add lr, pc, lr
900c: e5bef008 ldr pc, \[lr, #8\]!
#------------------------------------------------------------------------------

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00009000 <f2t@plt-0x14>:
00009000 <.plt>:
9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <__irel_end\+0xff0>
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*>
9008: e08fe00e add lr, pc, lr
900c: e5bef008 ldr pc, \[lr, #8\]!
#------------------------------------------------------------------------------

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00009000 <f2t@plt-0x14>:
00009000 <.plt>:
9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <__irel_end\+0xff0>
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*>
9008: e08fe00e add lr, pc, lr
900c: e5bef008 ldr pc, \[lr, #8\]!
#------------------------------------------------------------------------------

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00009000 <f2@plt-0x14>:
00009000 <.plt>:
9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <f2@plt-0x4>
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*>
9008: e08fe00e add lr, pc, lr
900c: e5bef008 ldr pc, \[lr, #8\]!
#------------------------------------------------------------------------------

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00009000 <atf2@plt-0x14>:
00009000 <.plt>:
9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <atf2@plt-0x4>
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*>
9008: e08fe00e add lr, pc, lr
900c: e5bef008 ldr pc, \[lr, #8\]!
#------------------------------------------------------------------------------

View File

@ -4,9 +4,9 @@
Disassembly of section \.plt:
00009000 <f2@plt-0x14>:
00009000 <.plt>:
9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <f2@plt-0x4>
9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*>
9008: e08fe00e add lr, pc, lr
900c: e5bef008 ldr pc, \[lr, #8\]!
#------------------------------------------------------------------------------

View File

@ -3,7 +3,7 @@
Disassembly of section .plt:
.* <foo@plt-0x14>:
.* <.plt>:
.*: .*
.*: .*
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <lib_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <lib_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -6,9 +6,9 @@ start address 0x.*
Disassembly of section .plt:
.* <app_func2@plt-0x14>:
.* <.plt>:
.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func2@plt-0x4>
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*

View File

@ -28,6 +28,6 @@ Disassembly of section .text:
[0-9a-f]+ <foo>:
[0-9a-f]+: e59f0004 ldr r0, \[pc, #4\] ; 818c .*
[0-9a-f]+: fafffff2 blx 8154 <.*\+0x8154>
[0-9a-f]+: fafffff2 blx 8154 <.*>
[0-9a-f]+: e1a00000 nop ; .*
818c: 000080a0 .word 0x000080a0

View File

@ -20,7 +20,7 @@
Disassembly of section \.plt:
0+1b4 <(dsofn4@plt-0x1a|dsofn@plt-0x34)>:
0+1b4 <.*>:
1b4: 84e2 subq 4,\$sp
1b6: 0401 addoq 4,\$r0,\$acr
1b8: 7e7a move \$mof,\[\$sp\]
@ -45,7 +45,7 @@ Disassembly of section \.plt:
1f0: bf09 jump \$acr
1f2: b005 nop
1f4: 3f7e .... .... move .*,\$mof
1fa: bf0e baff ffff ba 1b4 <(dsofn4@plt-0x1a|dsofn@plt-0x34)>
1fa: bf0e baff ffff ba 1b4 <.*>
200: b005 nop
Disassembly of section \.text:
@ -57,5 +57,5 @@ Disassembly of section \.text:
0+20a <dsofn4>:
20a: 7f0d ae20 0000 lapc 22b8 <_GLOBAL_OFFSET_TABLE_>,\$r0
210: 5f0d 1400 addo\.w 0x14,\$r0,\$acr
214: bfbe baff ffff bsr 1ce <(dsofn4@plt|dsofn@plt-0x1a)>
214: bfbe baff ffff bsr 1ce <.*>
#pass

View File

@ -12,7 +12,7 @@
Disassembly of section \.plt:
0+1b4 <(dsofn4@plt-0x1a|dsofn@plt-0x34)>:
0+1b4 <.*>:
1b4: 84e2 subq 4,\$sp
1b6: 0401 addoq 4,\$r0,\$acr
@ -44,7 +44,7 @@ Disassembly of section \.plt:
Disassembly of section \.text:
#...
0+202 <dsofn3>:
202: bfbe e6ff ffff bsr 1e8 <(dsofn@plt|dsofn4@plt\+0x1a)>
202: bfbe e6ff ffff bsr 1e8 <.*>
208: b005 nop
0+20a <dsofn4>:

View File

@ -11,7 +11,7 @@
Disassembly of section \.plt:
0+1e4 <dsofn4@plt-0x1a>:
0+1e4 <.plt>:
1e4: 84e2 subq 4,\$sp
1e6: 0401 addoq 4,\$r0,\$acr
@ -24,21 +24,21 @@ Disassembly of section \.plt:
\.\.\.
0+1fe <dsofn4@plt>:
1fe: 6f0d 0c00 0000 addo\.d c <dsofn4@plt-0x1f2>,\$r0,\$acr
1fe: 6f0d 0c00 0000 addo\.d c <.*>,\$r0,\$acr
204: 6ffa move\.d \[\$acr\],\$acr
206: bf09 jump \$acr
208: b005 nop
20a: 3f7e 0000 0000 move 0 <dsofn4@plt-0x1fe>,\$mof
210: bf0e d4ff ffff ba 1e4 <dsofn4@plt-0x1a>
20a: 3f7e 0000 0000 move 0 <.*>,\$mof
210: bf0e d4ff ffff ba 1e4 <.*>
216: b005 nop
0+218 <dsofn@plt>:
218: 6f0d 1000 0000 addo\.d 10 <dsofn4@plt-0x1ee>,\$r0,\$acr
218: 6f0d 1000 0000 addo\.d 10 <.*>,\$r0,\$acr
21e: 6ffa move\.d \[\$acr\],\$acr
220: bf09 jump \$acr
222: b005 nop
224: 3f7e 0c00 0000 move c <dsofn4@plt-0x1f2>,\$mof
22a: bf0e baff ffff ba 1e4 <dsofn4@plt-0x1a>
224: 3f7e 0c00 0000 move c <.*>,\$mof
22a: bf0e baff ffff ba 1e4 <.*>
230: b005 nop
Disassembly of section \.text:

View File

@ -14,5 +14,5 @@
Relocation section.*
*Offset.*
0*[1-9a-f][0-9a-f]* +[^ ]+ +[^ ]+ +([0-9a-f]+( +\.text( \+ [0-9a-f]+)?)?)?
0*[1-9a-f][0-9a-f]* +[^ ]+ +[^ ]+ +([0-9a-f]+( +(\.text|fun)( \+ [0-9a-f]+)?)?)?
#pass

View File

@ -42,7 +42,7 @@ Disassembly of section \.data:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x18>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0

View File

@ -9,11 +9,11 @@ Disassembly of section \.plt:
[0-9a-f ]+<\.plt>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F6-0x10>
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F6-0x10>
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F6-0x10>
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0
[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\)
@ -22,7 +22,7 @@ Disassembly of section \.plt:
Disassembly of section \.text:
[0-9a-f ]+<F6>:
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F6-0x8>
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*>
[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0
[0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0
[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0
@ -48,7 +48,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 WFb
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 03 b0 .*
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF9
[0-9a-f ]+: 00 00 00 02 .*

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x18>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -9,11 +9,11 @@ Disassembly of section \.plt:
[0-9a-f ]+ <\.plt>:
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F2-0x10>
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F2-0x10>
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F2-0x10>
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\)
@ -22,7 +22,7 @@ Disassembly of section \.plt:
Disassembly of section \.text:
[0-9a-f ]+<F2>:
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F2-0x8>
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*>
[0-9a-f ]+<GF0>:
[0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0
@ -55,7 +55,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 GFb
[0-9A-F ]+isassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 04 a4 .*
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF9
[0-9a-f ]+: 00 00 00 00 .*

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x18>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -9,11 +9,11 @@ Disassembly of section \.plt:
[0-9a-f ]+<\.plt>:
[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F5-0x10>
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F5-0x10>
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F5-0x10>
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0
[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\)
@ -22,7 +22,7 @@ Disassembly of section \.plt:
Disassembly of section \.text:
[0-9a-f ]+<F5>:
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F5-0x8>
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*>
[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0
[0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0
[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0
@ -48,7 +48,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 UFb
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 04 7c .*
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE UF9
[0-9a-f ]+: 00 00 00 00 .*

View File

@ -9,11 +9,11 @@ Disassembly of section \.plt:
[0-9a-f ]+<\.plt>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F6-0x10>
[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F6-0x10>
[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F6-0x10>
[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*>
[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0
[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\)
@ -22,7 +22,7 @@ Disassembly of section \.plt:
Disassembly of section \.text:
[0-9a-f ]+<F6>:
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F6-0x8>
[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*>
[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0
[0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0
[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0
@ -48,7 +48,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 WFb
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 03 60 .*
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF9
[0-9a-f ]+: 00 00 00 00 .*

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.text:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0

View File

@ -51,7 +51,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0
[0-9a-f ]+: 00 01 41 18 sub\.p gr20,gr24,gr0

View File

@ -67,7 +67,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0
[0-9a-f ]+: 00 01 41 88 subx\.p gr20,gr8,gr0,icc0
[0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0

View File

@ -36,7 +36,7 @@ Disassembly of section \.dat[0-9a-f ]+:
\.\.\.
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
\.\.\.
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>:

View File

@ -51,7 +51,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0
[0-9a-f ]+: 00 01 41 18 sub\.p gr20,gr24,gr0

View File

@ -67,7 +67,7 @@ Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0
Disassembly of section \.got:
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0
[0-9a-f ]+: 00 01 41 88 subx\.p gr20,gr8,gr0,icc0
[0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0

View File

@ -155,7 +155,7 @@ Disassembly of section \.text:
[0-9a-f ]+: 80 88 00 00 nop
Disassembly of section \.got:
[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>:
[0-9a-f ]+<.*>:
[0-9a-f ]+: 00 01 02 c0 .*
[0-9a-f ]+: 00 00 08 21 .*
[0-9a-f ]+: 00 01 02 c0 .*

View File

@ -149,7 +149,7 @@ Disassembly of section \.text:
[0-9a-f ]+: 92 c8 f0 5c ldi @\(gr15,92\),gr9
Disassembly of section \.got:
[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x20)>:
[0-9a-f ]+<.*>:
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss
[0-9a-f ]+: 00 00 10 11 add\.p sp,gr17,gr0

View File

@ -151,7 +151,7 @@ Disassembly of section \.text:
[0-9a-f ]+: 82 30 80 00 calll @\(gr8,gr0\)
Disassembly of section \.got:
[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>:
[0-9a-f ]+<.*>:
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss
[0-9a-f ]+: 00 00 17 f3 \*unknown\*

View File

@ -151,7 +151,7 @@ Disassembly of section \.text:
[0-9a-f ]+: 82 30 80 00 calll @\(gr8,gr0\)
Disassembly of section \.got:
[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>:
[0-9a-f ]+<.*>:
[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
[0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss
[0-9a-f ]+: 00 00 17 f3 \*unknown\*

View File

@ -8,7 +8,7 @@
Disassembly of section .plt:
[0-9a-f]+ <fn1@plt-0x40>:
[0-9a-f]+ <.plt>:
+[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushl 0x[0-9a-f]+
+[0-9a-f]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[0-9a-f]+,%ecx
+[0-9a-f]+: 83 e1 e0 and \$0xffffffe0,%ecx
@ -87,7 +87,7 @@ Disassembly of section .plt:
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 68 00 00 00 00 push \$0x0
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x40>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
@ -137,7 +137,7 @@ Disassembly of section .plt:
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 68 08 00 00 00 push \$0x8
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x40>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop

View File

@ -8,7 +8,7 @@
Disassembly of section .plt:
[0-9a-f]+ <fn1@plt-0x40>:
[0-9a-f]+ <.plt>:
+[0-9a-f]+: ff 73 04 pushl 0x4\(%ebx\)
+[0-9a-f]+: 8b 4b 08 mov 0x8\(%ebx\),%ecx
+[0-9a-f]+: 83 e1 e0 and \$0xffffffe0,%ecx
@ -93,7 +93,7 @@ Disassembly of section .plt:
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 68 00 00 00 00 push \$0x0
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x40>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
@ -143,7 +143,7 @@ Disassembly of section .plt:
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 68 08 00 00 00 push \$0x8
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x40>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop
+[0-9a-f]+: 90 nop

View File

@ -8,7 +8,7 @@
Disassembly of section .plt:
[0-9a-f]+ <fn1@plt-0x10>:
[0-9a-f]+ <.plt>:
+[0-9a-f]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
+[0-9a-f]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
#...
@ -16,9 +16,9 @@ Disassembly of section .plt:
[0-9a-f]+ <fn1@plt>:
+[0-9a-f]+: ff a3 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+\(%ebx\)
+[0-9a-f]+: 68 00 00 00 00 push \$0x0
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x10>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>
[0-9a-f]+ <fn2@plt>:
+[0-9a-f]+: ff a3 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+\(%ebx\)
+[0-9a-f]+: 68 08 00 00 00 push \$0x8
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x10>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>

View File

@ -8,7 +8,7 @@
Disassembly of section .plt:
[0-9a-f]+ <fn1@plt-0x10>:
[0-9a-f]+ <.plt>:
+[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushl 0x[0-9a-f]+
+[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+
#...
@ -16,9 +16,9 @@ Disassembly of section .plt:
[0-9a-f]+ <fn1@plt>:
+[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+
+[0-9a-f]+: 68 00 00 00 00 push \$0x0
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x10>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>
[0-9a-f]+ <fn2@plt>:
+[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+
+[0-9a-f]+: 68 08 00 00 00 push \$0x8
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <fn1@plt-0x10>
+[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt>

View File

@ -121,4 +121,4 @@ Disassembly of section .text:
0+80 <_start>:
[ ]*[a-f0-9]+: 3b 80 f8 ff ff ff cmp -0x8\(%eax\),%eax
[ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\)
[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <_start-0x40>
[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <.*>

View File

@ -23,4 +23,4 @@ Disassembly of section .text:
0+e0 <_start>:
[ ]*[a-f0-9]+: 3b 80 f8 ff ff ff cmp -0x8\(%eax\),%eax
[ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\)
[ ]*[a-f0-9]+: e8 df ff ff ff call d0 <_start-0x10>
[ ]*[a-f0-9]+: e8 df ff ff ff call d0 <.*>

View File

@ -121,6 +121,6 @@ Disassembly of section .text:
0+80 <_start>:
[ ]*[a-f0-9]+: 3b 80 fc ff ff ff cmp -0x4\(%eax\),%eax
[ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\)
[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <_start-0x40>
[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <.*>
[ ]*[a-f0-9]+: 3d 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: e8 fc ff ff ff call 97 <_start\+0x17>
[ ]*[a-f0-9]+: e8 fc ff ff ff call 97 <.*>

View File

@ -23,6 +23,6 @@ Disassembly of section .text:
0+150 <_start>:
[ ]*[a-f0-9]+: 3b 80 fc ff ff ff cmp -0x4\(%eax\),%eax
[ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\)
[ ]*[a-f0-9]+: e8 df ff ff ff call 140 <_start-0x10>
[ ]*[a-f0-9]+: e8 df ff ff ff call 140 <.*>
[ ]*[a-f0-9]+: 3d 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: e8 fc ff ff ff call 167 <_start\+0x17>
[ ]*[a-f0-9]+: e8 fc ff ff ff call 167 <.*>

View File

@ -9,11 +9,11 @@
Disassembly of section .text:
0+4000c8 <__start>:
+[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <bar\+0x200007>
+[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <bar\+0x200007>
+[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <bar\+0x200007>
+[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <bar\+0x200007>
+[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <bar\+0x200007>
+[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax
0+4000f0 <foo>:

View File

@ -9,11 +9,11 @@
Disassembly of section .text:
0+4000c8 <__start>:
+[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <bar\+0x200007>
+[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <bar\+0x200007>
+[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <bar\+0x200007>
+[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <bar\+0x200007>
+[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <bar\+0x200007>
+[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <.got>
+[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <.got>
+[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax
0+4000f0 <foo>:

View File

@ -5,7 +5,7 @@
#target: x86_64-*-* i?86-*-*
#...
0+1d0 <\*ABS\*@plt-0x10>:
0+1d0 <.*>:
[ ]*[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\)
[ ]*[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
[ ]*[a-f0-9]+: 00 00 add %al,\(%eax\)
@ -14,22 +14,22 @@
0+1e0 <\*ABS\*@plt>:
[ ]*[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
[ ]*[a-f0-9]+: 68 18 00 00 00 push \$0x18
[ ]*[a-f0-9]+: e9 e0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10>
[ ]*[a-f0-9]+: e9 e0 ff ff ff jmp 1d0 <.*>
0+1f0 <func1@plt>:
[ ]*[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
[ ]*[a-f0-9]+: 68 00 00 00 00 push \$0x0
[ ]*[a-f0-9]+: e9 d0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10>
[ ]*[a-f0-9]+: e9 d0 ff ff ff jmp 1d0 <.*>
0+200 <func2@plt>:
[ ]*[a-f0-9]+: ff a3 14 00 00 00 jmp \*0x14\(%ebx\)
[ ]*[a-f0-9]+: 68 08 00 00 00 push \$0x8
[ ]*[a-f0-9]+: e9 c0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10>
[ ]*[a-f0-9]+: e9 c0 ff ff ff jmp 1d0 <.*>
0+210 <\*ABS\*@plt>:
[ ]*[a-f0-9]+: ff a3 18 00 00 00 jmp \*0x18\(%ebx\)
[ ]*[a-f0-9]+: 68 10 00 00 00 push \$0x10
[ ]*[a-f0-9]+: e9 b0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10>
[ ]*[a-f0-9]+: e9 b0 ff ff ff jmp 1d0 <.*>
Disassembly of section .text:

View File

@ -5,30 +5,30 @@
#target: x86_64-*-*
#...
0+2b0 <\*ABS\*\+0x30a@plt-0x10>:
[ ]*[a-f0-9]+: ff 35 5a 01 20 00 pushq 0x20015a\(%rip\) # 200410 <_GLOBAL_OFFSET_TABLE_\+0x8>
[ ]*[a-f0-9]+: ff 25 5c 01 20 00 jmpq \*0x20015c\(%rip\) # 200418 <_GLOBAL_OFFSET_TABLE_\+0x10>
0+2b0 <.*>:
[ ]*[a-f0-9]+: ff 35 5a 01 20 00 pushq 0x20015a\(%rip\) # 200410 <.*>
[ ]*[a-f0-9]+: ff 25 5c 01 20 00 jmpq \*0x20015c\(%rip\) # 200418 <.*>
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+2c0 <\*ABS\*\+0x30a@plt>:
[ ]*[a-f0-9]+: ff 25 5a 01 20 00 jmpq \*0x20015a\(%rip\) # 200420 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: ff 25 5a 01 20 00 jmpq \*0x20015a\(%rip\) # 200420 <.*>
[ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3
[ ]*[a-f0-9]+: e9 e0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10>
[ ]*[a-f0-9]+: e9 e0 ff ff ff jmpq 2b0 <.*>
0+2d0 <func1@plt>:
[ ]*[a-f0-9]+: ff 25 52 01 20 00 jmpq \*0x200152\(%rip\) # 200428 <_GLOBAL_OFFSET_TABLE_\+0x20>
[ ]*[a-f0-9]+: ff 25 52 01 20 00 jmpq \*0x200152\(%rip\) # 200428 <.*>
[ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
[ ]*[a-f0-9]+: e9 d0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10>
[ ]*[a-f0-9]+: e9 d0 ff ff ff jmpq 2b0 <.*>
0+2e0 <func2@plt>:
[ ]*[a-f0-9]+: ff 25 4a 01 20 00 jmpq \*0x20014a\(%rip\) # 200430 <_GLOBAL_OFFSET_TABLE_\+0x28>
[ ]*[a-f0-9]+: ff 25 4a 01 20 00 jmpq \*0x20014a\(%rip\) # 200430 <.*>
[ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
[ ]*[a-f0-9]+: e9 c0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10>
[ ]*[a-f0-9]+: e9 c0 ff ff ff jmpq 2b0 <.*>
0+2f0 <\*ABS\*\+0x300@plt>:
[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200438 <_GLOBAL_OFFSET_TABLE_\+0x30>
[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200438 <.*>
[ ]*[a-f0-9]+: 68 02 00 00 00 pushq \$0x2
[ ]*[a-f0-9]+: e9 b0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10>
[ ]*[a-f0-9]+: e9 b0 ff ff ff jmpq 2b0 <.*>
Disassembly of section .text:

View File

@ -3,7 +3,7 @@
Disassembly of section \.plt:
00020800 <f.@plt-0x14>:
00020800 <.plt>:
20800: 2f3b 0170 0000 movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@-
20806: fc02
20808: 4efb 0171 0000 jmp %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\)@\(0*\)
@ -11,22 +11,22 @@ Disassembly of section \.plt:
20810: 0000 0000 orib #0,%d0
00020814 <f.@plt>:
20814: 4efb 0171 0000 jmp %pc@\(3040c <_GLOBAL_OFFSET_TABLE_\+0xc>\)@\(0*\)
20814: 4efb 0171 0000 jmp %pc@\(3040c <f3>\)@\(0*\)
2081a: fbf6
2081c: 2f3c 0000 0000 movel #0,%sp@-
20822: 60ff ffff ffdc bral 20800 <f.@plt-0x14>
20822: 60ff ffff ffdc bral 20800 <.plt>
00020828 <f.@plt>:
20828: 4efb 0171 0000 jmp %pc@\(30410 <_GLOBAL_OFFSET_TABLE_\+0x10>\)@\(0*\)
20828: 4efb 0171 0000 jmp %pc@\(30410 <f2>\)@\(0*\)
2082e: fbe6
20830: 2f3c 0000 000c movel #12,%sp@-
20836: 60ff ffff ffc8 bral 20800 <f.@plt-0x14>
20836: 60ff ffff ffc8 bral 20800 <.plt>
0002083c <f.@plt>:
2083c: 4efb 0171 0000 jmp %pc@\(30414 <_GLOBAL_OFFSET_TABLE_\+0x14>\)@\(0*\)
2083c: 4efb 0171 0000 jmp %pc@\(30414 <f1>\)@\(0*\)
20842: fbd6
20844: 2f3c 0000 0018 movel #24,%sp@-
2084a: 60ff ffff ffb4 bral 20800 <f.@plt-0x14>
2084a: 60ff ffff ffb4 bral 20800 <.plt>
Disassembly of section \.text:
00020c00 <.*>:

View File

@ -3,7 +3,7 @@
Disassembly of section \.plt:
00020800 <f.@plt-0x18>:
00020800 <.plt>:
20800: 2f3b 0170 0000 movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@-
20806: fc02
20808: 227b 0170 0000 moveal %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\),%a1
@ -13,27 +13,27 @@ Disassembly of section \.plt:
\.\.\.
00020818 <f.@plt>:
20818: 227b 0170 0000 moveal %pc@\(3040c <_GLOBAL_OFFSET_TABLE_\+0xc>\),%a1
20818: 227b 0170 0000 moveal %pc@\(3040c <f3>\),%a1
2081e: fbf2
20820: 4ed1 jmp %a1@
20822: 2f3c 0000 0000 movel #0,%sp@-
20828: 60ff ffff ffd6 bral 20800 <f.@plt-0x18>
20828: 60ff ffff ffd6 bral 20800 <.plt>
\.\.\.
00020830 <f.@plt>:
20830: 227b 0170 0000 moveal %pc@\(30410 <_GLOBAL_OFFSET_TABLE_\+0x10>\),%a1
20830: 227b 0170 0000 moveal %pc@\(30410 <f2>\),%a1
20836: fbde
20838: 4ed1 jmp %a1@
2083a: 2f3c 0000 000c movel #12,%sp@-
20840: 60ff ffff ffbe bral 20800 <f.@plt-0x18>
20840: 60ff ffff ffbe bral 20800 <.plt>
\.\.\.
00020848 <f.@plt>:
20848: 227b 0170 0000 moveal %pc@\(30414 <_GLOBAL_OFFSET_TABLE_\+0x14>\),%a1
20848: 227b 0170 0000 moveal %pc@\(30414 <f1>\),%a1
2084e: fbca
20850: 4ed1 jmp %a1@
20852: 2f3c 0000 0018 movel #24,%sp@-
20858: 60ff ffff ffa6 bral 20800 <f.@plt-0x18>
20858: 60ff ffff ffa6 bral 20800 <.plt>
\.\.\.
Disassembly of section \.text:

View File

@ -3,23 +3,23 @@
Disassembly of section \.plt:
00020800 <f.@plt-0x18>:
00020800 <.plt>:
# _GLOBAL_OFFSET_TABLE_ + 4 == 0x30404 == 0x20802 + 0xfc02
20800: 203c 0000 fc02 movel #64514,%d0
20806: 2f3b 08fa movel %pc@\(20802 <f.@plt-0x16>,%d0:l\),%sp@-
20806: 2f3b 08fa movel %pc@\(20802 <.*>,%d0:l\),%sp@-
# _GLOBAL_OFFSET_TABLE_ + 8 == 0x30408 == 0x2080c + 0xfbfc
2080a: 203c 0000 fbfc movel #64508,%d0
20810: 207b 08fa moveal %pc@\(2080c <f.@plt-0xc>,%d0:l\),%a0
20810: 207b 08fa moveal %pc@\(2080c <.*>,%d0:l\),%a0
20814: 4ed0 jmp %a0@
20816: 4e71 nop
00020818 <f.@plt>:
# _GLOBAL_OFFSET_TABLE_ + 12 == 0x3040c == 0x2081a + 0xfbf2
20818: 203c 0000 fbf2 movel #64498,%d0
2081e: 207b 08fa moveal %pc@\(2081a <f.@plt\+0x2>,%d0:l\),%a0
2081e: 207b 08fa moveal %pc@\(2081a <.*>,%d0:l\),%a0
20822: 4ed0 jmp %a0@
20824: 2f3c 0000 0000 movel #0,%sp@-
2082a: 60ff ffff ffd4 bral 20800 <f.@plt-0x18>
2082a: 60ff ffff ffd4 bral 20800 <.plt>
00020830 <f.@plt>:
# _GLOBAL_OFFSET_TABLE_ + 16 == 0x30410 == 0x20832 + 0xfbde
@ -27,7 +27,7 @@ Disassembly of section \.plt:
20836: 207b 08fa moveal %pc@\(20832 <f.@plt\+0x2>,%d0:l\),%a0
2083a: 4ed0 jmp %a0@
2083c: 2f3c 0000 000c movel #12,%sp@-
20842: 60ff ffff ffbc bral 20800 <f.@plt-0x18>
20842: 60ff ffff ffbc bral 20800 <.*>
00020848 <f.@plt>:
# _GLOBAL_OFFSET_TABLE_ + 20 == 0x30414 == 0x2084a + 0xfbca
@ -35,7 +35,7 @@ Disassembly of section \.plt:
2084e: 207b 08fa moveal %pc@\(2084a <f.@plt\+0x2>,%d0:l\),%a0
20852: 4ed0 jmp %a0@
20854: 2f3c 0000 0018 movel #24,%sp@-
2085a: 60ff ffff ffa4 bral 20800 <f.@plt-0x18>
2085a: 60ff ffff ffa4 bral 20800 <.*>
Disassembly of section \.text:
00020c00 <.*>:

View File

@ -3,13 +3,13 @@
Disassembly of section \.plt:
00020800 <f.@plt-0x18>:
00020800 <.plt>:
# _GLOBAL_OFFSET_TABLE_ + 4 == 0x30404 == 0x20802 + 0xfc02
20800: 203c 0000 fc02 movel #64514,%d0
20806: 2ebb 08fa movel %pc@\(20802 <f.@plt-0x16>,%d0:l\),%sp@
20806: 2ebb 08fa movel %pc@\(20802 <.*>,%d0:l\),%sp@
# _GLOBAL_OFFSET_TABLE_ + 8 == 0x30408 == 0x2080c + 0xfbfc
2080a: 203c 0000 fbfc movel #64508,%d0
20810: 207b 08fa moveal %pc@\(2080c <f.@plt-0xc>,%d0:l\),%a0
20810: 207b 08fa moveal %pc@\(2080c <.*>,%d0:l\),%a0
20814: 4ed0 jmp %a0@
20816: 4e71 nop
@ -19,7 +19,7 @@ Disassembly of section \.plt:
2081e: 207b 08fa moveal %pc@\(2081a <f.@plt\+0x2>,%d0:l\),%a0
20822: 4ed0 jmp %a0@
20824: 2f3c 0000 0000 movel #0,%sp@-
2082a: 61ff ffff ffd4 bsrl 20800 <f.@plt-0x18>
2082a: 61ff ffff ffd4 bsrl 20800 <.plt>
00020830 <f.@plt>:
# _GLOBAL_OFFSET_TABLE_ + 16 == 0x30410 == 0x20832 + 0xfbde
@ -27,7 +27,7 @@ Disassembly of section \.plt:
20836: 207b 08fa moveal %pc@\(20832 <f.@plt\+0x2>,%d0:l\),%a0
2083a: 4ed0 jmp %a0@
2083c: 2f3c 0000 000c movel #12,%sp@-
20842: 61ff ffff ffbc bsrl 20800 <f.@plt-0x18>
20842: 61ff ffff ffbc bsrl 20800 <.plt>
00020848 <f.@plt>:
# _GLOBAL_OFFSET_TABLE_ + 20 == 0x30414 == 0x2084a + 0xfbca
@ -35,7 +35,7 @@ Disassembly of section \.plt:
2084e: 207b 08fa moveal %pc@\(2084a <f.@plt\+0x2>,%d0:l\),%a0
20852: 4ed0 jmp %a0@
20854: 2f3c 0000 0018 movel #24,%sp@-
2085a: 61ff ffff ffa4 bsrl 20800 <f.@plt-0x18>
2085a: 61ff ffff ffa4 bsrl 20800 <.plt>
Disassembly of section \.text:
00020c00 <.*>:

View File

@ -17,7 +17,7 @@ Disassembly of section .plt:
.*: 82120780 ADD A0.2,A0.2,#0x40f0
.*: c600806a GETD PC,\[A0.2\]
.*: 03000004 MOV D1Re0,#0
.*: a0fffee0 B 184 <app_func2@plt-0x14>
.*: a0fffee0 B 184 <.*>
Disassembly of section .text:
.* <lib_func1>:

View File

@ -16,7 +16,7 @@ Disassembly of section .plt:
.*: 821496e0 ADD A0.2,A0.2,#0x92dc
.*: c600806a GETD PC,\[A0.2\]
.*: 03000004 MOV D1Re0,#0
.*: a0fffee0 B .* <_lib_func@plt-0x14>
.*: a0fffee0 B .* <.*>
Disassembly of section .text:
.* <__start-0x10>:
.*: 82188105 MOVT A0.3,#0x1020

View File

@ -16,7 +16,7 @@ Disassembly of section .plt:
.*: 82120580 ADD A0.2,A0.2,#0x40b0
.*: c600806a GETD PC,\[A0.2\]
.*: 03000004 MOV D1Re0,#0
.*: a0fffee0 B .* <_far2@plt-0x14>
.*: a0fffee0 B .* <.*>
Disassembly of section .text:
.* <__start-0xc>:
.*: 82980101 ADDT A0.3,CPC0,#0x20

View File

@ -17,7 +17,7 @@ Disassembly of section .plt:
.*: 82120620 ADD A0.2,A0.2,#0x40c4
.*: c600806a GETD PC,\[A0.2\]
.*: 03000004 MOV D1Re0,#0
.*: a0fffee0 B .* <_far2@plt-0x14>
.*: a0fffee0 B .* <.*>
Disassembly of section .text:
.* <_lib_func>:

View File

@ -129,7 +129,7 @@ Disassembly of section .text:
+[0-9a-f]+: eb 43 00 00 00 0d sllg %r4,%r3,0
+[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\)
# IE against global var with larl got access
+[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x28>
+[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <.*>
+[0-9a-f]+: e3 33 c0 00 00 04 lg %r3,0\(%r3,%r12\)
+[0-9a-f]+: 41 33 90 00 la %r3,0\(%r3,%r9\)
# IE against global var defined in exec with larl got access

View File

@ -160,7 +160,7 @@ Disassembly of section .text:
+[0-9a-f]+: e3 43 c0 00 00 04 lg %r4,0\(%r3,%r12\)
+[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\)
# IE against global var with larl got access
+[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <\_GLOBAL\_OFFSET\_TABLE\_\+0x68>
+[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <.*>
+[0-9a-f]+: e3 33 c0 00 00 04 lg %r3,0\(%r3,%r12\)
+[0-9a-f]+: 41 33 90 00 la %r3,0\(%r3,%r9\)
# IE against local var with larl got access

View File

@ -4,7 +4,7 @@ tmpdir/libtest\.so: file format elf32-tic6x-le
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/libtestb\.so: file format elf32-tic6x-be
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/libtestrb\.so: file format elf32-tic6x-be
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1: file format elf32-tic6x-le
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1b: file format elf32-tic6x-be
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1r: file format elf32-tic6x-le
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1rb: file format elf32-tic6x-be
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2
10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1
10000028:[ \t]*00004000[ \t]*nop 3

View File

@ -4,7 +4,7 @@ tmpdir/libtestn\.so: file format elf32-tic6x-le
Disassembly of section \.plt:
10000020 <sub0@plt-0x18>:
10000020 <.plt>:
10000020: 0100036e ldw \.D2T2 \*\+b14\(12\),b2
10000024: 0080046e ldw \.D2T2 \*\+b14\(16\),b1
10000028: 00004000 nop 3

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