MIPS: Convert cross-mode BAL to JALX
Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX, similarly to how JAL instructions are converted. bfd/ * elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode BAL to JALX. (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a corresponding error message. gas/ * config/tc-mips.c (mips_force_relocation, mips_fix_adjustable): Adjust comments for BAL to JALX linker conversion. (fix_bad_cross_mode_branch_p): Accept cross-mode BAL. * testsuite/gas/mips/unaligned-branch-1.l: Update error messages expected. * testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise. * testsuite/gas/mips/branch-local-4.d: New test. * testsuite/gas/mips/branch-local-n32-4.d: New test. * testsuite/gas/mips/branch-local-n64-4.d: New test. * testsuite/gas/mips/branch-addend.d: New test. * testsuite/gas/mips/branch-addend-n32.d: New test. * testsuite/gas/mips/branch-addend-n64.d: New test. * testsuite/gas/mips/branch-local-4.s: New test source. * testsuite/gas/mips/branch-addend.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/unaligned-branch-2.d: Update error messages expected. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend.d: New test. * testsuite/ld-mips-elf/bal-jalx-local.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-3.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki
parent
9d862524f6
commit
a6ebf6169a
@ -1,3 +1,10 @@
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2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
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* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
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BAL to JALX.
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(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
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corresponding error message.
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2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
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* elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1,
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@ -6339,7 +6339,7 @@ mips_elf_perform_relocation (struct bfd_link_info *info,
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/* Set the field. */
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x |= (value & howto->dst_mask);
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/* Detect incorrect JALX usage. If required, turn JAL into JALX. */
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/* Detect incorrect JALX usage. If required, turn JAL or BAL into JALX. */
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if (!cross_mode_jump_p && jal_reloc_p (r_type))
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{
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bfd_vma opcode = x >> 26;
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@ -6393,10 +6393,50 @@ mips_elf_perform_relocation (struct bfd_link_info *info,
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}
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else if (cross_mode_jump_p && b_reloc_p (r_type))
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{
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info->callbacks->einfo
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(_("%X%H: Unsupported branch between ISA modes\n"),
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input_bfd, input_section, relocation->r_offset);
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return TRUE;
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bfd_boolean ok = FALSE;
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bfd_vma opcode = x >> 16;
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bfd_vma jalx_opcode = 0;
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bfd_vma addr;
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bfd_vma dest;
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if (r_type == R_MICROMIPS_PC16_S1)
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{
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ok = opcode == 0x4060;
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jalx_opcode = 0x3c;
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value <<= 1;
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}
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else if (r_type == R_MIPS_PC16 || r_type == R_MIPS_GNU_REL16_S2)
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{
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ok = opcode == 0x411;
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jalx_opcode = 0x1d;
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value <<= 2;
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}
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if (bfd_link_pic (info) || !ok)
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{
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info->callbacks->einfo
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(_("%X%H: Unsupported branch between ISA modes\n"),
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input_bfd, input_section, relocation->r_offset);
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return TRUE;
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}
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addr = (input_section->output_section->vma
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+ input_section->output_offset
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+ relocation->r_offset
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+ 4);
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dest = addr + (((value & 0x3ffff) ^ 0x20000) - 0x20000);
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if ((addr >> 28) << 28 != (dest >> 28) << 28)
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{
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info->callbacks->einfo
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(_("%X%H: Cannot convert branch between ISA modes "
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"to JALX: relocation out of range\n"),
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input_bfd, input_section, relocation->r_offset);
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return TRUE;
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}
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/* Make this the JALX opcode. */
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x = ((dest >> 2) & 0x3ffffff) | jalx_opcode << 26;
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}
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/* Try converting JAL to BAL and J(AL)R to B(AL), if the target is in
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@ -10390,7 +10430,10 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
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? _("Jump to a non-word-aligned address")
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: _("Jump to a non-instruction-aligned address")));
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else if (b_reloc_p (howto->type))
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msg = _("Branch to a non-instruction-aligned address");
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msg = (cross_mode_jump_p
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? _("Cannot convert a branch to JALX "
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"for a non-word-aligned address")
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: _("Branch to a non-instruction-aligned address"));
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else if (aligned_pcrel_reloc_p (howto->type))
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msg = _("PC-relative load from unaligned address");
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if (msg)
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@ -1,3 +1,21 @@
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2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
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* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
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Adjust comments for BAL to JALX linker conversion.
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(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
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* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
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expected.
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* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
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* testsuite/gas/mips/branch-local-4.d: New test.
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* testsuite/gas/mips/branch-local-n32-4.d: New test.
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* testsuite/gas/mips/branch-local-n64-4.d: New test.
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* testsuite/gas/mips/branch-addend.d: New test.
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* testsuite/gas/mips/branch-addend-n32.d: New test.
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* testsuite/gas/mips/branch-addend-n64.d: New test.
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* testsuite/gas/mips/branch-local-4.s: New test source.
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* testsuite/gas/mips/branch-addend.s: New test source.
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* testsuite/gas/mips/mips.exp: Run the new tests.
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2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
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* config/tc-mips.c (mips_force_relocation): Also retain branch
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@ -14803,7 +14803,7 @@ mips_force_relocation (fixS *fixp)
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/* We want to keep R_MIPS_PC26_S2, R_MIPS_PC21_S2, BFD_RELOC_16_PCREL_S2
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BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2 relocations
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against MIPS16 and microMIPS symbols so that we do cross-mode branch
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diagnostics. */
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diagnostics and BAL to JALX conversion by the linker. */
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if ((fixp->fx_r_type == R_MIPS_PC26_S2
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|| fixp->fx_r_type == R_MIPS_PC21_S2
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|| fixp->fx_r_type == BFD_RELOC_16_PCREL_S2
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@ -14950,7 +14950,12 @@ fix_bad_misaligned_jump_p (fixS *fixP, int shift)
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/* Return TRUE if the instruction pointed to by FIXP is an invalid branch
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to a symbol whose annotation indicates another ISA mode. For absolute
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symbols check the ISA bit instead. */
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symbols check the ISA bit instead.
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We accept BFD_RELOC_16_PCREL_S2 relocations against MIPS16 and microMIPS
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symbols or BFD_RELOC_MICROMIPS_16_PCREL_S1 relocations against regular
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MIPS symbols and associated with BAL instructions as these instructions
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may be be converted to JALX by the linker. */
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static bfd_boolean
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fix_bad_cross_mode_branch_p (fixS *fixP)
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@ -14976,6 +14981,11 @@ fix_bad_cross_mode_branch_p (fixS *fixP)
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switch (fixP->fx_r_type)
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{
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case BFD_RELOC_16_PCREL_S2:
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return ((absolute_p ? val & 1 : ELF_ST_IS_COMPRESSED (other))
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&& opcode != 0x0411);
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case BFD_RELOC_MICROMIPS_16_PCREL_S1:
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return ((absolute_p ? !(val & 1) : !ELF_ST_IS_MICROMIPS (other))
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&& opcode != 0x4060);
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case BFD_RELOC_MIPS_21_PCREL_S2:
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case BFD_RELOC_MIPS_26_PCREL_S2:
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return absolute_p ? val & 1 : ELF_ST_IS_COMPRESSED (other);
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@ -14983,7 +14993,6 @@ fix_bad_cross_mode_branch_p (fixS *fixP)
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return absolute_p ? !(val & 1) : !ELF_ST_IS_MIPS16 (other);
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case BFD_RELOC_MICROMIPS_7_PCREL_S1:
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case BFD_RELOC_MICROMIPS_10_PCREL_S1:
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case BFD_RELOC_MICROMIPS_16_PCREL_S1:
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return absolute_p ? !(val & 1) : !ELF_ST_IS_MICROMIPS (other);
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default:
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abort ();
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@ -17463,7 +17472,8 @@ mips_fix_adjustable (fixS *fixp)
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R_MICROMIPS_PC16_S1, R_MICROMIPS_PC10_S1 or R_MICROMIPS_PC7_S1)
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against MIPS16 or microMIPS symbols because we need to keep the
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MIPS16 or microMIPS symbol for the purpose of mode mismatch
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detection and JAL to JALX instruction conversion in the linker.
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detection and JAL or BAL to JALX instruction conversion in the
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linker.
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For simplicity, we deal with (3)-(4) by not reducing _any_ relocation
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against a MIPS16 symbol. We deal with (5) by additionally leaving
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23
gas/testsuite/gas/mips/branch-addend-n32.d
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23
gas/testsuite/gas/mips/branch-addend-n32.d
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@ -0,0 +1,23 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS BAL addend encoding (n32)
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#as: -n32 -march=from-abi
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#source: branch-addend.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 04110000 bal 00001018 <bar\+0x8>
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[ ]*[0-9a-f]+: R_MIPS_PC16 foo\+0x1fffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 04110000 bal 00001020 <bar\+0x10>
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar\+0x1fffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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27
gas/testsuite/gas/mips/branch-addend-n64.d
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27
gas/testsuite/gas/mips/branch-addend-n64.d
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@ -0,0 +1,27 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS BAL addend encoding (n64)
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#as: -64 -march=from-abi
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#source: branch-addend.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 04110000 bal 0000000000001018 <bar\+0x8>
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[ ]*[0-9a-f]+: R_MIPS_PC16 foo\+0x1fffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1fffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1fffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 04110000 bal 0000000000001020 <bar\+0x10>
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar\+0x1fffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1fffc
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1fffc
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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22
gas/testsuite/gas/mips/branch-addend.d
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22
gas/testsuite/gas/mips/branch-addend.d
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@ -0,0 +1,22 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS BAL addend encoding
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#as: -32
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 04117fff bal 00021014 <bar\+0x20004>
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[ ]*[0-9a-f]+: R_MIPS_PC16 foo
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 04117fff bal 0002101c <bar\+0x2000c>
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[ ]*[0-9a-f]+: R_MIPS_PC16 bar
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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31
gas/testsuite/gas/mips/branch-addend.s
Normal file
31
gas/testsuite/gas/mips/branch-addend.s
Normal file
@ -0,0 +1,31 @@
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.text
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.set noreorder
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.space 0x1000
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.align 4
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.set micromips
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.globl foo
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.ent foo
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foo:
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end foo
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.align 4
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.set nomicromips
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.globl bar
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.ent bar
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bar:
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nor $0, $0
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bal foo + 0x20000
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nor $0, $0
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bal bar + 0x20000
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end bar
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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20
gas/testsuite/gas/mips/branch-local-4.d
Normal file
20
gas/testsuite/gas/mips/branch-local-4.d
Normal file
@ -0,0 +1,20 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS branch local symbol relocation 4
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#as: -32
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#source: branch-local-4.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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\.\.\.
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
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[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 0411ffff bal 00001014 <bar\+0x4>
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[ ]*[0-9a-f]+: R_MIPS_PC16 foo
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
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[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
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\.\.\.
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27
gas/testsuite/gas/mips/branch-local-4.s
Normal file
27
gas/testsuite/gas/mips/branch-local-4.s
Normal file
@ -0,0 +1,27 @@
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.text
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.set noreorder
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.space 0x1000
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.align 4
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.set micromips
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.ent foo
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foo:
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end foo
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.align 4
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.set nomicromips
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.ent bar
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bar:
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nor $0, $0
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bal foo
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nor $0, $0
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jalr $0, $ra
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nor $0, $0
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.end bar
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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||||
20
gas/testsuite/gas/mips/branch-local-n32-4.d
Normal file
20
gas/testsuite/gas/mips/branch-local-n32-4.d
Normal file
@ -0,0 +1,20 @@
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#name: MIPS branch local symbol relocation 4 (n32)
|
||||
#as: -n32 -march=from-abi
|
||||
#source: branch-local-4.s
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
\.\.\.
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 0000 0000 nop
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 04110000 bal 00001018 <bar\+0x8>
|
||||
[ ]*[0-9a-f]+: R_MIPS_PC16 foo-0x4
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
\.\.\.
|
||||
22
gas/testsuite/gas/mips/branch-local-n64-4.d
Normal file
22
gas/testsuite/gas/mips/branch-local-n64-4.d
Normal file
@ -0,0 +1,22 @@
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#name: MIPS branch local symbol relocation 4 (n64)
|
||||
#as: -64 -march=from-abi
|
||||
#source: branch-local-4.s
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
\.\.\.
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 0000 0000 nop
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 04110000 bal 0000000000001018 <bar\+0x8>
|
||||
[ ]*[0-9a-f]+: R_MIPS_PC16 foo-0x4
|
||||
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x4
|
||||
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x4
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
\.\.\.
|
||||
@ -611,17 +611,25 @@ if { [istarget mips*-*-vxworks*] } {
|
||||
"MIPS branch local symbol relocation 2"
|
||||
run_list_test "branch-local-3" "-32" \
|
||||
"MIPS branch local symbol relocation 3"
|
||||
run_dump_test "branch-local-4"
|
||||
if $has_newabi {
|
||||
run_dump_test "branch-local-n32-1"
|
||||
run_list_test "branch-local-n32-2" "-n32 -march=from-abi" \
|
||||
"MIPS branch local symbol relocation 2 (n32)"
|
||||
run_list_test "branch-local-n32-3" "-n32 -march=from-abi" \
|
||||
"MIPS branch local symbol relocation 3 (n32)"
|
||||
run_dump_test "branch-local-n32-4"
|
||||
run_dump_test "branch-local-n64-1"
|
||||
run_list_test "branch-local-n64-2" "-64 -march=from-abi" \
|
||||
"MIPS branch local symbol relocation 2 (n64)"
|
||||
run_list_test "branch-local-n64-3" "-64 -march=from-abi" \
|
||||
"MIPS branch local symbol relocation 3 (n64)"
|
||||
run_dump_test "branch-local-n64-4"
|
||||
}
|
||||
run_dump_test "branch-addend"
|
||||
if $has_newabi {
|
||||
run_dump_test "branch-addend-n32"
|
||||
run_dump_test "branch-addend-n64"
|
||||
}
|
||||
run_dump_test "branch-absolute"
|
||||
run_dump_test "branch-absolute-addend"
|
||||
|
||||
@ -17,24 +17,21 @@
|
||||
.*:51: Error: branch to misaligned address \(0x11a7\)
|
||||
.*:53: Error: branch to misaligned address \(0x11a7\)
|
||||
.*:55: Error: branch to misaligned address \(0x11a7\)
|
||||
.*:63: Error: branch to a symbol in another ISA mode
|
||||
.*:65: Error: branch to a symbol in another ISA mode
|
||||
.*:67: Error: branch to a symbol in another ISA mode
|
||||
.*:69: Error: branch to a symbol in another ISA mode
|
||||
.*:69: Error: branch to misaligned address \(0x11b2\)
|
||||
.*:71: Error: branch to a symbol in another ISA mode
|
||||
.*:73: Error: branch to a symbol in another ISA mode
|
||||
.*:75: Error: branch to a symbol in another ISA mode
|
||||
.*:77: Error: branch to a symbol in another ISA mode
|
||||
.*:79: Error: branch to a symbol in another ISA mode
|
||||
.*:81: Error: branch to a symbol in another ISA mode
|
||||
.*:81: Error: branch to misaligned address \(0x11b5\)
|
||||
.*:83: Error: branch to a symbol in another ISA mode
|
||||
.*:85: Error: branch to a symbol in another ISA mode
|
||||
.*:87: Error: branch to a symbol in another ISA mode
|
||||
.*:87: Error: branch to misaligned address \(0x11b6\)
|
||||
.*:89: Error: branch to a symbol in another ISA mode
|
||||
.*:91: Error: branch to a symbol in another ISA mode
|
||||
.*:93: Error: branch to a symbol in another ISA mode
|
||||
.*:93: Error: branch to misaligned address \(0x11b7\)
|
||||
.*:95: Error: branch to a symbol in another ISA mode
|
||||
.*:97: Error: branch to a symbol in another ISA mode
|
||||
.*:99: Error: branch to a symbol in another ISA mode
|
||||
.*:101: Error: branch to a symbol in another ISA mode
|
||||
.*:103: Error: branch to a symbol in another ISA mode
|
||||
|
||||
@ -1,13 +1,6 @@
|
||||
.*: Assembler messages:
|
||||
.*:10: Error: branch to a symbol in another ISA mode
|
||||
.*:12: Error: branch to a symbol in another ISA mode
|
||||
.*:14: Error: branch to a symbol in another ISA mode
|
||||
.*:16: Error: branch to a symbol in another ISA mode
|
||||
.*:18: Error: branch to a symbol in another ISA mode
|
||||
.*:20: Error: branch to a symbol in another ISA mode
|
||||
.*:22: Error: branch to a symbol in another ISA mode
|
||||
.*:24: Error: branch to a symbol in another ISA mode
|
||||
.*:26: Error: branch to a symbol in another ISA mode
|
||||
.*:20: Error: branch to misaligned address \(0x11e5\)
|
||||
.*:24: Error: branch to misaligned address \(0x11e7\)
|
||||
.*:34: Error: branch to misaligned address \(0x11f5\)
|
||||
.*:38: Error: branch to misaligned address \(0x11f7\)
|
||||
.*:42: Error: branch to a symbol in another ISA mode
|
||||
|
||||
28
ld/ChangeLog
28
ld/ChangeLog
@ -1,3 +1,31 @@
|
||||
2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
|
||||
|
||||
* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
|
||||
messages expected.
|
||||
* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
|
||||
* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
|
||||
* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
|
||||
* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
|
||||
* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
|
||||
source.
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
|
||||
source.
|
||||
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
|
||||
|
||||
2016-07-19 Maciej W. Rozycki <macro@imgtec.com>
|
||||
|
||||
* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message
|
||||
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-addend-n32.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-addend-n32.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL/JALX addend calculation (n32)
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-addend.s
|
||||
#as: -EB -n32 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: bal-jalx-addend.d
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-addend-n64.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-addend-n64.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL/JALX addend calculation (n64)
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-addend.s
|
||||
#as: -EB -64 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: bal-jalx-addend.d
|
||||
22
ld/testsuite/ld-mips-elf/bal-jalx-addend.d
Normal file
22
ld/testsuite/ld-mips-elf/bal-jalx-addend.d
Normal file
@ -0,0 +1,22 @@
|
||||
#name: MIPS BAL/JALX addend calculation
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-addend.s
|
||||
#as: -EB -32
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
\.\.\.
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 0000 0000 nop
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 77008400 jalx 0*1c021000 <.*>
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 04117ffc bal 0*1c021010 <.*>
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
\.\.\.
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-local-n32.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-local-n32.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL to JALX conversion for local symbol (n32)
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-local-4.s
|
||||
#as: -EB -n32 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: bal-jalx-local.d
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-local-n64.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-local-n64.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL to JALX conversion for local symbol (n64)
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-local-4.s
|
||||
#as: -EB -64 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: bal-jalx-local.d
|
||||
20
ld/testsuite/ld-mips-elf/bal-jalx-local.d
Normal file
20
ld/testsuite/ld-mips-elf/bal-jalx-local.d
Normal file
@ -0,0 +1,20 @@
|
||||
#name: MIPS BAL to JALX conversion for local symbol
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-local-4.s
|
||||
#as: -EB -32
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
\.\.\.
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 001f 0f3c jr ra
|
||||
[0-9a-f]+ <[^>]*> 0000 02d0 not zero,zero
|
||||
[0-9a-f]+ <[^>]*> 0000 0000 nop
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 77000400 jalx 0*1c001000 <foo>
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
[0-9a-f]+ <[^>]*> 03e00009 jalr zero,ra
|
||||
[0-9a-f]+ <[^>]*> 00000027 nor zero,zero,zero
|
||||
\.\.\.
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-pic-n32.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-pic-n32.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL/JALX in PIC mode (n32)
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-addend.s
|
||||
#as: -EB -n32 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000 -shared
|
||||
#error: \A[^\n]*: In function `bar':\n
|
||||
#error: \(\.text\+0x1014\): Unsupported branch between ISA modes\Z
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-pic-n64.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-pic-n64.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL/JALX in PIC mode (n64)
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-addend.s
|
||||
#as: -EB -64 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000 -shared
|
||||
#error: \A[^\n]*: In function `bar':\n
|
||||
#error: \(\.text\+0x1014\): Unsupported branch between ISA modes\Z
|
||||
6
ld/testsuite/ld-mips-elf/bal-jalx-pic.d
Normal file
6
ld/testsuite/ld-mips-elf/bal-jalx-pic.d
Normal file
@ -0,0 +1,6 @@
|
||||
#name: MIPS BAL/JALX in PIC mode
|
||||
#source: ../../../gas/testsuite/gas/mips/branch-addend.s
|
||||
#as: -EB -32
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000 -shared
|
||||
#error: \A[^\n]*: In function `bar':\n
|
||||
#error: \(\.text\+0x1014\): Unsupported branch between ISA modes\Z
|
||||
@ -213,15 +213,26 @@ if { $linux_gnu } {
|
||||
|
||||
run_dump_test "jalx-addend" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "jalx-local" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "bal-jalx-addend" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "bal-jalx-local" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "bal-jalx-pic" [list [list ld $abi_ldflags(o32)]]
|
||||
if $has_newabi {
|
||||
run_dump_test "jalx-addend-n32" [list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "jalx-local-n32" [list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "bal-jalx-addend-n32" [list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "bal-jalx-local-n32" [list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "bal-jalx-pic-n32" [list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "jalx-addend-n64" [list [list ld $abi_ldflags(n64)]]
|
||||
run_dump_test "jalx-local-n64" [list [list ld $abi_ldflags(n64)]]
|
||||
run_dump_test "bal-jalx-addend-n64" [list [list ld $abi_ldflags(n64)]]
|
||||
run_dump_test "bal-jalx-local-n64" [list [list ld $abi_ldflags(n64)]]
|
||||
run_dump_test "bal-jalx-pic-n64" [list [list ld $abi_ldflags(n64)]]
|
||||
}
|
||||
|
||||
run_dump_test "unaligned-jalx-0" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "unaligned-jalx-1" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "unaligned-jalx-2" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "unaligned-jalx-3" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "unaligned-jalx-mips16-0" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "unaligned-jalx-mips16-1" [list [list ld $abi_ldflags(o32)]]
|
||||
run_dump_test "unaligned-jalx-micromips-0" [list [list ld $abi_ldflags(o32)]]
|
||||
@ -232,6 +243,10 @@ if $has_newabi {
|
||||
[list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "unaligned-jalx-addend-1" \
|
||||
[list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "unaligned-jalx-addend-2" \
|
||||
[list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "unaligned-jalx-addend-3" \
|
||||
[list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "unaligned-jalx-addend-mips16-0" \
|
||||
[list [list ld $abi_ldflags(n32)]]
|
||||
run_dump_test "unaligned-jalx-addend-mips16-1" \
|
||||
|
||||
@ -39,68 +39,54 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10bc\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10dc\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10e4\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10ec\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10f4\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10f4\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10f4\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10fc\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10fc\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10fc\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1104\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1104\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1104\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x110c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1114\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x111c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1124\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1124\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1124\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x112c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x112c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x112c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1134\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1134\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1134\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x113c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x113c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x113c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1144\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1144\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1144\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x114c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1154\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1154\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1154\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x115c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1164\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1164\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1164\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x116c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1174\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x117c\): Unsupported branch between ISA modes\Z
|
||||
|
||||
@ -3,35 +3,17 @@
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#source: ../../../gas/testsuite/gas/mips/unaligned-branch-micromips-2.s
|
||||
#error: \A[^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1002\): Unsupported branch between ISA modes\n
|
||||
#error: \(\.text\+0x100a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x100a\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1012\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x100a\): Unsupported branch between ISA modes\n
|
||||
#error: \(\.text\+0x101a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1012\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x102a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1012\): Unsupported branch between ISA modes\n
|
||||
#error: \(\.text\+0x1032\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x101a\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x101a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1022\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x102a\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x102a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1032\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1032\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x103a\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x103a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1042\): Unsupported branch between ISA modes\n
|
||||
#error: \(\.text\+0x103a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1062\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
@ -39,29 +21,29 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1082\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1088\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1088\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1088\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x108e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x108e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x108e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1094\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1094\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1094\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x109a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10a0\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10a0\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10a0\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10a6\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10a6\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10a6\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10ac\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10ac\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10ac\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
@ -73,29 +55,29 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10e2\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10e8\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10e8\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10e8\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10ee\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10ee\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10ee\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10f4\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10f4\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10f4\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10fa\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1100\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1100\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1100\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1106\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1106\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1106\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x110c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x110c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x110c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
@ -107,29 +89,29 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1142\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1146\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1146\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1146\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114a\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x114a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x114e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1152\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1156\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1156\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1156\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115a\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x115a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x115e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
@ -141,29 +123,29 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1182\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1186\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1186\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1186\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x118a\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x118a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x118a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x118e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x118e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x118e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1192\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1196\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1196\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1196\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x119a\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x119a\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x119a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x119e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x119e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x119e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
|
||||
@ -5,29 +5,29 @@
|
||||
#error: \A[^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1002\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1008\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1008\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1008\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x100e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x100e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x100e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1014\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1014\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1014\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x101a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1020\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1020\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1020\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1026\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1026\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1026\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x102c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x102c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x102c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
@ -39,29 +39,29 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1062\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1068\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1068\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1068\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x106e\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x106e\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x106e\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1074\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1074\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1074\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x107a\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1080\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1080\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1080\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1086\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1086\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1086\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x108c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x108c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x108c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
|
||||
@ -39,59 +39,59 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10bc\): Branch to a non-instruction-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10dc\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10dc\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10dc\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10e4\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10e4\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10e4\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10ec\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10f4\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10f4\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10f4\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10fc\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x10fc\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10fc\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1104\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1104\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1104\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x110c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x110c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x110c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1114\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1114\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1114\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x111c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1124\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1124\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1124\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x112c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x112c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x112c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1134\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1134\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1134\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x113c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x113c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x113c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1144\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1144\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1144\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x114c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x114c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
@ -99,15 +99,15 @@
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x115c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1164\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1164\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1164\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x116c\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x116c\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x116c\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1174\): Branch to a non-instruction-aligned address\n
|
||||
#error: \(\.text\+0x1174\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x1174\): Unsupported branch between ISA modes\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
|
||||
7
ld/testsuite/ld-mips-elf/unaligned-jalx-2.d
Normal file
7
ld/testsuite/ld-mips-elf/unaligned-jalx-2.d
Normal file
@ -0,0 +1,7 @@
|
||||
#name: MIPS JALX to unaligned symbol 2
|
||||
#source: unaligned-jalx-2.s
|
||||
#source: unaligned-insn.s -mips16
|
||||
#as: -EB -32
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: unaligned-jalx-0.d
|
||||
12
ld/testsuite/ld-mips-elf/unaligned-jalx-2.s
Normal file
12
ld/testsuite/ld-mips-elf/unaligned-jalx-2.s
Normal file
@ -0,0 +1,12 @@
|
||||
.text
|
||||
.align 4
|
||||
.globl foo
|
||||
.ent foo
|
||||
foo:
|
||||
bal bar0
|
||||
bal bar2
|
||||
.end foo
|
||||
|
||||
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
|
||||
.align 4, 0
|
||||
.space 16
|
||||
7
ld/testsuite/ld-mips-elf/unaligned-jalx-3.d
Normal file
7
ld/testsuite/ld-mips-elf/unaligned-jalx-3.d
Normal file
@ -0,0 +1,7 @@
|
||||
#name: MIPS JALX to unaligned symbol 3
|
||||
#source: unaligned-jalx-3.s
|
||||
#source: unaligned-insn.s -mips16
|
||||
#as: -EB -32
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#error: \A[^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x0\): Cannot convert a branch to JALX for a non-word-aligned address\Z
|
||||
11
ld/testsuite/ld-mips-elf/unaligned-jalx-3.s
Normal file
11
ld/testsuite/ld-mips-elf/unaligned-jalx-3.s
Normal file
@ -0,0 +1,11 @@
|
||||
.text
|
||||
.align 4
|
||||
.globl foo
|
||||
.ent foo
|
||||
foo:
|
||||
bal bar1
|
||||
.end foo
|
||||
|
||||
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
|
||||
.align 4, 0
|
||||
.space 16
|
||||
7
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-2.d
Normal file
7
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-2.d
Normal file
@ -0,0 +1,7 @@
|
||||
#name: MIPS JALX to unaligned symbol with addend 2
|
||||
#source: unaligned-jalx-addend-2.s
|
||||
#source: unaligned-insn.s -mips16
|
||||
#as: -EB -n32 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#dump: unaligned-jalx-addend-0.d
|
||||
14
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-2.s
Normal file
14
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-2.s
Normal file
@ -0,0 +1,14 @@
|
||||
.text
|
||||
.align 4
|
||||
.globl foo
|
||||
.ent foo
|
||||
foo:
|
||||
bal bar0 + 4
|
||||
bal bar1 - 2
|
||||
bal bar2 - 4
|
||||
bal bar3 + 2
|
||||
.end foo
|
||||
|
||||
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
|
||||
.align 4, 0
|
||||
.space 16
|
||||
29
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-3.d
Normal file
29
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-3.d
Normal file
@ -0,0 +1,29 @@
|
||||
#name: MIPS JALX to unaligned symbol with addend 3
|
||||
#source: unaligned-jalx-addend-3.s
|
||||
#source: unaligned-insn.s -mips16
|
||||
#as: -EB -n32 -march=from-abi
|
||||
#ld: -EB -Ttext 0x1c000000 -e 0x1c000000
|
||||
#error: \A[^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x0\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x8\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x10\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x18\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x20\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x28\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x30\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x38\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x40\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x48\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x50\): Cannot convert a branch to JALX for a non-word-aligned address\n
|
||||
#error: [^\n]*: In function `foo':\n
|
||||
#error: \(\.text\+0x58\): Cannot convert a branch to JALX for a non-word-aligned address\Z
|
||||
22
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-3.s
Normal file
22
ld/testsuite/ld-mips-elf/unaligned-jalx-addend-3.s
Normal file
@ -0,0 +1,22 @@
|
||||
.text
|
||||
.align 4
|
||||
.globl foo
|
||||
.ent foo
|
||||
foo:
|
||||
bal bar0 + 1
|
||||
bal bar0 + 2
|
||||
bal bar0 + 3
|
||||
bal bar1 + 1
|
||||
bal bar1 + 3
|
||||
bal bar1 + 4
|
||||
bal bar2 - 1
|
||||
bal bar2 - 2
|
||||
bal bar2 - 3
|
||||
bal bar3 - 1
|
||||
bal bar3 - 3
|
||||
bal bar3 - 4
|
||||
.end foo
|
||||
|
||||
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
|
||||
.align 4, 0
|
||||
.space 16
|
||||
Loading…
x
Reference in New Issue
Block a user