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Add znver2 support.

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gas/
	* config/tc-i386.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
	* doc/c-i386.texi : Document znver2.
	* gas/testsuite/gas/i386/arch-13.s: Updated for znver2.
	* gas/testsuite/gas/i386/arch-13.d: Updated.
	* gas/testsuite/gas/i386/arch-13-znver1.d: Updated.
	* gas/testsuite/gas/i386/arch-13-znver2.d: New file.
	* gas/testsuite/gas/i386/x86-64-arch-3.s: Updated for znver2.
	* gas/testsuite/gas/i386/x86-64-arch-3.d: Updated.
	* gas/testsuite/gas/i386/x86-64-arch-3-znver1.d: Updated.
	* gas/testsuite/gas/i386/x86-64-arch-3-znver2.d: New file.
	* gas/testsuite/gas/i386/i386.exp: Updated for new test.

	opcode/
	* i386-gen.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
	* i386-init.h : Regenerated.
This commit is contained in:
Amit Pawar 2018-05-30 12:27:35 +05:30
parent 5294170687
commit a9660a6f40
15 changed files with 169 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
gas/ChangeLog
View File

@ -1,3 +1,17 @@
2018-05-30 Amit Pawar <amit.pawar@amd.com>
* config/tc-i386.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
* doc/c-i386.texi : Document znver2.
* gas/testsuite/gas/i386/arch-13.s: Updated for znver2.
* gas/testsuite/gas/i386/arch-13.d: Updated.
* gas/testsuite/gas/i386/arch-13-znver1.d: Updated.
* gas/testsuite/gas/i386/arch-13-znver2.d: New file.
* gas/testsuite/gas/i386/x86-64-arch-3.s: Updated for znver2.
* gas/testsuite/gas/i386/x86-64-arch-3.d: Updated.
* gas/testsuite/gas/i386/x86-64-arch-3-znver1.d: Updated.
* gas/testsuite/gas/i386/x86-64-arch-3-znver2.d: New file.
* gas/testsuite/gas/i386/i386.exp: Updated for new test.
2018-05-25 Alan Modra <amodra@gmail.com>
* po/POTFILES.in: Regenerate.

2
gas/config/tc-i386.c
View File

@ -843,6 +843,8 @@ static const arch_entry cpu_arch[] =
CPU_BDVER4_FLAGS, 0 },
{ STRING_COMMA_LEN ("znver1"), PROCESSOR_ZNVER,
CPU_ZNVER1_FLAGS, 0 },
{ STRING_COMMA_LEN ("znver2"), PROCESSOR_ZNVER,
CPU_ZNVER2_FLAGS, 0 },
{ STRING_COMMA_LEN ("btver1"), PROCESSOR_BT,
CPU_BTVER1_FLAGS, 0 },
{ STRING_COMMA_LEN ("btver2"), PROCESSOR_BT,

5
gas/doc/c-i386.texi
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@ -123,6 +123,7 @@ processor names are recognized:
@code{bdver3},
@code{bdver4},
@code{znver1},
@code{znver2},
@code{btver1},
@code{btver2},
@code{generic32} and
@ -1258,8 +1259,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{corei7} @tab @samp{l1om} @tab @samp{k1om} @samp{iamcu}
@item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8}
@item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2} @tab @samp{bdver3}
@item @samp{bdver4} @tab @samp{znver1} @tab @samp{btver1} @tab @samp{btver2}
@item @samp{generic32} @tab @samp{generic64}
@item @samp{bdver4} @tab @samp{znver1} @tab @samp{znver2} @tab @samp{btver1}
@item @samp{btver2} @samp{generic32} @tab @samp{generic64}
@item @samp{.mmx} @tab @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
@item @samp{.avx} @tab @samp{.vmx} @tab @samp{.smx} @tab @samp{.ept}

8
gas/testsuite/gas/i386/arch-13-znver1.d
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@ -1,7 +1,7 @@
#source: arch-13.s
#as: -march=znver1
#as: -march=znver1+rdpid+clwb+wbnoinvd
#objdump: -dw
#name: i386 arch 13 (znver1)
#name: i386 arch 13 (znver1)
.*: file format .*
@ -22,4 +22,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\)
[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %eax
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
#pass

29
gas/testsuite/gas/i386/arch-13-znver2.d Normal file
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@ -0,0 +1,29 @@
#source: arch-13.s
#as: -march=znver2
#objdump: -dw
#name: i386 arch 13 (znver2)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 01 ca clac[ ]*
[ ]*[a-f0-9]+: 0f 01 cb stac[ ]*
[ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx
[ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx
[ ]*[a-f0-9]+: 0f c7 f8 rdseed %eax
[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
[ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\)
[ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\)
[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\)
[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx
[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx
[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\)
[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %eax
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
#pass

6
gas/testsuite/gas/i386/arch-13.d
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@ -1,4 +1,4 @@
#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx
#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx+rdpid+clwb+wbnoinvd
#objdump: -dw
#name: i386 arch 13
@ -21,4 +21,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\)
[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %eax
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
#pass

39
gas/testsuite/gas/i386/arch-13.s
View File

@ -1,23 +1,34 @@
# Test -march=
.text
#SMAP feature
clac
stac
clac
stac
#ADCX ADOX
adcx %edx, %ecx
adox %edx, %ecx
adcx %edx, %ecx
adox %edx, %ecx
#RDSEED
rdseed %eax
rdseed %eax
#CLZERO
clzero
clzero
#XSAVEC
xsavec (%ecx)
xsavec (%ecx)
#XSAVES
xsaves (%ecx)
xsaves (%ecx)
#CLFLUSHOPT
clflushopt (%ecx)
monitorx %eax, %ecx, %edx
monitorx %ax, %ecx, %edx
monitorx
mwaitx %eax, %ecx, %ebx
mwaitx
clflushopt (%ecx)
monitorx %eax, %ecx, %edx
monitorx %ax, %ecx, %edx
monitorx
mwaitx %eax, %ecx, %ebx
mwaitx
#CLWB instruction
clwb (%ecx) # CLWB
clwb -123456(%esp,%esi,8) # CLWB
# rdpid instruction
rdpid %eax
# wbnoinvd instruction
wbnoinvd

2
gas/testsuite/gas/i386/i386.exp
View File

@ -155,6 +155,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "arch-10-bdver3"
run_dump_test "arch-10-bdver4"
run_dump_test "arch-13-znver1"
run_dump_test "arch-13-znver2"
run_dump_test "arch-10-btver1"
run_dump_test "arch-10-btver2"
run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
@ -691,6 +692,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-arch-2-bdver3"
run_dump_test "x86-64-arch-2-bdver4"
run_dump_test "x86-64-arch-3-znver1"
run_dump_test "x86-64-arch-3-znver2"
run_dump_test "x86-64-arch-2-btver1"
run_dump_test "x86-64-arch-2-btver2"
run_list_test "x86-64-arch-2-1" "-march=generic64 -I${srcdir}/$subdir -al"

7
gas/testsuite/gas/i386/x86-64-arch-3-znver1.d
View File

@ -1,5 +1,5 @@
#source: x86-64-arch-3.s
#as: -march=znver1
#as: -march=znver1+rdpid+clwb+wbnoinvd
#objdump: -dw
#name: x86-64 arch 3 (znver1)
@ -23,4 +23,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
[ ]*[a-f0-9]+:[ ]*f3 41 0f c7 fa[ ]*rdpid %r10
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
#pass

31
gas/testsuite/gas/i386/x86-64-arch-3-znver2.d Normal file
View File

@ -0,0 +1,31 @@
#source: x86-64-arch-3.s
#as: -march=znver2
#objdump: -dw
#name: x86-64 arch 3 (znver2)
.*: file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 0f 01 ca clac[ ]*
[ ]*[a-f0-9]+: 0f 01 cb stac[ ]*
[ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx
[ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx
[ ]*[a-f0-9]+: 0f c7 f8 rdseed %eax
[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
[ ]*[a-f0-9]+: 44 0f 38 c8 00 sha1nexte \(%rax\),%xmm8
[ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\)
[ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\)
[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\)
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
[ ]*[a-f0-9]+:[ ]*f3 41 0f c7 fa[ ]*rdpid %r10
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
#pass

7
gas/testsuite/gas/i386/x86-64-arch-3.d
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@ -1,4 +1,4 @@
#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt+mwaitx
#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt+mwaitx+rdpid+clwb+wbnoinvd
#objdump: -dw
#name: x86-64 arch 3
@ -22,4 +22,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
[ ]*[a-f0-9]+:[ ]*f3 41 0f c7 fa[ ]*rdpid %r10
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
#pass

40
gas/testsuite/gas/i386/x86-64-arch-3.s
View File

@ -1,25 +1,35 @@
# Test -march=
.text
#SMAP
clac
stac
clac
stac
#ADCX ADOX
adcx %edx, %ecx
adox %edx, %ecx
adcx %edx, %ecx
adox %edx, %ecx
#RDSEED
rdseed %eax
rdseed %eax
#CLZERO
clzero
clzero
#SHA
sha1nexte (%rax), %xmm8
sha1nexte (%rax), %xmm8
#XSAVEC
xsavec64 (%rcx)
xsavec64 (%rcx)
#XSAVES
xsaves64 (%rcx)
xsaves64 (%rcx)
#CLFLUSHOPT
clflushopt (%rcx)
monitorx %rax,%rcx,%rdx
monitorx %eax,%rcx,%rdx
monitorx
mwaitx %rax,%rcx,%rbx
mwaitx
clflushopt (%rcx)
monitorx %rax,%rcx,%rdx
monitorx %eax,%rcx,%rdx
monitorx
mwaitx %rax,%rcx,%rbx
mwaitx
# clwb instruction
clwb (%rcx) # CLWB
clwb 0x123(%rax,%r14,8) # CLWB
# rdpid instruction
rdpid %rax
rdpid %r10
# wbnoinvd instruction
wbnoinvd

5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2018-05-30 Amit Pawar <Amit.Pawar@amd.com>
* i386-gen.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
* i386-init.h : Regenerated.
2018-05-25 Alan Modra <amodra@gmail.com>
* Makefile.in: Regenerate.

2
opcodes/i386-gen.c
View File

@ -97,6 +97,8 @@ static initializer cpu_flag_init[] =
"CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
{ "CPU_ZNVER1_FLAGS",
"CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
{ "CPU_ZNVER2_FLAGS",
"CPU_ZNVER1_FLAGS|CpuRDPID|CpuWBNOINVD|CpuCLWB" },
{ "CPU_BTVER1_FLAGS",
"CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
{ "CPU_BTVER2_FLAGS",

8
opcodes/i386-init.h
View File

@ -242,6 +242,14 @@
0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0 } }
#define CPU_ZNVER2_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 1, 0, 0, \
0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
0, 0, 0, 0, 0 } }
#define CPU_BTVER1_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \