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x86: Also handle stores for -muse-unaligned-vector-move

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* config/tc-i386.c (encode_with_unaligned_vector_move): Also
	handle stores.
	* testsuite/gas/i386/unaligned-vector-move.s: Add stores.
	* testsuite/gas/i386/unaligned-vector-move.d: Updated.
	* testsuite/gas/i386/x86-64-unaligned-vector-move.d: Likewise.
This commit is contained in:
H.J. Lu 2021-10-23 07:37:33 -07:00
parent 9de46719da
commit b3a9fe6f51
4 changed files with 74 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
gas/config/tc-i386.c
View File

@ -4083,13 +4083,15 @@ encode_with_unaligned_vector_move (void)
{
switch (i.tm.base_opcode)
{
case 0x28:
case 0x28: /* Load instructions. */
case 0x29: /* Store instructions. */
/* movaps/movapd/vmovaps/vmovapd. */
if (i.tm.opcode_modifier.opcodespace == SPACE_0F
&& i.tm.opcode_modifier.opcodeprefix <= PREFIX_0X66)
i.tm.base_opcode = 0x10;
i.tm.base_opcode = 0x10 | (i.tm.base_opcode & 1);
break;
case 0x6f:
case 0x6f: /* Load instructions. */
case 0x7f: /* Store instructions. */
/* movdqa/vmovdqa/vmovdqa64/vmovdqa32. */
if (i.tm.opcode_modifier.opcodespace == SPACE_0F
&& i.tm.opcode_modifier.opcodeprefix == PREFIX_0X66)

27
gas/testsuite/gas/i386/unaligned-vector-move.d
View File

@ -9,14 +9,33 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 0f 10 d1 movups %xmm1,%xmm2
+[a-f0-9]+: 0f 10 10 movups \(%eax\),%xmm2
+[a-f0-9]+: 0f 11 08 movups %xmm1,\(%eax\)
+[a-f0-9]+: 66 0f 10 d1 movupd %xmm1,%xmm2
+[a-f0-9]+: 66 0f 10 10 movupd \(%eax\),%xmm2
+[a-f0-9]+: 66 0f 11 08 movupd %xmm1,\(%eax\)
+[a-f0-9]+: f3 0f 6f d1 movdqu %xmm1,%xmm2
+[a-f0-9]+: f3 0f 6f 10 movdqu \(%eax\),%xmm2
+[a-f0-9]+: f3 0f 7f 08 movdqu %xmm1,\(%eax\)
+[a-f0-9]+: c5 f8 10 d1 vmovups %xmm1,%xmm2
+[a-f0-9]+: c5 f8 10 10 vmovups \(%eax\),%xmm2
+[a-f0-9]+: c5 f8 11 08 vmovups %xmm1,\(%eax\)
+[a-f0-9]+: c5 f9 10 d1 vmovupd %xmm1,%xmm2
+[a-f0-9]+: c5 f9 10 10 vmovupd \(%eax\),%xmm2
+[a-f0-9]+: c5 f9 11 08 vmovupd %xmm1,\(%eax\)
+[a-f0-9]+: c5 fa 6f d1 vmovdqu %xmm1,%xmm2
+[a-f0-9]+: c5 f8 10 d1 vmovups %xmm1,%xmm2
+[a-f0-9]+: 62 f1 fd 09 10 d1 vmovupd %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: c5 fa 6f 10 vmovdqu \(%eax\),%xmm2
+[a-f0-9]+: c5 fa 7f 08 vmovdqu %xmm1,\(%eax\)
+[a-f0-9]+: 62 f1 7c 09 10 d1 vmovups %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 7e 09 6f d1 vmovdqu32 %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 fe 09 6f d1 vmovdqu64 %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 7c 09 10 10 vmovups \(%eax\),%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 7c 09 11 08 vmovups %xmm1,\(%eax\)\{%k1\}
+[a-f0-9]+: 62 f1 fd 09 10 d1 vmovupd %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 fd 09 10 10 vmovupd \(%eax\),%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 fd 09 11 08 vmovupd %xmm1,\(%eax\)\{%k1\}
+[a-f0-9]+: 62 f1 7e 08 6f d1 vmovdqu32 %xmm1,%xmm2
+[a-f0-9]+: 62 f1 7e 08 6f 10 vmovdqu32 \(%eax\),%xmm2
+[a-f0-9]+: 62 f1 7e 08 7f 08 vmovdqu32 %xmm1,\(%eax\)
+[a-f0-9]+: 62 f1 fe 08 6f d1 vmovdqu64 %xmm1,%xmm2
+[a-f0-9]+: 62 f1 fe 08 6f 10 vmovdqu64 \(%eax\),%xmm2
+[a-f0-9]+: 62 f1 fe 08 7f 08 vmovdqu64 %xmm1,\(%eax\)
#pass

27
gas/testsuite/gas/i386/unaligned-vector-move.s
View File

@ -3,13 +3,32 @@
.text
_start:
movaps %xmm1, %xmm2
movaps (%eax), %xmm2
movaps %xmm1, (%eax)
movapd %xmm1, %xmm2
movapd (%eax), %xmm2
movapd %xmm1, (%eax)
movdqa %xmm1, %xmm2
movdqa (%eax), %xmm2
movdqa %xmm1, (%eax)
vmovaps %xmm1, %xmm2
vmovaps (%eax), %xmm2
vmovaps %xmm1, (%eax)
vmovapd %xmm1, %xmm2
vmovapd (%eax), %xmm2
vmovapd %xmm1, (%eax)
vmovdqa %xmm1, %xmm2
vmovaps %xmm1, %xmm2
vmovapd %xmm1, %xmm2{%k1}
vmovdqa (%eax), %xmm2
vmovdqa %xmm1, (%eax)
vmovaps %xmm1, %xmm2{%k1}
vmovdqa32 %xmm1, %xmm2{%k1}
vmovdqa64 %xmm1, %xmm2{%k1}
vmovaps (%eax), %xmm2{%k1}
vmovaps %xmm1, (%eax){%k1}
vmovapd %xmm1, %xmm2{%k1}
vmovapd (%eax), %xmm2{%k1}
vmovapd %xmm1, (%eax){%k1}
vmovdqa32 %xmm1, %xmm2
vmovdqa32 (%eax), %xmm2
vmovdqa32 %xmm1, (%eax)
vmovdqa64 %xmm1, %xmm2
vmovdqa64 (%eax), %xmm2
vmovdqa64 %xmm1, (%eax)

27
gas/testsuite/gas/i386/x86-64-unaligned-vector-move.d
View File

@ -10,14 +10,33 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 0f 10 d1 movups %xmm1,%xmm2
+[a-f0-9]+: 67 0f 10 10 movups \(%eax\),%xmm2
+[a-f0-9]+: 67 0f 11 08 movups %xmm1,\(%eax\)
+[a-f0-9]+: 66 0f 10 d1 movupd %xmm1,%xmm2
+[a-f0-9]+: 67 66 0f 10 10 movupd \(%eax\),%xmm2
+[a-f0-9]+: 67 66 0f 11 08 movupd %xmm1,\(%eax\)
+[a-f0-9]+: f3 0f 6f d1 movdqu %xmm1,%xmm2
+[a-f0-9]+: 67 f3 0f 6f 10 movdqu \(%eax\),%xmm2
+[a-f0-9]+: 67 f3 0f 7f 08 movdqu %xmm1,\(%eax\)
+[a-f0-9]+: c5 f8 10 d1 vmovups %xmm1,%xmm2
+[a-f0-9]+: 67 c5 f8 10 10 vmovups \(%eax\),%xmm2
+[a-f0-9]+: 67 c5 f8 11 08 vmovups %xmm1,\(%eax\)
+[a-f0-9]+: c5 f9 10 d1 vmovupd %xmm1,%xmm2
+[a-f0-9]+: 67 c5 f9 10 10 vmovupd \(%eax\),%xmm2
+[a-f0-9]+: 67 c5 f9 11 08 vmovupd %xmm1,\(%eax\)
+[a-f0-9]+: c5 fa 6f d1 vmovdqu %xmm1,%xmm2
+[a-f0-9]+: c5 f8 10 d1 vmovups %xmm1,%xmm2
+[a-f0-9]+: 62 f1 fd 09 10 d1 vmovupd %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 67 c5 fa 6f 10 vmovdqu \(%eax\),%xmm2
+[a-f0-9]+: 67 c5 fa 7f 08 vmovdqu %xmm1,\(%eax\)
+[a-f0-9]+: 62 f1 7c 09 10 d1 vmovups %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 7e 09 6f d1 vmovdqu32 %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 62 f1 fe 09 6f d1 vmovdqu64 %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 67 62 f1 7c 09 10 10 vmovups \(%eax\),%xmm2\{%k1\}
+[a-f0-9]+: 67 62 f1 7c 09 11 08 vmovups %xmm1,\(%eax\)\{%k1\}
+[a-f0-9]+: 62 f1 fd 09 10 d1 vmovupd %xmm1,%xmm2\{%k1\}
+[a-f0-9]+: 67 62 f1 fd 09 10 10 vmovupd \(%eax\),%xmm2\{%k1\}
+[a-f0-9]+: 67 62 f1 fd 09 11 08 vmovupd %xmm1,\(%eax\)\{%k1\}
+[a-f0-9]+: 62 f1 7e 08 6f d1 vmovdqu32 %xmm1,%xmm2
+[a-f0-9]+: 67 62 f1 7e 08 6f 10 vmovdqu32 \(%eax\),%xmm2
+[a-f0-9]+: 67 62 f1 7e 08 7f 08 vmovdqu32 %xmm1,\(%eax\)
+[a-f0-9]+: 62 f1 fe 08 6f d1 vmovdqu64 %xmm1,%xmm2
+[a-f0-9]+: 67 62 f1 fe 08 6f 10 vmovdqu64 \(%eax\),%xmm2
+[a-f0-9]+: 67 62 f1 fe 08 7f 08 vmovdqu64 %xmm1,\(%eax\)
#pass