[aarch64] Add TPIDR2 register support for Linux
With the AArch64 Scalable Matrix Extension we have a new TPIDR2 register, and it will be added to the existing NT_ARM_TLS register set. Kernel patches are being reviewed here: https://lore.kernel.org/linux-arm-kernel/20220818170111.351889-1-broonie@kernel.org/ From GDB's perspective, we handle it in a similar way to the existing TPIDR register. But we need to consider cases of systems that only have TPIDR and systems that have both TPIDR and TPIDR2. With that in mind, the following patch adds the required code to support TPIDR2 and turns the org.gnu.gdb.aarch64.tls feature into a dynamically-generated target description as opposed to a static target description containing only TPIDR. That means we can remove the gdb/features/aarch64-tls.xml file and replace the existing gdb/features/aarch64-tls.c auto-generated file with a new file that dynamically generates the target description containing either TPIDR alone or TPIDR and TPIDR2. In the future, when *BSD's start to support this register, they can just enable it as is being done for the AArch64 Linux target. The core file read/write code has been updated to support TPIDR2 as well. On GDBserver's side, there is a small change to the find_regno function to expose a non-throwing version of it. It always seemed strange to me how find_regno causes the whole operation to abort if it doesn't find a particular register name. The patch moves code from find_regno into find_regno_no_throw and makes find_regno call find_regno_no_throw instead. This allows us to do register name lookups to find a particular register number without risking erroring out if nothing is found. The patch also adjusts the feature detection code for aarch64-fbsd, since the infrastructure is shared amongst all aarch64 targets. I haven't added code to support TPIDR2 in aarch64-fbsd though, as I'm not sure when/if that will happen.
This commit is contained in:
Luis Machado
parent
73425813c1
commit
ba60b96371
@ -93,7 +93,7 @@ aarch64_fbsd_nat_target::fetch_registers (struct regcache *regcache,
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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if (tdep->has_tls ())
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fetch_regset<uint64_t> (regcache, regnum, NT_ARM_TLS,
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&aarch64_fbsd_tls_regset, tdep->tls_regnum);
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&aarch64_fbsd_tls_regset, tdep->tls_regnum_base);
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}
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/* Store register REGNUM back into the inferior. If REGNUM is -1, do
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@ -112,7 +112,7 @@ aarch64_fbsd_nat_target::store_registers (struct regcache *regcache,
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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if (tdep->has_tls ())
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store_regset<uint64_t> (regcache, regnum, NT_ARM_TLS,
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&aarch64_fbsd_tls_regset, tdep->tls_regnum);
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&aarch64_fbsd_tls_regset, tdep->tls_regnum_base);
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}
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/* Implement the target read_description method. */
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@ -121,7 +121,7 @@ const struct target_desc *
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aarch64_fbsd_nat_target::read_description ()
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{
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aarch64_features features;
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features.tls = have_regset (inferior_ptid, NT_ARM_TLS) != 0;
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features.tls = have_regset (inferior_ptid, NT_ARM_TLS)? 1 : 0;
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return aarch64_read_description (features);
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}
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@ -50,7 +50,7 @@ static const struct regcache_map_entry aarch64_fbsd_fpregmap[] =
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{ 0 }
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};
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/* Register numbers are relative to tdep->tls_regnum. */
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/* Register numbers are relative to tdep->tls_regnum_base. */
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static const struct regcache_map_entry aarch64_fbsd_tls_regmap[] =
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{
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@ -151,7 +151,7 @@ aarch64_fbsd_supply_tls_regset (const struct regset *regset,
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struct gdbarch *gdbarch = regcache->arch ();
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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regcache->supply_regset (regset, tdep->tls_regnum, regnum, buf, size);
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regcache->supply_regset (regset, tdep->tls_regnum_base, regnum, buf, size);
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}
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static void
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@ -162,7 +162,7 @@ aarch64_fbsd_collect_tls_regset (const struct regset *regset,
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struct gdbarch *gdbarch = regcache->arch ();
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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regcache->collect_regset (regset, tdep->tls_regnum, regnum, buf, size);
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regcache->collect_regset (regset, tdep->tls_regnum_base, regnum, buf, size);
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}
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const struct regset aarch64_fbsd_tls_regset =
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@ -201,7 +201,7 @@ aarch64_fbsd_core_read_description (struct gdbarch *gdbarch,
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asection *tls = bfd_get_section_by_name (abfd, ".reg-aarch-tls");
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aarch64_features features;
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features.tls = tls != nullptr;
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features.tls = tls != nullptr? 1 : 0;
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return aarch64_read_description (features);
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}
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@ -218,10 +218,10 @@ aarch64_fbsd_get_thread_local_address (struct gdbarch *gdbarch, ptid_t ptid,
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regcache = get_thread_arch_regcache (current_inferior ()->process_target (),
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ptid, gdbarch);
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target_fetch_registers (regcache, tdep->tls_regnum);
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target_fetch_registers (regcache, tdep->tls_regnum_base);
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ULONGEST tpidr;
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if (regcache->cooked_read (tdep->tls_regnum, &tpidr) != REG_VALID)
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if (regcache->cooked_read (tdep->tls_regnum_base, &tpidr) != REG_VALID)
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error (_("Unable to fetch %%tpidr"));
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/* %tpidr points to the TCB whose first member is the dtv
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@ -440,21 +440,22 @@ fetch_tlsregs_from_thread (struct regcache *regcache)
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{
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aarch64_gdbarch_tdep *tdep
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= gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
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int regno = tdep->tls_regnum;
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int regno = tdep->tls_regnum_base;
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gdb_assert (regno != -1);
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gdb_assert (tdep->tls_register_count > 0);
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uint64_t tpidr = 0;
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uint64_t tpidrs[tdep->tls_register_count] = { 0 };
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struct iovec iovec;
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iovec.iov_base = &tpidr;
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iovec.iov_len = sizeof (tpidr);
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iovec.iov_base = tpidrs;
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iovec.iov_len = sizeof (tpidrs);
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int tid = get_ptrace_pid (regcache->ptid ());
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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perror_with_name (_("unable to fetch TLS register"));
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perror_with_name (_("unable to fetch TLS registers"));
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regcache->raw_supply (regno, &tpidr);
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for (int i = 0; i < tdep->tls_register_count; i++)
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regcache->raw_supply (regno + i, &tpidrs[i]);
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}
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/* Store to the current thread the valid TLS register set in GDB's
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@ -465,21 +466,24 @@ store_tlsregs_to_thread (struct regcache *regcache)
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{
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aarch64_gdbarch_tdep *tdep
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= gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
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int regno = tdep->tls_regnum;
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int regno = tdep->tls_regnum_base;
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gdb_assert (regno != -1);
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gdb_assert (tdep->tls_register_count > 0);
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uint64_t tpidr = 0;
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uint64_t tpidrs[tdep->tls_register_count] = { 0 };
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if (REG_VALID != regcache->get_register_status (regno))
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return;
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for (int i = 0; i < tdep->tls_register_count; i++)
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{
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if (REG_VALID != regcache->get_register_status (regno + i))
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continue;
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regcache->raw_collect (regno, (char *) &tpidr);
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regcache->raw_collect (regno + i, (char *) &tpidrs[i]);
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}
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struct iovec iovec;
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iovec.iov_base = &tpidr;
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iovec.iov_len = sizeof (tpidr);
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iovec.iov_base = &tpidrs;
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iovec.iov_len = sizeof (tpidrs);
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int tid = get_ptrace_pid (regcache->ptid ());
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if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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@ -531,7 +535,9 @@ aarch64_fetch_registers (struct regcache *regcache, int regno)
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&& (regno == tdep->mte_reg_base))
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fetch_mteregs_from_thread (regcache);
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if (tdep->has_tls () && regno == tdep->tls_regnum)
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if (tdep->has_tls ()
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&& regno >= tdep->tls_regnum_base
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&& regno < tdep->tls_regnum_base + tdep->tls_register_count)
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fetch_tlsregs_from_thread (regcache);
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}
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@ -607,7 +613,9 @@ aarch64_store_registers (struct regcache *regcache, int regno)
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&& (regno == tdep->mte_reg_base))
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store_mteregs_to_thread (regcache);
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if (tdep->has_tls () && regno == tdep->tls_regnum)
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if (tdep->has_tls ()
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&& regno >= tdep->tls_regnum_base
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&& regno < tdep->tls_regnum_base + tdep->tls_register_count)
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store_tlsregs_to_thread (regcache);
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}
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@ -788,7 +796,7 @@ aarch64_linux_nat_target::read_description ()
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features.vq = aarch64_sve_get_vq (tid);
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features.pauth = hwcap & AARCH64_HWCAP_PACA;
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features.mte = hwcap2 & HWCAP2_MTE;
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features.tls = true;
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features.tls = aarch64_tls_register_count (tid);
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return aarch64_read_description (features);
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}
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@ -754,22 +754,30 @@ aarch64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
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"MTE registers", cb_data);
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}
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/* Handle the TLS registers. */
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if (tdep->has_tls ())
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{
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gdb_assert (tdep->tls_regnum_base != -1);
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gdb_assert (tdep->tls_register_count > 0);
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int sizeof_tls_regset
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= AARCH64_TLS_REGISTER_SIZE * tdep->tls_register_count;
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const struct regcache_map_entry tls_regmap[] =
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{
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{ 1, tdep->tls_regnum, 8 },
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{ tdep->tls_register_count, tdep->tls_regnum_base,
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AARCH64_TLS_REGISTER_SIZE },
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{ 0 }
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};
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const struct regset aarch64_linux_tls_regset =
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{
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tls_regmap, regcache_supply_regset, regcache_collect_regset
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tls_regmap, regcache_supply_regset, regcache_collect_regset,
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REGSET_VARIABLE_SIZE
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};
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cb (".reg-aarch-tls", AARCH64_LINUX_SIZEOF_TLSREGSET,
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AARCH64_LINUX_SIZEOF_TLSREGSET, &aarch64_linux_tls_regset,
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"TLS register", cb_data);
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cb (".reg-aarch-tls", sizeof_tls_regset, sizeof_tls_regset,
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&aarch64_linux_tls_regset, "TLS register", cb_data);
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}
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}
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@ -779,7 +787,6 @@ static const struct target_desc *
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aarch64_linux_core_read_description (struct gdbarch *gdbarch,
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struct target_ops *target, bfd *abfd)
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{
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asection *tls = bfd_get_section_by_name (abfd, ".reg-aarch-tls");
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gdb::optional<gdb::byte_vector> auxv = target_read_auxv_raw (target);
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CORE_ADDR hwcap = linux_get_hwcap (auxv, target, gdbarch);
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CORE_ADDR hwcap2 = linux_get_hwcap2 (auxv, target, gdbarch);
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@ -788,7 +795,16 @@ aarch64_linux_core_read_description (struct gdbarch *gdbarch,
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features.vq = aarch64_linux_core_read_vq (gdbarch, abfd);
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features.pauth = hwcap & AARCH64_HWCAP_PACA;
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features.mte = hwcap2 & HWCAP2_MTE;
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features.tls = tls != nullptr;
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/* Handle the TLS section. */
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asection *tls = bfd_get_section_by_name (abfd, ".reg-aarch-tls");
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if (tls != nullptr)
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{
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size_t size = bfd_section_size (tls);
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/* Convert the size to the number of actual registers, by
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dividing by 8. */
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features.tls = size / AARCH64_TLS_REGISTER_SIZE;
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}
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return aarch64_read_description (features);
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}
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@ -39,9 +39,6 @@
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/* The MTE regset consists of a 64-bit register. */
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#define AARCH64_LINUX_SIZEOF_MTE_REGSET (8)
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/* The TLS regset consists of a single register. */
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#define AARCH64_LINUX_SIZEOF_TLSREGSET (X_REGISTER_SIZE)
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extern const struct regset aarch64_linux_gregset;
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extern const struct regset aarch64_linux_fpregset;
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@ -3465,8 +3465,18 @@ aarch64_features_from_target_desc (const struct target_desc *tdesc)
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= (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.pauth") != nullptr);
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features.mte
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= (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.mte") != nullptr);
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features.tls
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= (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.tls") != nullptr);
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const struct tdesc_feature *tls_feature
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= tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.tls");
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if (tls_feature != nullptr)
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{
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/* We have TLS registers. Find out how many. */
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if (tdesc_unnumbered_register (tls_feature, "tpidr2"))
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features.tls = 2;
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else
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features.tls = 1;
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}
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return features;
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}
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@ -3526,7 +3536,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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bool valid_p = true;
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int i, num_regs = 0, num_pseudo_regs = 0;
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int first_pauth_regnum = -1, ra_sign_state_offset = -1;
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int first_mte_regnum = -1, tls_regnum = -1;
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int first_mte_regnum = -1, first_tls_regnum = -1;
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uint64_t vq = aarch64_get_tdesc_vq (info.target_desc);
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if (vq > AARCH64_MAX_SVE_VQ)
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@ -3614,15 +3624,38 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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}
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/* Add the TLS register. */
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int tls_register_count = 0;
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if (feature_tls != nullptr)
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{
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tls_regnum = num_regs;
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/* Validate the descriptor provides the mandatory TLS register
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and allocate its number. */
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valid_p = tdesc_numbered_register (feature_tls, tdesc_data.get (),
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tls_regnum, "tpidr");
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first_tls_regnum = num_regs;
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num_regs++;
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/* Look for the TLS registers. tpidr is required, but tpidr2 is
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optional. */
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valid_p
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= tdesc_numbered_register (feature_tls, tdesc_data.get (),
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first_tls_regnum, "tpidr");
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if (valid_p)
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{
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tls_register_count++;
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bool has_tpidr2
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= tdesc_numbered_register (feature_tls, tdesc_data.get (),
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first_tls_regnum + tls_register_count,
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"tpidr2");
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/* Figure out how many TLS registers we have. */
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if (has_tpidr2)
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tls_register_count++;
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num_regs += tls_register_count;
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}
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else
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{
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warning (_("Provided TLS register feature doesn't contain "
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"required tpidr register."));
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return nullptr;
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}
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}
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/* Add the pauth registers. */
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@ -3675,7 +3708,8 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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tdep->pauth_reg_base = first_pauth_regnum;
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tdep->ra_sign_state_regnum = -1;
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tdep->mte_reg_base = first_mte_regnum;
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tdep->tls_regnum = tls_regnum;
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tdep->tls_regnum_base = first_tls_regnum;
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tdep->tls_register_count = tls_register_count;
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set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call);
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set_gdbarch_frame_align (gdbarch, aarch64_frame_align);
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@ -111,12 +111,13 @@ struct aarch64_gdbarch_tdep : gdbarch_tdep_base
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return mte_reg_base != -1;
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}
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/* TLS register. This is -1 if the TLS register is not available. */
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int tls_regnum = 0;
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/* TLS registers. This is -1 if the TLS registers are not available. */
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int tls_regnum_base = 0;
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int tls_register_count = 0;
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bool has_tls() const
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{
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return tls_regnum != -1;
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return tls_regnum_base != -1;
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}
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/* The W pseudo-registers. */
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@ -53,8 +53,9 @@ aarch64_create_target_description (const aarch64_features &features)
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if (features.mte)
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regnum = create_feature_aarch64_mte (tdesc.get (), regnum);
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if (features.tls)
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regnum = create_feature_aarch64_tls (tdesc.get (), regnum);
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/* TLS registers. */
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if (features.tls > 0)
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regnum = create_feature_aarch64_tls (tdesc.get (), regnum, features.tls);
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return tdesc.release ();
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}
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@ -33,7 +33,9 @@ struct aarch64_features
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bool pauth = false;
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bool mte = false;
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bool tls = false;
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/* A positive TLS value indicates the number of TLS registers available. */
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uint8_t tls = 0;
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};
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inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
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@ -56,7 +58,9 @@ namespace std
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h = features.vq;
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h = h << 1 | features.pauth;
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h = h << 1 | features.mte;
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h = h << 1 | features.tls;
|
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/* Shift by two bits for now. We may need to increase this in the future
|
||||
if more TLS registers get added. */
|
||||
h = h << 2 | features.tls;
|
||||
return h;
|
||||
}
|
||||
};
|
||||
@ -96,7 +100,9 @@ enum aarch64_regnum
|
||||
AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
|
||||
};
|
||||
|
||||
#define V_REGISTER_SIZE 16
|
||||
/* Sizes of various AArch64 registers. */
|
||||
#define AARCH64_TLS_REGISTER_SIZE 8
|
||||
#define V_REGISTER_SIZE 16
|
||||
|
||||
/* Pseudo register base numbers. */
|
||||
#define AARCH64_Q0_REGNUM 0
|
||||
@ -117,8 +123,6 @@ enum aarch64_regnum
|
||||
#define AARCH64_NUM_REGS AARCH64_FPCR_REGNUM + 1
|
||||
#define AARCH64_SVE_NUM_REGS AARCH64_SVE_VG_REGNUM + 1
|
||||
|
||||
#define AARCH64_TLS_REGS_SIZE (8)
|
||||
|
||||
/* There are a number of ways of expressing the current SVE vector size:
|
||||
|
||||
VL : Vector Length.
|
||||
|
||||
@ -202,7 +202,6 @@ FEATURE_XMLFILES = aarch64-core.xml \
|
||||
aarch64-fpu.xml \
|
||||
aarch64-pauth.xml \
|
||||
aarch64-mte.xml \
|
||||
aarch64-tls.xml \
|
||||
arc/v1-core.xml \
|
||||
arc/v1-aux.xml \
|
||||
arc/v2-core.xml \
|
||||
|
||||
@ -1,14 +1,43 @@
|
||||
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
|
||||
Original: aarch64-tls.xml */
|
||||
/* Copyright (C) 2022 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GDB.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
#include "gdbsupport/tdesc.h"
|
||||
|
||||
/* This function is NOT auto generated from xml.
|
||||
|
||||
Create the aarch64 description containing the TLS registers. TPIDR is
|
||||
always available, but TPIDR2 is only available on some systems.
|
||||
|
||||
COUNT is the number of registers in this set. The minimum is 1. */
|
||||
|
||||
static int
|
||||
create_feature_aarch64_tls (struct target_desc *result, long regnum)
|
||||
create_feature_aarch64_tls (struct target_desc *result, long regnum, int count)
|
||||
{
|
||||
/* TPIDR is always present. */
|
||||
gdb_assert (count >= 1);
|
||||
|
||||
struct tdesc_feature *feature;
|
||||
|
||||
feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.tls");
|
||||
tdesc_create_reg (feature, "tpidr", regnum++, 1, NULL, 64, "data_ptr");
|
||||
|
||||
/* Add TPIDR2. */
|
||||
if (count > 1)
|
||||
tdesc_create_reg (feature, "tpidr2", regnum++, 1, NULL, 64, "data_ptr");
|
||||
|
||||
return regnum;
|
||||
}
|
||||
|
||||
@ -1,11 +0,0 @@
|
||||
<?xml version="1.0"?>
|
||||
<!-- Copyright (C) 2022 Free Software Foundation, Inc.
|
||||
|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
|
||||
|
||||
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
|
||||
<feature name="org.gnu.gdb.aarch64.tls">
|
||||
<reg name="tpidr" bitsize="64" type="data_ptr"/>
|
||||
</feature>
|
||||
@ -250,3 +250,24 @@ aarch64_ps_get_thread_area (struct ps_prochandle *ph,
|
||||
|
||||
return PS_OK;
|
||||
}
|
||||
|
||||
/* See nat/aarch64-linux.h. */
|
||||
|
||||
int
|
||||
aarch64_tls_register_count (int tid)
|
||||
{
|
||||
uint64_t tls_regs[2];
|
||||
struct iovec iovec;
|
||||
iovec.iov_base = tls_regs;
|
||||
iovec.iov_len = sizeof (tls_regs);
|
||||
|
||||
/* Attempt to read both TPIDR and TPIDR2. If the request fails, it means
|
||||
the Linux Kernel does not support TPIDR2.
|
||||
|
||||
Otherwise the Linux Kernel supports both TPIDR and TPIDR2. */
|
||||
if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
|
||||
return 1;
|
||||
|
||||
/* TPIDR2 is available as well. */
|
||||
return 2;
|
||||
}
|
||||
|
||||
@ -129,4 +129,8 @@ ps_err_e aarch64_ps_get_thread_area (struct ps_prochandle *ph,
|
||||
lwpid_t lwpid, int idx, void **base,
|
||||
int is_64bit_p);
|
||||
|
||||
/* Return the number of TLS registers in the NT_ARM_TLS set. This is only
|
||||
used for aarch64 state. */
|
||||
int aarch64_tls_register_count (int tid);
|
||||
|
||||
#endif /* NAT_AARCH64_LINUX_H */
|
||||
|
||||
@ -292,9 +292,16 @@ aarch64_store_mteregset (struct regcache *regcache, const void *buf)
|
||||
static void
|
||||
aarch64_fill_tlsregset (struct regcache *regcache, void *buf)
|
||||
{
|
||||
gdb_byte *tls_buf = (gdb_byte *) buf;
|
||||
int tls_regnum = find_regno (regcache->tdesc, "tpidr");
|
||||
|
||||
collect_register (regcache, tls_regnum, buf);
|
||||
collect_register (regcache, tls_regnum, tls_buf);
|
||||
|
||||
/* Read TPIDR2, if it exists. */
|
||||
gdb::optional<int> regnum = find_regno_no_throw (regcache->tdesc, "tpidr2");
|
||||
|
||||
if (regnum.has_value ())
|
||||
collect_register (regcache, *regnum, tls_buf + sizeof (uint64_t));
|
||||
}
|
||||
|
||||
/* Store TLS register to regcache. */
|
||||
@ -302,9 +309,16 @@ aarch64_fill_tlsregset (struct regcache *regcache, void *buf)
|
||||
static void
|
||||
aarch64_store_tlsregset (struct regcache *regcache, const void *buf)
|
||||
{
|
||||
gdb_byte *tls_buf = (gdb_byte *) buf;
|
||||
int tls_regnum = find_regno (regcache->tdesc, "tpidr");
|
||||
|
||||
supply_register (regcache, tls_regnum, buf);
|
||||
supply_register (regcache, tls_regnum, tls_buf);
|
||||
|
||||
/* Write TPIDR2, if it exists. */
|
||||
gdb::optional<int> regnum = find_regno_no_throw (regcache->tdesc, "tpidr2");
|
||||
|
||||
if (regnum.has_value ())
|
||||
supply_register (regcache, *regnum, tls_buf + sizeof (uint64_t));
|
||||
}
|
||||
|
||||
bool
|
||||
@ -795,8 +809,8 @@ aarch64_adjust_register_sets (const struct aarch64_features &features)
|
||||
regset->size = AARCH64_LINUX_SIZEOF_MTE;
|
||||
break;
|
||||
case NT_ARM_TLS:
|
||||
if (features.tls)
|
||||
regset->size = AARCH64_TLS_REGS_SIZE;
|
||||
if (features.tls > 0)
|
||||
regset->size = AARCH64_TLS_REGISTER_SIZE * features.tls;
|
||||
break;
|
||||
default:
|
||||
gdb_assert_not_reached ("Unknown register set found.");
|
||||
@ -829,7 +843,7 @@ aarch64_target::low_arch_setup ()
|
||||
features.pauth = linux_get_hwcap (8) & AARCH64_HWCAP_PACA;
|
||||
/* A-profile MTE is 64-bit only. */
|
||||
features.mte = linux_get_hwcap2 (8) & HWCAP2_MTE;
|
||||
features.tls = true;
|
||||
features.tls = aarch64_tls_register_count (tid);
|
||||
|
||||
current_process ()->tdesc = aarch64_linux_read_description (features);
|
||||
|
||||
|
||||
@ -244,16 +244,28 @@ registers_from_string (struct regcache *regcache, char *buf)
|
||||
hex2bin (buf, registers, len / 2);
|
||||
}
|
||||
|
||||
int
|
||||
find_regno (const struct target_desc *tdesc, const char *name)
|
||||
/* See regcache.h */
|
||||
|
||||
gdb::optional<int>
|
||||
find_regno_no_throw (const struct target_desc *tdesc, const char *name)
|
||||
{
|
||||
for (int i = 0; i < tdesc->reg_defs.size (); ++i)
|
||||
{
|
||||
if (strcmp (name, find_register_by_number (tdesc, i).name) == 0)
|
||||
return i;
|
||||
}
|
||||
internal_error ("Unknown register %s requested",
|
||||
name);
|
||||
return {};
|
||||
}
|
||||
|
||||
int
|
||||
find_regno (const struct target_desc *tdesc, const char *name)
|
||||
{
|
||||
gdb::optional<int> regnum = find_regno_no_throw (tdesc, name);
|
||||
|
||||
if (regnum.has_value ())
|
||||
return *regnum;
|
||||
|
||||
internal_error ("Unknown register %s requested", name);
|
||||
}
|
||||
|
||||
static void
|
||||
|
||||
@ -110,6 +110,11 @@ int register_cache_size (const struct target_desc *tdesc);
|
||||
|
||||
int register_size (const struct target_desc *tdesc, int n);
|
||||
|
||||
/* No throw version of find_regno. If NAME is not a known register, return
|
||||
an empty value. */
|
||||
gdb::optional<int> find_regno_no_throw (const struct target_desc *tdesc,
|
||||
const char *name);
|
||||
|
||||
int find_regno (const struct target_desc *tdesc, const char *name);
|
||||
|
||||
void supply_register (struct regcache *regcache, int n, const void *buf);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user