Optimize x86 GOT32X/GOTPCRELX relocations

R_386_GOT32X, R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations
retrieve the symbol address via its GOT slot.  If the symbol address is
known at the link-time, we can use it directly by changing instruction
encoding.  Indirect branch can only be converted to PC relative direct
branch.  MOV can be changed to LEA or encoded differently with signed
address.  The subset of binary operations can be encoded only with
signed address.

If undefined weak symbol is resolved to zero link-time, we can use it
as address.  Zero addresss can't used with PC relative direct branch
when PIC is true since the current PC is unknown.  In 64-bit, 32-bit
relocation for PC relatiave direct branch to zero may also overflow.

If this optimization causes relocation overflow, --no-relax can be used
to work around it.

bfd/

	PR ld/19609
	* elf32-i386.c (elf_i386_convert_load): Convert to R_386_32 for
	load with locally bound symbols if PIC is false or there is no
	base register.  Optimize branch to 0 if PIC is false.
	(elf_i386_relocate_section): Don't generate dynamic relocations
	against undefined weak symbols if PIC is false.
	* elf64-x86-64.c (elf_x86_64_convert_load): Disable optimization
	if we can't estimate relocation overflow with --no-relax.
	Convert to R_X86_64_32S/R_X86_64_32 for load with locally bound
	symbols if PIC is false.  Optimize branch to 0 if PIC is false.
	(elf_x86_64_relocate_section): Don't generate dynamic relocations
	against undefined weak symbols if PIC is false.

ld/

	PR ld/19609
	* testsuite/ld-i386/got1.dd: Updated.
	* testsuite/ld-i386/lea1c.d: Likewise.
	* testsuite/ld-i386/load1-nacl.d: Likewise.
	* testsuite/ld-i386/load1.d: Likewise.
	* testsuite/ld-i386/load4b.d: Likewise.
	* testsuite/ld-i386/load5b.d: Likewise.
	* testsuite/ld-i386/mov1b.d: Likewise.
	* testsuite/ld-x86-64/mov1b.d: Likewise.
	* testsuite/ld-x86-64/mov1d.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* testsuite/ld-x86-64/gotpcrel1.dd: Likewise.
	* testsuite/ld-x86-64/lea1a.d: Likewise.
	* testsuite/ld-x86-64/lea1b.d: Likewise.
	* testsuite/ld-x86-64/lea1c.d: Likewise.
	* testsuite/ld-x86-64/lea1d.d: Likewise.
	* testsuite/ld-x86-64/lea1e.d: Likewise.
	* testsuite/ld-x86-64/lea1f.d: Likewise.
	* testsuite/ld-x86-64/mov1b.d: Likewise.
	* testsuite/ld-x86-64/mov1d.d: Likewise.
	* testsuite/ld-x86-64/pr13082-3b.d: Likewise.
	* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
	* testsuite/ld-x86-64/lea1.s: Add tests for 32-bit registers.
	* testsuite/ld-i386/pr19609-1.s: New file.
	* testsuite/ld-i386/pr19609-1a.d: Likewise.
	* testsuite/ld-i386/pr19609-1b.d: Likewise.
	* testsuite/ld-i386/pr19609-1c.d: Likewise.
	* testsuite/ld-i386/pr19609-1d.d: Likewise.
	* testsuite/ld-i386/pr19609-1e.d: Likewise.
	* testsuite/ld-i386/pr19609-1f.d: Likewise.
	* testsuite/ld-i386/pr19609-1g.d: Likewise.
	* testsuite/ld-i386/pr19609-1h.d: Likewise.
	* testsuite/ld-i386/pr19609-1i.d: Likewise.
	* testsuite/ld-i386/pr19609-2.s: Likewise.
	* testsuite/ld-i386/pr19609-2a.d: Likewise.
	* testsuite/ld-i386/pr19609-2b.d: Likewise.
	* testsuite/ld-i386/pr19609-2c.d: Likewise.
	* testsuite/ld-i386/undefweak.s: Likewise.
	* testsuite/ld-i386/undefweaka.d: Likewise.
	* testsuite/ld-i386/undefweakb.d: Likewise.
	* testsuite/ld-x86-64/pr13082-3c.d: Likewise.
	* testsuite/ld-x86-64/pr13082-3d.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1.s: Likewise.
	* testsuite/ld-x86-64/pr19609-1a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1c.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1d.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1e.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1f.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1g.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1h.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1i.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1j.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1k.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1l.d: Likewise.
	* testsuite/ld-x86-64/pr19609-1m.d: Likewise.
	* testsuite/ld-x86-64/pr19609-2.s: Likewise.
	* testsuite/ld-x86-64/pr19609-2a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-2b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-2c.d: Likewise.
	* testsuite/ld-x86-64/pr19609-2d.d: Likewise.
	* testsuite/ld-x86-64/pr19609-3.s: Likewise.
	* testsuite/ld-x86-64/pr19609-3a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-3b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-4.s: Likewise.
	* testsuite/ld-x86-64/pr19609-4a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-4b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-4c.d: Likewise.
	* testsuite/ld-x86-64/pr19609-4d.d: Likewise.
	* testsuite/ld-x86-64/pr19609-4e.d: Likewise.
	* testsuite/ld-x86-64/pr19609-5.s: Likewise.
	* testsuite/ld-x86-64/pr19609-5a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-5b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-5c.d: Likewise.
	* testsuite/ld-x86-64/pr19609-5d.d: Likewise.
	* testsuite/ld-x86-64/pr19609-5e.d: Likewise.
	* testsuite/ld-x86-64/pr19609-6.s: Likewise.
	* testsuite/ld-x86-64/pr19609-6a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-6b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-6c.d: Likewise.
	* testsuite/ld-x86-64/pr19609-6d.d: Likewise.
	* testsuite/ld-x86-64/pr19609-7.s: Likewise.
	* testsuite/ld-x86-64/pr19609-7a.d: Likewise.
	* testsuite/ld-x86-64/pr19609-7b.d: Likewise.
	* testsuite/ld-x86-64/pr19609-7c.d: Likewise.
	* testsuite/ld-x86-64/pr19609-7d.d: Likewise.
	* testsuite/ld-i386/i386.exp: Run undefweak tests and tests for
	PR ld/19609.
	* testsuite/ld-x86-64/x86-64.exp: Run pr13082-3c, pr13082-3d
	and tests for PR ld/19609.
This commit is contained in:
H.J. Lu 2016-02-26 09:38:08 -08:00
parent fc5a9bd57c
commit bae420ef26
92 changed files with 1320 additions and 122 deletions

View File

@ -1,3 +1,18 @@
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19609
* elf32-i386.c (elf_i386_convert_load): Convert to R_386_32 for
load with locally bound symbols if PIC is false or there is no
base register. Optimize branch to 0 if PIC is false.
(elf_i386_relocate_section): Don't generate dynamic relocations
against undefined weak symbols if PIC is false.
* elf64-x86-64.c (elf_x86_64_convert_load): Disable optimization
if we can't estimate relocation overflow with --no-relax.
Convert to R_X86_64_32S/R_X86_64_32 for load with locally bound
symbols if PIC is false. Optimize branch to 0 if PIC is false.
(elf_x86_64_relocate_section): Don't generate dynamic relocations
against undefined weak symbols if PIC is false.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19645

View File

@ -2863,6 +2863,7 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
struct elf_i386_link_hash_table *htab;
bfd_boolean changed_contents;
bfd_boolean changed_relocs;
bfd_boolean is_pic;
bfd_signed_vma *local_got_refcounts;
/* Don't even try to convert non-ELF outputs. */
@ -2889,6 +2890,8 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
changed_relocs = FALSE;
local_got_refcounts = elf_local_got_refcounts (abfd);
is_pic = bfd_link_pic (link_info);
/* Get the section contents. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
@ -2913,6 +2916,7 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
unsigned int addend;
unsigned int nop;
bfd_vma nop_offset;
bfd_boolean to_reloc_32;
if (r_type != R_386_GOT32 && r_type != R_386_GOT32X)
continue;
@ -2929,9 +2933,7 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
modrm = bfd_get_8 (abfd, contents + roff - 1);
baseless = (modrm & 0xc7) == 0x5;
if (r_type == R_386_GOT32X
&& baseless
&& bfd_link_pic (link_info))
if (r_type == R_386_GOT32X && baseless && is_pic)
{
/* For PIC, disallow R_386_GOT32X without a base register
since we don't know what the GOT base is. Allow
@ -2960,7 +2962,7 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
opcode = bfd_get_8 (abfd, contents + roff - 2);
/* It is OK to convert mov to lea. */
/* Convert mov to lea since it has been done for a while. */
if (opcode != 0x8b)
{
/* Only convert R_386_GOT32X relocation for call, jmp or
@ -2968,14 +2970,12 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
instructions. */
if (r_type != R_386_GOT32X)
continue;
/* It is OK to convert indirect branch to direct branch. It
is OK to convert adc, add, and, cmp, or, sbb, sub, test,
xor only when PIC is false. */
if (opcode != 0xff && bfd_link_pic (link_info))
continue;
}
/* Convert to R_386_32 if PIC is false or there is no base
register. */
to_reloc_32 = !is_pic || baseless;
/* Try to convert R_386_GOT32 and R_386_GOT32X. Get the symbol
referred to by the reloc. */
if (r_symndx < symtab_hdr->sh_info)
@ -3010,6 +3010,27 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
if (h->type == STT_GNU_IFUNC)
continue;
/* Undefined weak symbol is only bound locally in executable
and its reference is resolved as 0. */
if (UNDEFINED_WEAK_RESOLVED_TO_ZERO (link_info,
elf_i386_hash_entry (h)))
{
if (opcode == 0xff)
{
/* No direct branch to 0 for PIC. */
if (is_pic)
continue;
else
goto convert_branch;
}
else
{
/* We can convert load of address 0 to R_386_32. */
to_reloc_32 = TRUE;
goto convert_load;
}
}
if (opcode == 0xff)
{
/* We have "call/jmp *foo@GOT[(%reg)]". */
@ -3087,27 +3108,29 @@ convert_branch:
convert_load:
if (opcode == 0x8b)
{
/* Convert "mov foo@GOT(%reg1), %reg2" to
"lea foo@GOTOFF(%reg1), %reg2". */
if (r_type == R_386_GOT32X
&& (baseless || !bfd_link_pic (link_info)))
if (to_reloc_32)
{
/* Convert "mov foo@GOT[(%reg1)], %reg2" to
"mov $foo, %reg2" with R_386_32. */
r_type = R_386_32;
/* For R_386_32, convert
"lea foo@GOTOFF(%reg1), %reg2" to
"lea foo@GOT, %reg2". */
if (!baseless)
{
modrm = 0x5 | (modrm & 0x38);
bfd_put_8 (abfd, modrm, contents + roff - 1);
}
modrm = 0xc0 | (modrm & 0x38) >> 3;
bfd_put_8 (abfd, modrm, contents + roff - 1);
opcode = 0xc7;
}
else
r_type = R_386_GOTOFF;
opcode = 0x8d;
{
/* Convert "mov foo@GOT(%reg1), %reg2" to
"lea foo@GOTOFF(%reg1), %reg2". */
r_type = R_386_GOTOFF;
opcode = 0x8d;
}
}
else
{
/* Only R_386_32 is supported. */
if (!to_reloc_32)
continue;
if (opcode == 0x85)
{
/* Convert "test %reg1, foo@GOT(%reg2)" to
@ -4369,10 +4392,10 @@ r_386_got32:
|| eh->func_pointer_refcount > 0
|| (h->root.type == bfd_link_hash_undefweak
&& !resolved_to_zero))
&& ((h->def_dynamic
&& !h->def_regular)
|| h->root.type == bfd_link_hash_undefweak
|| h->root.type == bfd_link_hash_undefined)))
&& ((h->def_dynamic && !h->def_regular)
/* Undefined weak symbol is bound locally when
PIC is false. */
|| h->root.type == bfd_link_hash_undefweak)))
{
Elf_Internal_Rela outrel;
bfd_boolean skip, relocate;

View File

@ -3070,6 +3070,8 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
bfd_boolean changed_relocs;
bfd_signed_vma *local_got_refcounts;
bfd_vma maxpagesize;
bfd_boolean is_pic;
bfd_boolean require_reloc_pc32;
/* Don't even try to convert non-ELF outputs. */
if (!is_elf_hash_table (link_info->hash))
@ -3105,6 +3107,13 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
goto error_return;
}
is_pic = bfd_link_pic (link_info);
/* TRUE if we can convert only to R_X86_64_PC32. Enable it for
--no-relax. */
require_reloc_pc32
= link_info->disable_target_specific_optimizations > 1;
irelend = internal_relocs + sec->reloc_count;
for (irel = internal_relocs; irel < irelend; irel++)
{
@ -3118,10 +3127,12 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
bfd_signed_vma raddend;
unsigned int opcode;
unsigned int modrm;
bfd_boolean relocx;
bfd_boolean to_reloc_pc32;
if (r_type != R_X86_64_GOTPCREL
&& r_type != R_X86_64_GOTPCRELX
&& r_type != R_X86_64_REX_GOTPCRELX)
relocx = (r_type == R_X86_64_GOTPCRELX
|| r_type == R_X86_64_REX_GOTPCRELX);
if (!relocx && r_type != R_X86_64_GOTPCREL)
continue;
roff = irel->r_offset;
@ -3135,26 +3146,27 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
opcode = bfd_get_8 (abfd, contents + roff - 2);
/* It is OK to convert mov to lea. */
/* Convert mov to lea since it has been done for a while. */
if (opcode != 0x8b)
{
/* Only convert R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX
for mov call, jmp or one of adc, add, and, cmp, or, sbb,
sub, test, xor instructions. */
if (r_type != R_X86_64_GOTPCRELX
&& r_type != R_X86_64_REX_GOTPCRELX)
for call, jmp or one of adc, add, and, cmp, or, sbb, sub,
test, xor instructions. */
if (!relocx)
continue;
/* It is OK to convert indirect branch to direct branch. */
if (opcode != 0xff)
{
/* It is OK to convert adc, add, and, cmp, or, sbb, sub,
test, xor only when PIC is false. */
if (bfd_link_pic (link_info))
continue;
}
}
/* We convert only to R_X86_64_PC32:
1. Branch.
2. R_X86_64_GOTPCREL since we can't modify REX byte.
3. require_reloc_pc32 is true.
4. PIC.
*/
to_reloc_pc32 = (opcode == 0xff
|| !relocx
|| require_reloc_pc32
|| is_pic);
/* Get the symbol referred to by the reloc. */
if (r_symndx < symtab_hdr->sh_info)
{
@ -3195,22 +3207,59 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
/* STT_GNU_IFUNC must keep GOTPCREL relocations. We also
avoid optimizing GOTPCREL relocations againt _DYNAMIC
since ld.so may use its link-time address. */
if ((h->def_regular
|| h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
&& h->type != STT_GNU_IFUNC
&& h != htab->elf.hdynamic
&& SYMBOL_REFERENCES_LOCAL (link_info, h))
if (h->type == STT_GNU_IFUNC)
continue;
/* Undefined weak symbol is only bound locally in executable
and its reference is resolved as 0 without relocation
overflow. We can only perform this optimization for
GOTPCRELX relocations since we need to modify REX byte.
It is OK convert mov with R_X86_64_GOTPCREL to
R_X86_64_PC32. */
if ((relocx || opcode == 0x8b)
&& UNDEFINED_WEAK_RESOLVED_TO_ZERO (link_info,
elf_x86_64_hash_entry (h)))
{
if (opcode == 0xff)
{
/* Skip for branch instructions since R_X86_64_PC32
may overflow. */
if (require_reloc_pc32)
continue;
}
else if (relocx)
{
/* For non-branch instructions, we can convert to
R_X86_64_32/R_X86_64_32S since we know if there
is a REX byte. */
to_reloc_pc32 = FALSE;
}
/* Since we don't know the current PC when PIC is true,
we can't convert to R_X86_64_PC32. */
if (to_reloc_pc32 && is_pic)
continue;
goto convert;
}
else if ((h->def_regular
|| h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
&& h != htab->elf.hdynamic
&& SYMBOL_REFERENCES_LOCAL (link_info, h))
{
/* bfd_link_hash_new or bfd_link_hash_undefined is
set by an assignment in a linker script in
bfd_elf_record_link_assignment. FIXME: If we
ever get a linker error due relocation overflow,
we will skip this optimization. */
set by an assignment in a linker script in
bfd_elf_record_link_assignment. */
if (h->def_regular
&& (h->root.type == bfd_link_hash_new
|| h->root.type == bfd_link_hash_undefined))
goto convert;
{
/* Skip since R_X86_64_32/R_X86_64_32S may overflow. */
if (require_reloc_pc32)
continue;
goto convert;
}
tsec = h->root.u.def.section;
toff = h->root.u.def.value;
symtype = h->type;
@ -3219,6 +3268,10 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
continue;
}
/* We can only estimate relocation overflow for R_X86_64_PC32. */
if (!to_reloc_pc32)
goto convert;
if (tsec->sec_info_type == SEC_INFO_TYPE_MERGE)
{
/* At this stage in linking, no SEC_MERGE symbol has been
@ -3342,15 +3395,55 @@ convert:
}
else
{
unsigned int rex;
unsigned int rex_mask = REX_R;
if (r_type == R_X86_64_REX_GOTPCRELX)
rex = bfd_get_8 (abfd, contents + roff - 3);
else
rex = 0;
if (opcode == 0x8b)
{
/* Convert "mov foo@GOTPCREL(%rip), %reg" to
"lea foo(%rip), %reg". */
opcode = 0x8d;
r_type = R_X86_64_PC32;
if (to_reloc_pc32)
{
/* Convert "mov foo@GOTPCREL(%rip), %reg" to
"lea foo(%rip), %reg". */
opcode = 0x8d;
r_type = R_X86_64_PC32;
}
else
{
/* Convert "mov foo@GOTPCREL(%rip), %reg" to
"mov $foo, %reg". */
opcode = 0xc7;
modrm = bfd_get_8 (abfd, contents + roff - 1);
modrm = 0xc0 | (modrm & 0x38) >> 3;
if ((rex & REX_W) != 0
&& ABI_64_P (link_info->output_bfd))
{
/* Keep the REX_W bit in REX byte for LP64. */
r_type = R_X86_64_32S;
goto rewrite_modrm_rex;
}
else
{
/* If the REX_W bit in REX byte isn't needed,
use R_X86_64_32 and clear the W bit to avoid
sign-extend imm32 to imm64. */
r_type = R_X86_64_32;
/* Clear the W bit in REX byte. */
rex_mask |= REX_W;
goto rewrite_modrm_rex;
}
}
}
else
{
/* R_X86_64_PC32 isn't supported. */
if (to_reloc_pc32)
continue;
modrm = bfd_get_8 (abfd, contents + roff - 1);
if (opcode == 0x85)
{
@ -3366,18 +3459,23 @@ convert:
modrm = 0xc0 | (modrm & 0x38) >> 3 | (opcode & 0x3c);
opcode = 0x81;
}
/* Use R_X86_64_32 with 32-bit operand to avoid relocation
overflow when sign-extending imm32 to imm64. */
r_type = (rex & REX_W) != 0 ? R_X86_64_32S : R_X86_64_32;
rewrite_modrm_rex:
bfd_put_8 (abfd, modrm, contents + roff - 1);
if (r_type == R_X86_64_REX_GOTPCRELX)
if (rex)
{
/* Move the R bit to the B bit in REX byte. */
unsigned int rex = bfd_get_8 (abfd, contents + roff - 3);
rex = (rex & ~REX_R) | (rex & REX_R) >> 2;
rex = (rex & ~rex_mask) | (rex & REX_R) >> 2;
bfd_put_8 (abfd, rex, contents + roff - 3);
}
/* No addend for R_X86_64_32S relocation. */
/* No addend for R_X86_64_32/R_X86_64_32S relocations. */
irel->r_addend = 0;
r_type = R_X86_64_32S;
}
bfd_put_8 (abfd, opcode, contents + roff - 2);
@ -4688,9 +4786,9 @@ direct:
|| eh->func_pointer_refcount > 0
|| (h->root.type == bfd_link_hash_undefweak
&& !resolved_to_zero))
&& ((h->def_dynamic
&& !h->def_regular)
|| h->root.type == bfd_link_hash_undefweak
&& ((h->def_dynamic && !h->def_regular)
/* Undefined weak symbol is bound locally when
PIC is false. */
|| h->root.type == bfd_link_hash_undefined)))
{
Elf_Internal_Rela outrel;

View File

@ -1,3 +1,99 @@
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19609
* testsuite/ld-i386/got1.dd: Updated.
* testsuite/ld-i386/lea1c.d: Likewise.
* testsuite/ld-i386/load1-nacl.d: Likewise.
* testsuite/ld-i386/load1.d: Likewise.
* testsuite/ld-i386/load4b.d: Likewise.
* testsuite/ld-i386/load5b.d: Likewise.
* testsuite/ld-i386/mov1b.d: Likewise.
* testsuite/ld-x86-64/mov1b.d: Likewise.
* testsuite/ld-x86-64/mov1d.d: Likewise.
* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
* testsuite/ld-x86-64/gotpcrel1.dd: Likewise.
* testsuite/ld-x86-64/lea1a.d: Likewise.
* testsuite/ld-x86-64/lea1b.d: Likewise.
* testsuite/ld-x86-64/lea1c.d: Likewise.
* testsuite/ld-x86-64/lea1d.d: Likewise.
* testsuite/ld-x86-64/lea1e.d: Likewise.
* testsuite/ld-x86-64/lea1f.d: Likewise.
* testsuite/ld-x86-64/mov1b.d: Likewise.
* testsuite/ld-x86-64/mov1d.d: Likewise.
* testsuite/ld-x86-64/pr13082-3b.d: Likewise.
* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
* testsuite/ld-x86-64/lea1.s: Add tests for 32-bit registers.
* testsuite/ld-i386/pr19609-1.s: New file.
* testsuite/ld-i386/pr19609-1a.d: Likewise.
* testsuite/ld-i386/pr19609-1b.d: Likewise.
* testsuite/ld-i386/pr19609-1c.d: Likewise.
* testsuite/ld-i386/pr19609-1d.d: Likewise.
* testsuite/ld-i386/pr19609-1e.d: Likewise.
* testsuite/ld-i386/pr19609-1f.d: Likewise.
* testsuite/ld-i386/pr19609-1g.d: Likewise.
* testsuite/ld-i386/pr19609-1h.d: Likewise.
* testsuite/ld-i386/pr19609-1i.d: Likewise.
* testsuite/ld-i386/pr19609-2.s: Likewise.
* testsuite/ld-i386/pr19609-2a.d: Likewise.
* testsuite/ld-i386/pr19609-2b.d: Likewise.
* testsuite/ld-i386/pr19609-2c.d: Likewise.
* testsuite/ld-i386/undefweak.s: Likewise.
* testsuite/ld-i386/undefweaka.d: Likewise.
* testsuite/ld-i386/undefweakb.d: Likewise.
* testsuite/ld-x86-64/pr13082-3c.d: Likewise.
* testsuite/ld-x86-64/pr13082-3d.d: Likewise.
* testsuite/ld-x86-64/pr19609-1.s: Likewise.
* testsuite/ld-x86-64/pr19609-1a.d: Likewise.
* testsuite/ld-x86-64/pr19609-1b.d: Likewise.
* testsuite/ld-x86-64/pr19609-1c.d: Likewise.
* testsuite/ld-x86-64/pr19609-1d.d: Likewise.
* testsuite/ld-x86-64/pr19609-1e.d: Likewise.
* testsuite/ld-x86-64/pr19609-1f.d: Likewise.
* testsuite/ld-x86-64/pr19609-1g.d: Likewise.
* testsuite/ld-x86-64/pr19609-1h.d: Likewise.
* testsuite/ld-x86-64/pr19609-1i.d: Likewise.
* testsuite/ld-x86-64/pr19609-1j.d: Likewise.
* testsuite/ld-x86-64/pr19609-1k.d: Likewise.
* testsuite/ld-x86-64/pr19609-1l.d: Likewise.
* testsuite/ld-x86-64/pr19609-1m.d: Likewise.
* testsuite/ld-x86-64/pr19609-2.s: Likewise.
* testsuite/ld-x86-64/pr19609-2a.d: Likewise.
* testsuite/ld-x86-64/pr19609-2b.d: Likewise.
* testsuite/ld-x86-64/pr19609-2c.d: Likewise.
* testsuite/ld-x86-64/pr19609-2d.d: Likewise.
* testsuite/ld-x86-64/pr19609-3.s: Likewise.
* testsuite/ld-x86-64/pr19609-3a.d: Likewise.
* testsuite/ld-x86-64/pr19609-3b.d: Likewise.
* testsuite/ld-x86-64/pr19609-4.s: Likewise.
* testsuite/ld-x86-64/pr19609-4a.d: Likewise.
* testsuite/ld-x86-64/pr19609-4b.d: Likewise.
* testsuite/ld-x86-64/pr19609-4c.d: Likewise.
* testsuite/ld-x86-64/pr19609-4d.d: Likewise.
* testsuite/ld-x86-64/pr19609-4e.d: Likewise.
* testsuite/ld-x86-64/pr19609-5.s: Likewise.
* testsuite/ld-x86-64/pr19609-5a.d: Likewise.
* testsuite/ld-x86-64/pr19609-5b.d: Likewise.
* testsuite/ld-x86-64/pr19609-5c.d: Likewise.
* testsuite/ld-x86-64/pr19609-5d.d: Likewise.
* testsuite/ld-x86-64/pr19609-5e.d: Likewise.
* testsuite/ld-x86-64/pr19609-6.s: Likewise.
* testsuite/ld-x86-64/pr19609-6a.d: Likewise.
* testsuite/ld-x86-64/pr19609-6b.d: Likewise.
* testsuite/ld-x86-64/pr19609-6c.d: Likewise.
* testsuite/ld-x86-64/pr19609-6d.d: Likewise.
* testsuite/ld-x86-64/pr19609-7.s: Likewise.
* testsuite/ld-x86-64/pr19609-7a.d: Likewise.
* testsuite/ld-x86-64/pr19609-7b.d: Likewise.
* testsuite/ld-x86-64/pr19609-7c.d: Likewise.
* testsuite/ld-x86-64/pr19609-7d.d: Likewise.
* testsuite/ld-i386/i386.exp: Run undefweak tests and tests for
PR ld/19609.
* testsuite/ld-x86-64/x86-64.exp: Run pr13082-3c, pr13082-3d
and tests for PR ld/19609.
2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19645

View File

@ -4,7 +4,7 @@
[ ]*[a-f0-9]+: [ a-f0-9]+ addr16 call [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: [ a-f0-9]+ call \*0x[a-f0-9]+
[ ]*[a-f0-9]+: [ a-f0-9]+ call \*0x[a-f0-9]+
[ ]*[a-f0-9]+: [ a-f0-9]+ lea *0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: [ a-f0-9]+ mov *\$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: ff d0 call \*%eax
[ ]*[a-f0-9]+: [ a-f0-9]+ mov *0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: ff d0 call \*%eax
@ -12,7 +12,7 @@
[ ]*[a-f0-9]+: ff d0 call \*%eax
[ ]*[a-f0-9]+: [ a-f0-9]+ call [a-f0-9]+ <__x86.get_pc_thunk.cx>
[ ]*[a-f0-9]+: [ a-f0-9]+ add \$0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: [ a-f0-9]+ lea *0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: [ a-f0-9]+ mov *\$0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: ff d1 call \*%ecx
[ ]*[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
[ ]*[a-f0-9]+: 6a 00 push \$0x0

View File

@ -350,6 +350,20 @@ run_dump_test "pr19636-4b"
run_dump_test "pr19636-4c"
run_dump_test "pr19636-4d"
run_dump_test "pr19645"
run_dump_test "pr19609-1a"
run_dump_test "pr19609-1b"
run_dump_test "pr19609-1c"
run_dump_test "pr19609-1d"
run_dump_test "pr19609-1e"
run_dump_test "pr19609-1f"
run_dump_test "pr19609-1g"
run_dump_test "pr19609-1h"
run_dump_test "pr19609-1i"
run_dump_test "pr19609-2a"
run_dump_test "pr19609-2b"
run_dump_test "pr19609-2c"
run_dump_test "undefweaka"
run_dump_test "undefweakb"
if { !([istarget "i?86-*-linux*"]
|| [istarget "i?86-*-gnu*"]

View File

@ -9,8 +9,8 @@
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
#pass

View File

@ -16,7 +16,7 @@ SYMBOL TABLE:
Disassembly of section .text:
0+20000 <_start>:
[ ]*[a-f0-9]+: 8d 05 80 00 03 10 lea 0x10030080,%eax
[ ]*[a-f0-9]+: c7 c0 80 00 03 10 mov \$0x10030080,%eax
[ ]*[a-f0-9]+: 81 d0 80 00 03 10 adc \$0x10030080,%eax
[ ]*[a-f0-9]+: 81 c3 80 00 03 10 add \$0x10030080,%ebx
[ ]*[a-f0-9]+: 81 e1 80 00 03 10 and \$0x10030080,%ecx
@ -26,7 +26,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 81 ed 80 00 03 10 sub \$0x10030080,%ebp
[ ]*[a-f0-9]+: 81 f4 80 00 03 10 xor \$0x10030080,%esp
[ ]*[a-f0-9]+: f7 c1 80 00 03 10 test \$0x10030080,%ecx
[ ]*[a-f0-9]+: 8d 05 80 00 03 10 lea 0x10030080,%eax
[ ]*[a-f0-9]+: c7 c0 80 00 03 10 mov \$0x10030080,%eax
[ ]*[a-f0-9]+: 81 d0 80 00 03 10 adc \$0x10030080,%eax
[ ]*[a-f0-9]+: 81 c3 80 00 03 10 add \$0x10030080,%ebx
[ ]*[a-f0-9]+: 81 e1 80 00 03 10 and \$0x10030080,%ecx
@ -36,7 +36,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 81 ed 80 00 03 10 sub \$0x10030080,%ebp
[ ]*[a-f0-9]+: 81 f4 80 00 03 10 xor \$0x10030080,%esp
[ ]*[a-f0-9]+: f7 c1 80 00 03 10 test \$0x10030080,%ecx
[ ]*[a-f0-9]+: 8d 05 81 00 03 10 lea 0x10030081,%eax
[ ]*[a-f0-9]+: c7 c0 81 00 03 10 mov \$0x10030081,%eax
[ ]*[a-f0-9]+: 81 d0 81 00 03 10 adc \$0x10030081,%eax
[ ]*[a-f0-9]+: 81 c3 81 00 03 10 add \$0x10030081,%ebx
[ ]*[a-f0-9]+: 81 e1 81 00 03 10 and \$0x10030081,%ecx
@ -46,7 +46,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 81 ed 81 00 03 10 sub \$0x10030081,%ebp
[ ]*[a-f0-9]+: 81 f4 81 00 03 10 xor \$0x10030081,%esp
[ ]*[a-f0-9]+: f7 c1 81 00 03 10 test \$0x10030081,%ecx
[ ]*[a-f0-9]+: 8d 05 81 00 03 10 lea 0x10030081,%eax
[ ]*[a-f0-9]+: c7 c0 81 00 03 10 mov \$0x10030081,%eax
[ ]*[a-f0-9]+: 81 d0 81 00 03 10 adc \$0x10030081,%eax
[ ]*[a-f0-9]+: 81 c3 81 00 03 10 add \$0x10030081,%ebx
[ ]*[a-f0-9]+: 81 e1 81 00 03 10 and \$0x10030081,%ecx

View File

@ -15,7 +15,7 @@ SYMBOL TABLE:
Disassembly of section .text:
0+8048074 <_start>:
[ ]*[a-f0-9]+: 8d 05 70 91 04 08 lea 0x8049170,%eax
[ ]*[a-f0-9]+: c7 c0 70 91 04 08 mov \$0x8049170,%eax
[ ]*[a-f0-9]+: 81 d0 70 91 04 08 adc \$0x8049170,%eax
[ ]*[a-f0-9]+: 81 c3 70 91 04 08 add \$0x8049170,%ebx
[ ]*[a-f0-9]+: 81 e1 70 91 04 08 and \$0x8049170,%ecx
@ -25,7 +25,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 81 ed 70 91 04 08 sub \$0x8049170,%ebp
[ ]*[a-f0-9]+: 81 f4 70 91 04 08 xor \$0x8049170,%esp
[ ]*[a-f0-9]+: f7 c1 70 91 04 08 test \$0x8049170,%ecx
[ ]*[a-f0-9]+: 8d 05 70 91 04 08 lea 0x8049170,%eax
[ ]*[a-f0-9]+: c7 c0 70 91 04 08 mov \$0x8049170,%eax
[ ]*[a-f0-9]+: 81 d0 70 91 04 08 adc \$0x8049170,%eax
[ ]*[a-f0-9]+: 81 c3 70 91 04 08 add \$0x8049170,%ebx
[ ]*[a-f0-9]+: 81 e1 70 91 04 08 and \$0x8049170,%ecx
@ -35,7 +35,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 81 ed 70 91 04 08 sub \$0x8049170,%ebp
[ ]*[a-f0-9]+: 81 f4 70 91 04 08 xor \$0x8049170,%esp
[ ]*[a-f0-9]+: f7 c1 70 91 04 08 test \$0x8049170,%ecx
[ ]*[a-f0-9]+: 8d 05 71 91 04 08 lea 0x8049171,%eax
[ ]*[a-f0-9]+: c7 c0 71 91 04 08 mov \$0x8049171,%eax
[ ]*[a-f0-9]+: 81 d0 71 91 04 08 adc \$0x8049171,%eax
[ ]*[a-f0-9]+: 81 c3 71 91 04 08 add \$0x8049171,%ebx
[ ]*[a-f0-9]+: 81 e1 71 91 04 08 and \$0x8049171,%ecx
@ -45,7 +45,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 81 ed 71 91 04 08 sub \$0x8049171,%ebp
[ ]*[a-f0-9]+: 81 f4 71 91 04 08 xor \$0x8049171,%esp
[ ]*[a-f0-9]+: f7 c1 71 91 04 08 test \$0x8049171,%ecx
[ ]*[a-f0-9]+: 8d 05 71 91 04 08 lea 0x8049171,%eax
[ ]*[a-f0-9]+: c7 c0 71 91 04 08 mov \$0x8049171,%eax
[ ]*[a-f0-9]+: 81 d0 71 91 04 08 adc \$0x8049171,%eax
[ ]*[a-f0-9]+: 81 c3 71 91 04 08 add \$0x8049171,%ebx
[ ]*[a-f0-9]+: 81 e1 71 91 04 08 and \$0x8049171,%ecx

View File

@ -9,5 +9,5 @@
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
#pass

View File

@ -9,5 +9,5 @@
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
#pass

View File

@ -1,6 +1,6 @@
#source: mov1.s
#as: --32
#ld: -pie -melf_i386
#ld: -pie -melf_i386 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
@ -10,6 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 * mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 * mov \$0x0,%eax
#pass

View File

@ -0,0 +1,12 @@
.text
.weak bar
.globl _start
.type _start, @function
_start:
cmp bar@GOT(%edx), %eax
cmp bar@GOT(%edx), %ecx
mov bar@GOT(%edx), %eax
mov bar@GOT(%edx), %ecx
test bar@GOT(%edx), %eax
test bar@GOT(%edx), %ecx
.size _start, .-_start

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: f7 c0 00 00 00 00 test \$0x0,%eax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -pie -melf_i386 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: f7 c0 00 00 00 00 test \$0x0,%eax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 3b 82 fc ff ff ff cmp -0x4\(%edx\),%eax
[ ]*[a-f0-9]+: 3b 8a fc ff ff ff cmp -0x4\(%edx\),%ecx
[ ]*[a-f0-9]+: 8b 82 fc ff ff ff mov -0x4\(%edx\),%eax
[ ]*[a-f0-9]+: 8b 8a fc ff ff ff mov -0x4\(%edx\),%ecx
[ ]*[a-f0-9]+: 85 82 fc ff ff ff test %eax,-0x4\(%edx\)
[ ]*[a-f0-9]+: 85 8a fc ff ff ff test %ecx,-0x4\(%edx\)

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -E -melf_i386 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: f7 c0 00 00 00 00 test \$0x0,%eax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -shared -E -Bsymbolic -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 3b 82 fc ff ff ff cmp -0x4\(%edx\),%eax
[ ]*[a-f0-9]+: 3b 8a fc ff ff ff cmp -0x4\(%edx\),%ecx
[ ]*[a-f0-9]+: 8b 82 fc ff ff ff mov -0x4\(%edx\),%eax
[ ]*[a-f0-9]+: 8b 8a fc ff ff ff mov -0x4\(%edx\),%ecx
[ ]*[a-f0-9]+: 85 82 fc ff ff ff test %eax,-0x4\(%edx\)
[ ]*[a-f0-9]+: 85 8a fc ff ff ff test %ecx,-0x4\(%edx\)

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -pie --dynamic-list-data -melf_i386 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: f7 c0 00 00 00 00 test \$0x0,%eax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -pie -E -melf_i386 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: f7 c0 00 00 00 00 test \$0x0,%eax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=yes
#ld: -pie -E -Bsymbolic-functions -melf_i386 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 00 cmp \$0x0,%eax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: f7 c0 00 00 00 00 test \$0x0,%eax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx

View File

@ -0,0 +1,17 @@
#source: pr19609-1.s
#as: --32 -mrelax-relocations=no
#ld: -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 3b 82 fc ff ff ff cmp -0x4\(%edx\),%eax
[ ]*[a-f0-9]+: 3b 8a fc ff ff ff cmp -0x4\(%edx\),%ecx
[ ]*[a-f0-9]+: c7 c0 00 00 00 00 mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 85 82 fc ff ff ff test %eax,-0x4\(%edx\)
[ ]*[a-f0-9]+: 85 8a fc ff ff ff test %ecx,-0x4\(%edx\)

View File

@ -0,0 +1,6 @@
.text
.weak bar
.globl _start
.type _start, @function
_start:
call *bar@GOT(%edx)

View File

@ -0,0 +1,12 @@
#source: pr19609-2.s
#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr16 call 0 <_start-0x[0-9a-f]+>

View File

@ -0,0 +1,12 @@
#source: pr19609-2.s
#as: --32 -mrelax-relocations=yes
#ld: -pie -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: ff 92 fc ff ff ff call \*-0x4\(%edx\)

View File

@ -0,0 +1,12 @@
#source: pr19609-2.s
#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: ff 92 fc ff ff ff call \*-0x4\(%edx\)

View File

@ -0,0 +1,10 @@
.text
.globl _start
_start:
mov .Ljmp(%eax), %eax
jmp *(%eax)
.section .data.rel.ro.local,"aw",@progbits
.weak func
.align 8
.Ljmp:
.long func

View File

@ -0,0 +1,9 @@
#source: undefweak.s
#as: --32
#ld: -shared -melf_i386
#readelf: -r --wide
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 2 entries:
Offset Info Type Sym. Value Symbol's Name
[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
[0-9a-f]+ +[0-9a-f]+ +R_386_32 +[0-9a-f]+ +func

View File

@ -0,0 +1,11 @@
#source: undefweak.s
#as: --32
#ld: -pie -melf_i386
#readelf: -r --wide -x .data.rel.ro
Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Sym. Value Symbol's Name
[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
Hex dump of section '.data.rel.ro':
0x[a-f0-9]+ 00000000 ....

View File

@ -12,5 +12,11 @@
[ ]*[a-f0-9]+: 03 83 0c 00 00 00 add 0xc\(%ebx\),%eax
[ ]*[a-f0-9]+: 8b 83 0c 00 00 00 mov 0xc\(%ebx\),%eax
[ ]*[a-f0-9]+: 85 83 0c 00 00 00 test %eax,0xc\(%ebx\)
[ ]*[a-f0-9]+: 8d ([0-9a-f]{2} ){5}[ ]+lea[ ]+.*
[ ]*[a-f0-9]+: c7 c0 b5 80 04 08 mov \$0x80480b5,%eax
0+80480b4 <foo>:
[ ]*[a-f0-9]+: c3 ret
0+80480b5 <bar>:
[ ]*[a-f0-9]+: c3 ret
#pass

View File

@ -12,5 +12,11 @@
[ ]*[a-f0-9]+: 48 03 05 35 00 20 00 add 0x200035\(%rip\),%rax # 600128 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 48 8b 05 2e 00 20 00 mov 0x20002e\(%rip\),%rax # 600128 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 48 85 05 27 00 20 00 test %rax,0x200027\(%rip\) # 600128 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 48 8d ([0-9a-f]{2} ){5}[ ]+lea[ ]+.*
[ ]*[a-f0-9]+: 48 c7 c0 09 01 40 00 mov \$0x400109,%rax
0+400108 <foo>:
[ ]*[a-f0-9]+: c3 retq
0+400109 <bar>:
[ ]*[a-f0-9]+: c3 retq
#pass

View File

@ -12,5 +12,11 @@
[ ]*[a-f0-9]+: 03 83 0c 00 00 00 add 0xc\(%ebx\),%eax
[ ]*[a-f0-9]+: 8b 83 0c 00 00 00 mov 0xc\(%ebx\),%eax
[ ]*[a-f0-9]+: 85 83 0c 00 00 00 test %eax,0xc\(%ebx\)
[ ]*[a-f0-9]+: 8d ([0-9a-f]{2} ){5}[ ]+lea[ ]+.*
[ ]*[a-f0-9]+: c7 c0 b5 80 04 08 mov \$0x80480b5,%eax
0+80480b4 <foo>:
[ ]*[a-f0-9]+: c3 ret
0+80480b5 <bar>:
[ ]*[a-f0-9]+: c3 ret
#pass

View File

@ -12,5 +12,11 @@
[ ]*[a-f0-9]+: 48 03 05 35 00 20 00 add 0x200035\(%rip\),%rax # 600128 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 48 8b 05 2e 00 20 00 mov 0x20002e\(%rip\),%rax # 600128 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 48 85 05 27 00 20 00 test %rax,0x200027\(%rip\) # 600128 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 48 8d ([0-9a-f]{2} ){5}[ ]+lea[ ]+.*
[ ]*[a-f0-9]+: 48 c7 c0 09 01 40 00 mov \$0x400109,%rax
0+400108 <foo>:
[ ]*[a-f0-9]+: c3 retq
0+400109 <bar>:
[ ]*[a-f0-9]+: c3 retq
#pass

View File

@ -4,7 +4,7 @@
[ ]*[a-f0-9]+: [ a-f0-9]+ addr32 callq [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: [ a-f0-9]+ callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: [ a-f0-9]+ callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: [ a-f0-9]+ lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: [ a-f0-9]+ (rex mov|mov ) \$0x[a-f0-9]+,%(r|e)ax
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: [ a-f0-9]+ mov 0x[a-f0-9]+\(%rip\),%rcx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: ff d1 callq \*%rcx

View File

@ -9,10 +9,12 @@ foo:
.globl _start
.type _start, @function
_start:
movl foo@GOTPCREL(%rip), %eax
movl bar@GOTPCREL(%rip), %r11d
movq foo@GOTPCREL(%rip), %rax
movq bar@GOTPCREL(%rip), %rax
movq bar@GOTPCREL(%rip), %r11
movq __start_my_section@GOTPCREL(%rip), %rax
movq __stop_my_section@GOTPCREL(%rip), %rax
movq __stop_my_section@GOTPCREL(%rip), %r11
.size _start, .-_start
.comm pad,4,4
.comm bar,4,4

View File

@ -9,8 +9,11 @@
Disassembly of section .text:
#...
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 44 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11d # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__stop_my_section>
#pass

View File

@ -9,8 +9,11 @@
Disassembly of section .text:
#...
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 44 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11d # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__stop_my_section>
#pass

View File

@ -1,5 +1,5 @@
#source: lea1.s
#as: --64
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
@ -9,8 +9,11 @@
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 41 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11d
[ ]*[a-f0-9]+: 48 c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%rax
[ ]*[a-f0-9]+: 49 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11
[ ]*[a-f0-9]+: 48 c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%rax
[ ]*[a-f0-9]+: 49 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11
#pass

View File

@ -9,8 +9,11 @@
Disassembly of section .text:
#...
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 44 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11d # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__stop_my_section>
#pass

View File

@ -9,8 +9,11 @@
Disassembly of section .text:
#...
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 44 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11d # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <__stop_my_section>
#pass

View File

@ -1,5 +1,5 @@
#source: lea1.s
#as: --x32
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64
#objdump: -dw
@ -9,8 +9,11 @@
Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 41 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11d
[ ]*[a-f0-9]+: 40 c7 c0 ([0-9a-f]{2} ){4} * rex mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 41 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11d
[ ]*[a-f0-9]+: 40 c7 c0 ([0-9a-f]{2} ){4} * rex mov \$0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 41 c7 c3 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%r11d
#pass

View File

@ -1,6 +1,6 @@
#source: mov1.s
#as: --64
#ld: -pie -melf_x86_64
#as: --64 -mrelax-relocations=yes
#ld: -pie -melf_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
@ -10,6 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 * mov \$0x0,%rax
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 * mov \$0x0,%rax
#pass

View File

@ -1,6 +1,6 @@
#source: mov1.s
#as: --x32
#ld: -pie -melf32_x86_64
#as: --x32 -mrelax-relocations=yes
#ld: -pie -melf32_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
@ -10,6 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 00 * rex mov \$0x0,%eax
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 00 * rex mov \$0x0,%eax
#pass

View File

@ -2,6 +2,9 @@
#name: PR ld/13082-3 (b)
#as: --x32
#ld: -pie -melf32_x86_64
#readelf: -r --wide
#readelf: -r -x .data.rel.ro
There are no relocations in this file.
Hex dump of section '.data.rel.ro':
0x[a-f0-9]+ 00000000 00000000 ........

View File

@ -0,0 +1,9 @@
#source: pr13082-3.s
#name: PR ld/13082-3 (c)
#as: --64
#ld: -shared -melf_x86_64
#readelf: -r --wide
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Symbol's Value Symbol's Name \+ Addend
[0-9a-f]+ +[0-9a-f]+ +R_X86_64_64 +[0-9a-f]+ +func \+ 0

View File

@ -0,0 +1,10 @@
#source: pr13082-3.s
#name: PR ld/13082-3 (d)
#as: --64
#ld: -pie -melf_x86_64
#readelf: -r -x .data.rel.ro
There are no relocations in this file.
Hex dump of section '.data.rel.ro':
0x[a-f0-9]+ 00000000 00000000 ........

View File

@ -2,6 +2,9 @@
#name: PR ld/13082-4 (b)
#as: --x32
#ld: -pie -melf32_x86_64
#readelf: -r --wide
#readelf: -r -x .data.rel.ro
There are no relocations in this file.
Hex dump of section '.data.rel.ro':
0x[a-f0-9]+ 01000000 00000000 ........

View File

@ -0,0 +1,20 @@
.text
.weak bar
.globl _start
.type _start, @function
_start:
cmp bar@GOTPCREL(%rip), %rax
cmp bar@GOTPCREL(%rip), %ecx
cmp bar@GOTPCREL(%rip), %r11
cmp bar@GOTPCREL(%rip), %r12d
mov bar@GOTPCREL(%rip), %rax
mov bar@GOTPCREL(%rip), %ecx
mov bar@GOTPCREL(%rip), %r11
mov bar@GOTPCREL(%rip), %r12d
test %rax, bar@GOTPCREL(%rip)
test %ecx, bar@GOTPCREL(%rip)
test %r11, bar@GOTPCREL(%rip)
test %r12d, bar@GOTPCREL(%rip)
.size _start, .-_start

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#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 49 c7 c3 00 00 00 00 mov \$0x0,%r11
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -pie -melf_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 49 c7 c3 00 00 00 00 mov \$0x0,%r11
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -shared -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>

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#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -E -melf_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 49 c7 c3 00 00 00 00 mov \$0x0,%r11
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -shared -E -Bsymbolic -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -pie --dynamic-list-data -melf_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 49 c7 c3 00 00 00 00 mov \$0x0,%r11
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -pie -E -melf_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 49 c7 c3 00 00 00 00 mov \$0x0,%r11
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 00 rex mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 41 c7 c3 00 00 00 00 mov \$0x0,%r11d
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --x32 -mrelax-relocations=yes
#ld: -pie -melf32_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 00 rex mov \$0x0,%eax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 41 c7 c3 00 00 00 00 mov \$0x0,%r11d
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --x32
#ld: -shared -melf32_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=yes
#ld: -pie -E -Bsymbolic-functions -melf_x86_64 --no-dynamic-linker
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 81 f8 00 00 00 00 cmp \$0x0,%rax
[ ]*[a-f0-9]+: 81 f9 00 00 00 00 cmp \$0x0,%ecx
[ ]*[a-f0-9]+: 49 81 fb 00 00 00 00 cmp \$0x0,%r11
[ ]*[a-f0-9]+: 41 81 fc 00 00 00 00 cmp \$0x0,%r12d
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
[ ]*[a-f0-9]+: c7 c1 00 00 00 00 mov \$0x0,%ecx
[ ]*[a-f0-9]+: 49 c7 c3 00 00 00 00 mov \$0x0,%r11
[ ]*[a-f0-9]+: 41 c7 c4 00 00 00 00 mov \$0x0,%r12d
[ ]*[a-f0-9]+: 48 f7 c0 00 00 00 00 test \$0x0,%rax
[ ]*[a-f0-9]+: f7 c1 00 00 00 00 test \$0x0,%ecx
[ ]*[a-f0-9]+: 49 f7 c3 00 00 00 00 test \$0x0,%r11
[ ]*[a-f0-9]+: 41 f7 c4 00 00 00 00 test \$0x0,%r12d

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=no
#ld: -melf_x86_64 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # 0 <_start-0x[a-f0-9]+>
[ ]*[a-f0-9]+: 8d 0d ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%ecx # 0 <_start-0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%r11 # 0 <_start-0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 8d 25 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%r12d # 0 <_start-0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+>

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@ -0,0 +1,23 @@
#source: pr19609-1.s
#as: --64 -mrelax-relocations=no
#ld: -pie -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>

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@ -0,0 +1,9 @@
.data
foo:
.quad 0
.text
.globl _start
.type _start, @function
_start:
cmpq foo@GOTPCREL(%rip), %rax
.size _start, .-_start

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@ -0,0 +1,4 @@
#source: pr19609-2.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#error: .*relocation truncated to fit: R_X86_64_32S .*

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@ -0,0 +1,4 @@
#source: pr19609-2.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#error: .*relocation truncated to fit: R_X86_64_32S .*

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@ -0,0 +1,13 @@
#source: pr19609-2.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
0+70000000 <_start>:
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} cmp -?0x[a-f0-9]+\(%rip\),%rax # .*
#pass

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@ -0,0 +1,13 @@
#source: pr19609-2.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
70000000 <_start>:
#pass
[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} cmp -?0x[a-f0-9]+\(%rip\),%rax # .*

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@ -0,0 +1,10 @@
.data
foo:
.quad 0
.text
.globl _start
.type _start, @function
_start:
cmpl foo@GOTPCREL(%rip), %eax
cmpl foo@GOTPCREL(%rip), %r11d
.size _start, .-_start

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@ -0,0 +1,14 @@
#source: pr19609-3.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
0+70000000 <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 a0 cmp \$0xa0000000,%eax
[ ]*[a-f0-9]+: 41 81 fb 00 00 00 a0 cmp \$0xa0000000,%r11d
#pass

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@ -0,0 +1,14 @@
#source: pr19609-3.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
70000000 <_start>:
[ ]*[a-f0-9]+: 81 f8 00 00 00 a0 cmp \$0xa0000000,%eax
[ ]*[a-f0-9]+: 41 81 fb 00 00 00 a0 cmp \$0xa0000000,%r11d
#pass

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@ -0,0 +1,10 @@
.data
foo:
.quad 0
.text
.globl _start
.type _start, @function
_start:
movq foo@GOTPCREL(%rip), %rax
movq foo@GOTPCREL(%rip), %r11
.size _start, .-_start

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@ -0,0 +1,5 @@
#source: pr19609-4.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#error: .*relocation truncated to fit: R_X86_64_32S .*
#error: .*relocation truncated to fit: R_X86_64_32S .*

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@ -0,0 +1,13 @@
#source: pr19609-4.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
70000000 <_start>:
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 a0 rex mov \$0xa0000000,%eax
[ ]*[a-f0-9]+: 41 c7 c3 00 00 00 a0 mov \$0xa0000000,%r11d

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@ -0,0 +1,5 @@
#source: pr19609-4.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#error: .*relocation truncated to fit: R_X86_64_32S .*
#error: .*relocation truncated to fit: R_X86_64_32S .*

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@ -0,0 +1,13 @@
#source: pr19609-4.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
70000000 <_start>:
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 a0 rex mov \$0xa0000000,%eax
[ ]*[a-f0-9]+: 41 c7 c3 00 00 00 a0 mov \$0xa0000000,%r11d

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@ -0,0 +1,13 @@
#source: pr19609-4.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x70000000 -Tdata=0xa0000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
0+70000000 <_start>:
[ ]*[a-f0-9]+: 48 8d 05 f9 ff ff 2f lea 0x2ffffff9\(%rip\),%rax # a0000000 <foo>
[ ]*[a-f0-9]+: 4c 8d 1d f2 ff ff 2f lea 0x2ffffff2\(%rip\),%r11 # a0000000 <foo>

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@ -0,0 +1,6 @@
.text
.weak bar
.globl _start
.type _start, @function
_start:
call *bar@GOTPCREL(%rip)

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@ -0,0 +1,12 @@
#source: pr19609-5.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq 0 <_start-0x[0-9a-f]+>

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@ -0,0 +1,12 @@
#source: pr19609-5.s
#as: --64 -mrelax-relocations=yes
#ld: -pie -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>

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@ -0,0 +1,12 @@
#source: pr19609-5.s
#as: --64 -mrelax-relocations=yes
#ld: -shared -melf_x86_64
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>

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@ -0,0 +1,4 @@
#source: pr19609-5.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x80000000
#error: .*relocation truncated to fit: R_X86_64_PC32 .*

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@ -0,0 +1,12 @@
#source: pr19609-5.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x80000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <[0-9a-zA-Z_]+[\+\-]+0x[a-f0-9]+>

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@ -0,0 +1,6 @@
.text
.globl _start
.type _start, @function
_start:
movq foobar@GOTPCREL(%rip), %rax
.size _start, .-_start

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@ -0,0 +1,4 @@
#source: pr19609-6.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 --defsym foobar=0x80000000
#error: .*relocation truncated to fit: R_X86_64_32S .*

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@ -0,0 +1,13 @@
#source: pr19609-6.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 --defsym foobar=0x80000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_start\+0x[a-f0-9]+>
#pass

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@ -0,0 +1,13 @@
#source: pr19609-6.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 --defsym foobar=0x70000000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 70 mov \$0x70000000,%rax
#pass

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@ -0,0 +1,13 @@
#source: pr19609-6.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 --defsym foobar=0x80000000
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 40 c7 c0 00 00 00 80 rex mov \$0x80000000,%eax
#pass

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@ -0,0 +1,7 @@
.text
.weak foobar
.globl _start
.type _start, @function
_start:
call *foobar@GOTPCREL(%rip)
.size _start, .-_start

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@ -0,0 +1,4 @@
#source: pr19609-7.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x80000000
#error: .*relocation truncated to fit: R_X86_64_PC32 .*

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@ -0,0 +1,13 @@
#source: pr19609-7.s
#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -Ttext=0x80000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*0x[a-f0-9]+>
#pass

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@ -0,0 +1,4 @@
#source: pr19609-7.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x80000000
#error: .*relocation truncated to fit: R_X86_64_PC32 .*

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@ -0,0 +1,13 @@
#source: pr19609-7.s
#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -Ttext=0x80000000 --no-relax
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*0x[a-f0-9]+>
#pass

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@ -305,6 +305,8 @@ run_dump_test "pr13082-2a"
run_dump_test "pr13082-2b"
run_dump_test "pr13082-3a"
run_dump_test "pr13082-3b"
run_dump_test "pr13082-3c"
run_dump_test "pr13082-3d"
run_dump_test "pr13082-4a"
run_dump_test "pr13082-4b"
run_dump_test "pr13082-5a"
@ -382,6 +384,43 @@ run_dump_test "pr19636-3a"
run_dump_test "pr19636-3b"
run_dump_test "pr19636-3c"
run_dump_test "pr19645"
run_dump_test "pr19609-1a"
run_dump_test "pr19609-1b"
run_dump_test "pr19609-1c"
run_dump_test "pr19609-1d"
run_dump_test "pr19609-1e"
run_dump_test "pr19609-1f"
run_dump_test "pr19609-1g"
run_dump_test "pr19609-1h"
run_dump_test "pr19609-1i"
run_dump_test "pr19609-1j"
run_dump_test "pr19609-1k"
run_dump_test "pr19609-1l"
run_dump_test "pr19609-1m"
run_dump_test "pr19609-2a"
run_dump_test "pr19609-2b"
run_dump_test "pr19609-2c"
run_dump_test "pr19609-2d"
run_dump_test "pr19609-3a"
run_dump_test "pr19609-3b"
run_dump_test "pr19609-4a"
run_dump_test "pr19609-4b"
run_dump_test "pr19609-4c"
run_dump_test "pr19609-4d"
run_dump_test "pr19609-4e"
run_dump_test "pr19609-5a"
run_dump_test "pr19609-5b"
run_dump_test "pr19609-5c"
run_dump_test "pr19609-5d"
run_dump_test "pr19609-5e"
run_dump_test "pr19609-6a"
run_dump_test "pr19609-6b"
run_dump_test "pr19609-6c"
run_dump_test "pr19609-6d"
run_dump_test "pr19609-7a"
run_dump_test "pr19609-7b"
run_dump_test "pr19609-7c"
run_dump_test "pr19609-7d"
proc undefined_weak {cflags ldflags} {
set testname "Undefined weak symbol"