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AArch64: Add target description/feature for MTE registers

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This patch adds a target description and feature "mte" for aarch64.

It includes one new register, tag_ctl, that can be used to configure the
tag generation rules and sync/async modes.  It is 64-bit in size.

The patch also adjusts the code that creates the target descriptions at
runtime based on CPU feature checks.

gdb/ChangeLog:

2021-03-24  Luis Machado  <luis.machado@linaro.org>

	* aarch64-linux-nat.c
	(aarch64_linux_nat_target::read_description): Take MTE flag into
	account.
	Slight refactor to hwcap flag checking.
	* aarch64-linux-tdep.c
	(aarch64_linux_core_read_description): Likewise.
	* aarch64-tdep.c (tdesc_aarch64_list): Add one more dimension for
	MTE.
	(aarch64_read_description): Add mte_p parameter and update to use it.
	Update the documentation.
	(aarch64_gdbarch_init): Update call to aarch64_read_description.
	* aarch64-tdep.h (aarch64_read_description): Add mte_p parameter.
	* arch/aarch64.c: Include ../features/aarch64-mte.c.
	(aarch64_create_target_description): Add mte_p parameter and update
	the code to use it.
	* arch/aarch64.h (aarch64_create_target_description): Add mte_p
	parameter.
	* features/Makefile (FEATURE_XMLFILES): Add aarch64-mte.xml.
	* features/aarch64-mte.c: New file, generated.
	* features/aarch64-mte.xml: New file.

gdbserver/ChangeLog:

2021-03-24  Luis Machado  <luis.machado@linaro.org>

	* linux-aarch64-ipa.cc (get_ipa_tdesc): Update call to
	aarch64_linux_read_description.
	(initialize_low_tracepoint): Likewise.
	* linux-aarch64-low.cc (aarch64_target::low_arch_setup): Take MTE flag
	into account.
	* linux-aarch64-tdesc.cc (tdesc_aarch64_list): Add one more dimension
	for MTE.
	(aarch64_linux_read_description): Add mte_p parameter and update to
	use it.
	* linux-aarch64-tdesc.h (aarch64_linux_read_description): Add mte_p
	parameter.
This commit is contained in:
Luis Machado 2020-06-15 13:52:27 -03:00
parent 0424512519
commit c1bd443b4d
15 changed files with 110 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
gdb/ChangeLog
View File

@ -1,3 +1,26 @@
2021-03-24 Luis Machado <luis.machado@linaro.org>
* aarch64-linux-nat.c
(aarch64_linux_nat_target::read_description): Take MTE flag into
account.
Slight refactor to hwcap flag checking.
* aarch64-linux-tdep.c
(aarch64_linux_core_read_description): Likewise.
* aarch64-tdep.c (tdesc_aarch64_list): Add one more dimension for
MTE.
(aarch64_read_description): Add mte_p parameter and update to use it.
Update the documentation.
(aarch64_gdbarch_init): Update call to aarch64_read_description.
* aarch64-tdep.h (aarch64_read_description): Add mte_p parameter.
* arch/aarch64.c: Include ../features/aarch64-mte.c.
(aarch64_create_target_description): Add mte_p parameter and update
the code to use it.
* arch/aarch64.h (aarch64_create_target_description): Add mte_p
parameter.
* features/Makefile (FEATURE_XMLFILES): Add aarch64-mte.xml.
* features/aarch64-mte.c: New file, generated.
* features/aarch64-mte.xml: New file.
2021-03-24 Luis Machado <luis.machado@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add arch/aarch64-mte-linux.h.

7
gdb/aarch64-linux-nat.c
View File

@ -653,9 +653,12 @@ aarch64_linux_nat_target::read_description ()
return aarch32_read_description ();
CORE_ADDR hwcap = linux_get_hwcap (this);
CORE_ADDR hwcap2 = linux_get_hwcap2 (this);
return aarch64_read_description (aarch64_sve_get_vq (tid),
hwcap & AARCH64_HWCAP_PACA);
bool pauth_p = hwcap & AARCH64_HWCAP_PACA;
bool mte_p = hwcap2 & HWCAP2_MTE;
return aarch64_read_description (aarch64_sve_get_vq (tid), pauth_p, mte_p);
}
/* Convert a native/host siginfo object, into/from the siginfo in the

5
gdb/aarch64-linux-tdep.c
View File

@ -731,9 +731,12 @@ aarch64_linux_core_read_description (struct gdbarch *gdbarch,
struct target_ops *target, bfd *abfd)
{
CORE_ADDR hwcap = linux_get_hwcap (target);
CORE_ADDR hwcap2 = linux_get_hwcap2 (target);
bool pauth_p = hwcap & AARCH64_HWCAP_PACA;
bool mte_p = hwcap2 & HWCAP2_MTE;
return aarch64_read_description (aarch64_linux_core_read_vq (gdbarch, abfd),
hwcap & AARCH64_HWCAP_PACA);
pauth_p, mte_p);
}
/* Implementation of `gdbarch_stap_is_single_operand', as defined in

16
gdb/aarch64-tdep.c
View File

@ -58,7 +58,7 @@
#define HA_MAX_NUM_FLDS 4
/* All possible aarch64 target descriptors. */
static target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/];
static target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/][2 /* mte */];
/* The standard register names, and all the valid aliases for them. */
static const struct
@ -3260,21 +3260,23 @@ aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch)
/* Get the correct target description for the given VQ value.
If VQ is zero then it is assumed SVE is not supported.
(It is not possible to set VQ to zero on an SVE system). */
(It is not possible to set VQ to zero on an SVE system).
MTE_P indicates the presence of the Memory Tagging Extension feature. */
const target_desc *
aarch64_read_description (uint64_t vq, bool pauth_p)
aarch64_read_description (uint64_t vq, bool pauth_p, bool mte_p)
{
if (vq > AARCH64_MAX_SVE_VQ)
error (_("VQ is %" PRIu64 ", maximum supported value is %d"), vq,
AARCH64_MAX_SVE_VQ);
struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p];
struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p][mte_p];
if (tdesc == NULL)
{
tdesc = aarch64_create_target_description (vq, pauth_p);
tdesc_aarch64_list[vq][pauth_p] = tdesc;
tdesc = aarch64_create_target_description (vq, pauth_p, mte_p);
tdesc_aarch64_list[vq][pauth_p][mte_p] = tdesc;
}
return tdesc;
@ -3374,7 +3376,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
value. */
const struct target_desc *tdesc = info.target_desc;
if (!tdesc_has_registers (tdesc) || vq != aarch64_get_tdesc_vq (tdesc))
tdesc = aarch64_read_description (vq, false);
tdesc = aarch64_read_description (vq, false, false);
gdb_assert (tdesc);
feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core");

3
gdb/aarch64-tdep.h
View File

@ -102,7 +102,8 @@ struct gdbarch_tdep
}
};
const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p);
const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p,
bool mte_p);
extern int aarch64_process_record (struct gdbarch *gdbarch,
struct regcache *regcache, CORE_ADDR addr);

7
gdb/arch/aarch64.c
View File

@ -23,11 +23,12 @@
#include "../features/aarch64-fpu.c"
#include "../features/aarch64-sve.c"
#include "../features/aarch64-pauth.c"
#include "../features/aarch64-mte.c"
/* See arch/aarch64.h. */
target_desc *
aarch64_create_target_description (uint64_t vq, bool pauth_p)
aarch64_create_target_description (uint64_t vq, bool pauth_p, bool mte_p)
{
target_desc_up tdesc = allocate_target_description ();
@ -47,5 +48,9 @@ aarch64_create_target_description (uint64_t vq, bool pauth_p)
if (pauth_p)
regnum = create_feature_aarch64_pauth (tdesc.get (), regnum);
/* Memory tagging extension registers. */
if (mte_p)
regnum = create_feature_aarch64_mte (tdesc.get (), regnum);
return tdesc.release ();
}

7
gdb/arch/aarch64.h
View File

@ -25,9 +25,12 @@
/* Create the aarch64 target description. A non zero VQ value indicates both
the presence of SVE and the Vector Quotient - the number of 128bit chunks in
an SVE Z register. HAS_PAUTH_P indicates the presence of the PAUTH
feature. */
feature.
target_desc *aarch64_create_target_description (uint64_t vq, bool has_pauth_p);
MTE_P indicates the presence of the Memory Tagging Extension feature. */
target_desc *aarch64_create_target_description (uint64_t vq, bool has_pauth_p,
bool mte_p);
/* Register numbers of various important registers.
Note that on SVE, the Z registers reuse the V register numbers and the V

1
gdb/features/Makefile
View File

@ -202,6 +202,7 @@ $(outdir)/%.dat: %.xml number-regs.xsl sort-regs.xsl gdbserver-regs.xsl
FEATURE_XMLFILES = aarch64-core.xml \
aarch64-fpu.xml \
aarch64-pauth.xml \
aarch64-mte.xml \
arc/v1-core.xml \
arc/v1-aux.xml \
arc/v2-core.xml \

14
gdb/features/aarch64-mte.c Normal file
View File

@ -0,0 +1,14 @@
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
Original: aarch64-mte.xml */
#include "gdbsupport/tdesc.h"
static int
create_feature_aarch64_mte (struct target_desc *result, long regnum)
{
struct tdesc_feature *feature;
feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.mte");
tdesc_create_reg (feature, "tag_ctl", regnum++, 0, "system", 64, "uint64");
return regnum;
}

11
gdb/features/aarch64-mte.xml Normal file
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@ -0,0 +1,11 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2021 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.aarch64.mte">
<reg name="tag_ctl" bitsize="64" type="uint64" group="system" save-restore="no"/>
</feature>

14
gdbserver/ChangeLog
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@ -1,3 +1,17 @@
2021-03-24 Luis Machado <luis.machado@linaro.org>
* linux-aarch64-ipa.cc (get_ipa_tdesc): Update call to
aarch64_linux_read_description.
(initialize_low_tracepoint): Likewise.
* linux-aarch64-low.cc (aarch64_target::low_arch_setup): Take MTE flag
into account.
* linux-aarch64-tdesc.cc (tdesc_aarch64_list): Add one more dimension
for MTE.
(aarch64_linux_read_description): Add mte_p parameter and update to
use it.
* linux-aarch64-tdesc.h (aarch64_linux_read_description): Add mte_p
parameter.
2021-03-24 Luis Machado <luis.machado@linaro.org>
* linux-aarch64-low.cc: Include arch/aarch64-mte-linux.h.

8
gdbserver/linux-aarch64-ipa.cc
View File

@ -147,12 +147,12 @@ get_raw_reg (const unsigned char *raw_regs, int regnum)
/* Return target_desc to use for IPA, given the tdesc index passed by
gdbserver. Index is ignored, since we have only one tdesc
at the moment. SVE and pauth not yet supported. */
at the moment. SVE, pauth and MTE not yet supported. */
const struct target_desc *
get_ipa_tdesc (int idx)
{
return aarch64_linux_read_description (0, false);
return aarch64_linux_read_description (0, false, false);
}
/* Allocate buffer for the jump pads. The branch instruction has a reach
@ -204,6 +204,6 @@ alloc_jump_pad_buffer (size_t size)
void
initialize_low_tracepoint (void)
{
/* SVE and pauth not yet supported. */
aarch64_linux_read_description (0, false);
/* SVE, pauth and MTE not yet supported. */
aarch64_linux_read_description (0, false, false);
}

6
gdbserver/linux-aarch64-low.cc
View File

@ -664,9 +664,13 @@ aarch64_target::low_arch_setup ()
{
uint64_t vq = aarch64_sve_get_vq (tid);
unsigned long hwcap = linux_get_hwcap (8);
unsigned long hwcap2 = linux_get_hwcap2 (8);
bool pauth_p = hwcap & AARCH64_HWCAP_PACA;
/* MTE is AArch64-only. */
bool mte_p = hwcap2 & HWCAP2_MTE;
current_process ()->tdesc = aarch64_linux_read_description (vq, pauth_p);
current_process ()->tdesc
= aarch64_linux_read_description (vq, pauth_p, mte_p);
}
else
current_process ()->tdesc = aarch32_linux_read_description ();

10
gdbserver/linux-aarch64-tdesc.cc
View File

@ -27,22 +27,22 @@
#include <inttypes.h>
/* All possible aarch64 target descriptors. */
struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/];
struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/][2 /* mte */];
/* Create the aarch64 target description. */
const target_desc *
aarch64_linux_read_description (uint64_t vq, bool pauth_p)
aarch64_linux_read_description (uint64_t vq, bool pauth_p, bool mte_p)
{
if (vq > AARCH64_MAX_SVE_VQ)
error (_("VQ is %" PRIu64 ", maximum supported value is %d"), vq,
AARCH64_MAX_SVE_VQ);
struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p];
struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p][mte_p];
if (tdesc == NULL)
{
tdesc = aarch64_create_target_description (vq, pauth_p);
tdesc = aarch64_create_target_description (vq, pauth_p, mte_p);
static const char *expedite_regs_aarch64[] = { "x29", "sp", "pc", NULL };
static const char *expedite_regs_aarch64_sve[] = { "x29", "sp", "pc",
@ -53,7 +53,7 @@ aarch64_linux_read_description (uint64_t vq, bool pauth_p)
else
init_target_desc (tdesc, expedite_regs_aarch64_sve);
tdesc_aarch64_list[vq][pauth_p] = tdesc;
tdesc_aarch64_list[vq][pauth_p][mte_p] = tdesc;
}
return tdesc;

3
gdbserver/linux-aarch64-tdesc.h
View File

@ -20,6 +20,7 @@
#ifndef GDBSERVER_LINUX_AARCH64_TDESC_H
#define GDBSERVER_LINUX_AARCH64_TDESC_H
const target_desc * aarch64_linux_read_description (uint64_t vq, bool pauth_p);
const target_desc * aarch64_linux_read_description (uint64_t vq, bool pauth_p,
bool mte_p);
#endif /* GDBSERVER_LINUX_AARCH64_TDESC_H */