gdb/riscv: fix gdb.arch/riscv-unwind-long-insn.exp on RV64
I noticed that the gdb.arch/riscv-unwind-long-insn.exp test was failing when run on a 64-bit RISC-V target. The problem was that GDB was failing to stop after a finish command, and was then running to an unexpected location. The reason GDB failed to stop at the finish breakpoint was that the frame-id of the inferior, when we reached the finish breakpoint, didn't match the expected frame-id that was stored on the breakpoint. The reason for this mismatch was that the assembler code that is included in this test, was written only taking 32-bit RISC-V into account, as a result, the $fp register was being corrupted, and this was causing the frame-id mismatch. Specifically, the $fp register would end up being sign-extended from 32 to 64 bits. If the expected $fp value has some significant bits above bit 31 then the computed and expected frame-ids would not match. To fix this I propose merging the two .s files into a single .S file, and making use of preprocessor macros to specialise the file for the correct size of $fp. There are plenty of existing tests that already make use of preprocessor macros in assembler files, so I assume this approach is fine. Once I'd decided to make use of preprocessor macros to solve the 32/64 bit issue, then I figured I might as well merge the two test assembler files, they only differed by a single instruction. With this change in place I now see this test fully passing on 32 and 64 bit RISC-V targets.
This commit is contained in:
Andrew Burgess
parent
14bc174ad3
commit
cb3dee0e0e
@ -1,45 +0,0 @@
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/* Copyright 2019-2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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.option nopic
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.text
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.align 1
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.globl bar
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.type bar, @function
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bar:
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tail 1f
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.size bar, .-func
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.align 1
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.globl func
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.type func, @function
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func:
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/* A fake 6 byte instruction. This is never executed, but the
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prologue scanner will try to decode it. These long
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instructions are ISA extensions, use .byte rather than an
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actual instruction mnemonic so that the test can be compiled
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with a toolchain that doesn't include any long instruction
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extensions. */
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.byte 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00
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1:
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addi sp,sp,-16
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sw s0,12(sp)
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addi s0,sp,16
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nop
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lw s0,12(sp)
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addi sp,sp,16
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jr ra
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.size func, .-func
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@ -1,45 +0,0 @@
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/* Copyright 2019-2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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.option nopic
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.text
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.align 1
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.globl bar
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.type bar, @function
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bar:
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tail 1f
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.size bar, .-func
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.align 1
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.globl func
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.type func, @function
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func:
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/* A fake 8 byte instruction. This is never executed, but the
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prologue scanner will try to decode it. These long
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instructions are ISA extensions, use .byte rather than an
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actual instruction mnemonic so that the test can be compiled
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with a toolchain that doesn't include any long instruction
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extensions. */
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.byte 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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1:
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addi sp,sp,-16
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sw s0,12(sp)
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addi s0,sp,16
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nop
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lw s0,12(sp)
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addi sp,sp,16
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jr ra
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.size func, .-func
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62
gdb/testsuite/gdb.arch/riscv-unwind-long-insn.S
Normal file
62
gdb/testsuite/gdb.arch/riscv-unwind-long-insn.S
Normal file
@ -0,0 +1,62 @@
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/* Copyright 2019-2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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.option nopic
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.text
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.align 1
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.globl bar
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.type bar, @function
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bar:
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tail 1f
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.size bar, .-func
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.align 1
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.globl func
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.type func, @function
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func:
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/* A fake instruction of either 6 or 8 bytes. This is never
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executed, but the prologue scanner will try to decode it.
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These long instructions are ISA extensions, use .byte rather
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than an actual instruction mnemonic so that the test can be
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compiled with a toolchain that doesn't include any long
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instruction extensions. */
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#if BAD_INSN_LEN == 6
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/* A fake 6 byte instruction. */
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.byte 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00
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#elif BAD_INSN_LEN == 8
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/* A fake 8 byte instruction. */
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.byte 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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#else
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#error unexpected bad instruction length
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#endif
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1:
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addi sp,sp,-16
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#if __SIZEOF_POINTER__ == 8
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sd s0,8(sp)
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#else
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sw s0,8(sp)
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#endif
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addi s0,sp,16
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nop
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#if __SIZEOF_POINTER__ == 8
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ld s0,8(sp)
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#else
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lw s0,8(sp)
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#endif
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addi sp,sp,16
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jr ra
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.size func, .-func
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@ -27,13 +27,15 @@ if {![istarget "riscv*-*-*"]} {
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return
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}
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standard_testfile riscv-unwind-long-insn.c \
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riscv-unwind-long-insn.S
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foreach_with_prefix {insn_size} {6 8} {
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standard_testfile riscv-unwind-long-insn.c \
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riscv-unwind-long-insn-${insn_size}.s
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set flags [list debug additional_flags=-DBAD_INSN_LEN=${insn_size}]
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set testfile "${testfile}-${insn_size}"
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if {[prepare_for_testing "failed to prepare" $testfile \
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"$srcfile $srcfile2" debug]} {
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"$srcfile $srcfile2" $flags]} {
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return -1
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}
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