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PATCH [4/10] arm: add 'pac' instruction for Armv8.1-M pacbti extension

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gas/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* config/tc-arm.c (T16_32_TAB): Add '_pac'.
	(insns): Add 'pac' insn.
	* testsuite/gas/arm/armv8_1-m-pacbti-bad.l: Add pac tests.
	* testsuite/gas/arm/armv8_1-m-pacbti-bad.s: Likewise.
	* testsuite/gas/arm/armv8_1-m-pacbti.d: Likewise.
	* testsuite/gas/arm/armv8_1-m-pacbti.s: Likewise.

opcodes/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* arm-dis.c (thumb32_opcodes): Add 'pac'.
This commit is contained in:
Andrea Corallo 2021-05-19 09:51:40 +02:00
parent e43ca2cbae
commit ce537a7db7
6 changed files with 12 additions and 0 deletions
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2
gas/config/tc-arm.c
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@ -11506,6 +11506,7 @@ encode_thumb32_addr_mode (int i, bool is_t, bool is_d)
X(_negs, 4240, f1d00000), /* rsbs #0 */ \
X(_orr, 4300, ea400000), \
X(_orrs, 4300, ea500000), \
X(_pac, 0000, f3af801d), \
X(_pacbti, 0000, f3af800d), \
X(_pop, bc00, e8bd0000), /* ldmia sp!,... */ \
X(_push, b400, e92d0000), /* stmdb sp!,... */ \
@ -26329,6 +26330,7 @@ static const struct asm_opcode insns[] =
#define THUMB_VARIANT & arm_ext_v8_1m_main
toU("aut", _aut, 3, (R12, LR, SP), t_pacbti),
ToU("bti", f3af800f, 0, (), noargs),
toU("pac", _pac, 3, (R12, LR, SP), t_pacbti),
toU("pacbti", _pacbti, 3, (R12, LR, SP), t_pacbti),
toU("cinc", _cinc, 3, (RRnpcsp, RR_ZR, COND), t_cond),
toU("cinv", _cinv, 3, (RRnpcsp, RR_ZR, COND), t_cond),

3
gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.l
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@ -5,3 +5,6 @@
.*:9: Error: operand must be r12 -- `aut r11,lr,sp'
.*:10: Error: operand must be LR register -- `aut r12,r10,sp'
.*:11: Error: operand must be SP register -- `aut r12,lr,r10'
.*:12: Error: operand must be r12 -- `pac r11,lr,sp'
.*:13: Error: operand must be LR register -- `pac r12,r10,sp'
.*:14: Error: operand must be SP register -- `pac r12,lr,r10'

3
gas/testsuite/gas/arm/armv8_1-m-pacbti-bad.s
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@ -9,3 +9,6 @@
aut r11, lr, sp
aut r12, r10, sp
aut r12, lr, r10
pac r11, lr, sp
pac r12, r10, sp
pac r12, lr, r10

1
gas/testsuite/gas/arm/armv8_1-m-pacbti.d
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@ -9,4 +9,5 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f3af 800f bti
0[0-9a-f]+ <[^>]+> f3af 800d pacbti r12, lr, sp
0[0-9a-f]+ <[^>]+> f3af 802d aut r12, lr, sp
0[0-9a-f]+ <[^>]+> f3af 801d pac r12, lr, sp
#...

1
gas/testsuite/gas/arm/armv8_1-m-pacbti.s
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@ -5,3 +5,4 @@
bti
pacbti r12, lr, sp
aut r12, lr, sp
pac r12, lr, sp

2
opcodes/arm-dis.c
View File

@ -4658,6 +4658,8 @@ static const struct opcode32 thumb32_opcodes[] =
0xf3af802d, 0xffffffff, "aut\tr12, lr, sp"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf3af800f, 0xffffffff, "bti"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf3af801d, 0xffffffff, "pac\tr12, lr, sp"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf3af800d, 0xffffffff, "pacbti\tr12, lr, sp"},