yggdrasil/binutils-gdb
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

aarch64: add armv9-a architecture to -march

Browse Source 
Patch is adding new 'armv9-a` command line flag to -march for AArch64.

gas/

	* config/tc-aarch64.c: Add 'armv9-a' command line flag.
	* docs/c-aarch64.text: Update docs.
	* NEWS: Update docs.

include/

	* opcode/aarch64.h (AARCH64_FEATURE_V9): New define.
	(AARCH64_ARCH_V9): New define.
This commit is contained in:
Przemyslaw Wirkus 2021-09-30 20:44:17 +01:00
parent 4dfef5be68
commit d5007f0280
4 changed files with 12 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
gas/NEWS
View File

@ -4,6 +4,8 @@
x86 assembler have been reduced from 12 bytes to 10 bytes to match the
output of .tfloat directive.
* Add support for 'armv9-a' for -march in AArch64 GAS.
* Add support for Intel AVX512_FP16 instructions.
Changes in 2.37:

1
gas/config/tc-aarch64.c
View File

@ -9144,6 +9144,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
{"armv8.6-a", AARCH64_ARCH_V8_6},
{"armv8.7-a", AARCH64_ARCH_V8_7},
{"armv8-r", AARCH64_ARCH_V8_R},
{"armv9-a", AARCH64_ARCH_V9},
{NULL, AARCH64_ARCH_NONE}
};

7
gas/doc/c-aarch64.texi
View File

@ -107,7 +107,8 @@ issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, and @code{armv8-r}.
@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8-r}, and
@code{armv9-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are
@ -196,7 +197,7 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
@item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable Advanced SIMD extensions. This implies @code{fp}.
@item @code{sve} @tab ARMv8.2-A @tab No
@item @code{sve} @tab ARMv8.2-A @tab Armv9-A or later
@tab Enable the Scalable Vector Extensions. This implies @code{fp16},
@code{simd} and @code{compnum}.
@item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
@ -216,7 +217,7 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.5-A Memory Tagging Extensions.
@item @code{tme} @tab ARMv8-A @tab No
@tab Enable Transactional Memory Extensions.
@item @code{sve2} @tab ARMv8-A @tab No
@item @code{sve2} @tab ARMv8-A @tab Armv9-A or later
@tab Enable the SVE2 Extension.
@item @code{sve2-bitperm} @tab ARMv8-A @tab No
@tab Enable SVE2 BITPERM Extension.

5
include/opcode/aarch64.h
View File

@ -90,6 +90,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_F32MM (1ULL << 53)
#define AARCH64_FEATURE_F64MM (1ULL << 54)
#define AARCH64_FEATURE_FLAGM (1ULL << 55) /* v8.4 Flag Manipulation. */
#define AARCH64_FEATURE_V9 (1ULL << 56) /* Armv9.0-A processors. */
/* Crypto instructions are the combination of AES and SHA2. */
#define AARCH64_FEATURE_CRYPTO (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_AES)
@ -140,6 +141,10 @@ typedef uint32_t aarch64_insn;
#define AARCH64_ARCH_V8_R (AARCH64_FEATURE (AARCH64_ARCH_V8_4, \
AARCH64_FEATURE_V8_R) \
& ~(AARCH64_FEATURE_V8_A | AARCH64_FEATURE_LOR))
#define AARCH64_ARCH_V9 AARCH64_FEATURE (AARCH64_ARCH_V8_5, \
AARCH64_FEATURE_SVE \
| AARCH64_FEATURE_SVE2 \
| AARCH64_FEATURE_V9)
#define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0)
#define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */