x86: fold CpuLM and Cpu64
Now that CpuLM is used solely in cpu_arch_flags and cpu_arch[] while Cpu64 is solely used in insn templates, they no longer need to be treated different from other "ordinary" flags; the only "unusual" one left if CpuNo64. Fold both, leaving just Cpu64.
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@ -2612,7 +2612,7 @@ update_code_flag (int value, int check)
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{
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PRINTF_LIKE ((*as_error)) = check ? as_fatal : as_bad;
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if (value == CODE_64BIT && !cpu_arch_flags.bitfield.cpulm )
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if (value == CODE_64BIT && !cpu_arch_flags.bitfield.cpu64 )
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{
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as_error (_("64bit mode not supported on `%s'."),
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cpu_arch_name ? cpu_arch_name : default_arch);
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@ -2907,7 +2907,7 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
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{
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check_cpu_arch_compatible (string, cpu_arch[j].enable);
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if (flag_code == CODE_64BIT && !cpu_arch[j].enable.bitfield.cpulm )
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if (flag_code == CODE_64BIT && !cpu_arch[j].enable.bitfield.cpu64 )
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{
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as_bad (_("64bit mode not supported on `%s'."),
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cpu_arch[j].name);
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@ -13986,7 +13986,7 @@ static bool check_register (const reg_entry *r)
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}
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if (((r->reg_flags & (RegRex64 | RegRex)) || r->reg_type.bitfield.qword)
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&& (!cpu_arch_flags.bitfield.cpulm
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&& (!cpu_arch_flags.bitfield.cpu64
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|| r->reg_type.bitfield.class != RegCR
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|| dot_insn ())
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&& flag_code != CODE_64BIT)
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@ -262,7 +262,7 @@ static const dependency isa_dependencies[] =
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};
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/* This array is populated as process_i386_initializers() walks cpu_flags[]. */
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static unsigned char isa_reverse_deps[Cpu64][Cpu64];
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static unsigned char isa_reverse_deps[CpuMax][CpuMax];
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typedef struct bitfield
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{
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@ -325,7 +325,6 @@ static bitfield cpu_flags[] =
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BITFIELD (LWP),
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BITFIELD (BMI),
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BITFIELD (TBM),
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BITFIELD (LM),
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BITFIELD (Movbe),
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BITFIELD (CX16),
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BITFIELD (LAHF_SAHF),
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@ -726,7 +725,10 @@ add_isa_dependencies (bitfield *flags, const char *f, int value,
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*strchr (str, ':') = '\0';
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isa = str;
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}
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for (i = 0; i < Cpu64; ++i)
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/* isa_dependencies[] prefers "LM" over "64". */
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else if (!strcmp (f, "LM"))
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isa = "64";
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for (i = 0; i < CpuMax; ++i)
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if (strcasecmp (flags[i].name, isa) == 0)
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{
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flags[i].value = value;
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@ -872,10 +874,10 @@ process_i386_cpu_flag (FILE *table, char *flag,
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else
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next = flag + 1;
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/* First we turn on everything except for cpu64, cpuno64, and - if
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/* First we turn on everything except for cpuno64 and - if
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present - the padding field. */
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for (i = 0; i < ARRAY_SIZE (flags); i++)
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if (flags[i].position < Cpu64)
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if (flags[i].position < CpuNo64)
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flags[i].value = 1;
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/* Turn off selective bits. */
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@ -1968,7 +1970,7 @@ process_i386_initializers (void)
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process_copyright (fp);
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for (i = 0; i < Cpu64; i++)
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for (i = 0; i < CpuMax; i++)
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process_i386_cpu_flag (fp, "0", cpu_flags[i].name, "", " ", -1, i);
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for (i = 0; i < ARRAY_SIZE (isa_dependencies); i++)
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1050
opcodes/i386-init.h
1050
opcodes/i386-init.h
File diff suppressed because it is too large
Load Diff
@ -147,8 +147,6 @@ enum i386_cpu
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CpuVMFUNC,
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/* Intel MPX Instructions required */
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CpuMPX,
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/* 64bit support available, used by -march= in assembler. */
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CpuLM,
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/* RDRSEED instruction required. */
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CpuRDSEED,
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/* Multi-presisionn add-carry instructions are required. */
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@ -309,6 +307,8 @@ enum i386_cpu
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Cpu3dnow,
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/* 3dnow! Extensions support required */
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Cpu3dnowA,
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/* 64bit support required */
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Cpu64,
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/* AVX support required */
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CpuAVX,
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/* HLE support required */
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@ -317,8 +317,6 @@ enum i386_cpu
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CpuAVX512F,
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/* Intel AVX-512 VL Instructions support required. */
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CpuAVX512VL,
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/* 64bit support required */
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Cpu64,
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/* Not supported in the 64bit mode */
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CpuNo64,
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@ -349,12 +347,12 @@ enum i386_cpu
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cpu387:1, \
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cpu3dnow:1, \
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cpu3dnowa:1, \
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cpu64:1, \
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cpuavx:1, \
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cpuhle:1, \
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cpuavx512f:1, \
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cpuavx512vl:1, \
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/* NOTE: These two fields need to remain last and in this order. */ \
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cpu64:1, \
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/* NOTE: This field needs to remain last. */ \
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cpuno64:1
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typedef union i386_cpu_attr
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@ -435,7 +433,6 @@ typedef union i386_cpu_flags
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unsigned int cpuinvpcid:1;
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unsigned int cpuvmfunc:1;
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unsigned int cpumpx:1;
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unsigned int cpulm:1;
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unsigned int cpurdseed:1;
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unsigned int cpuadx:1;
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unsigned int cpuprfchw:1;
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4376
opcodes/i386-tbl.h
4376
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
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