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PATCH [7/10] arm: add 'bxaut' instruction for Armv8.1-M pacbti extension

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gas/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* config/tc-arm.c (T16_32_TAB): Add '_bxaut'.
	(do_t_pacbti_nonop): New function.
	(insns): Define 'bxaut' insn.
	* testsuite/gas/arm/armv8_1-m-pacbti.d: Add 'bxaut' test.
	* testsuite/gas/arm/armv8_1-m-pacbti.s: Likewise.

opcodes/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* arm-dis.c (thumb32_opcodes): Add 'bxaut'.
This commit is contained in:
Andrea Corallo 2021-05-19 15:04:24 +02:00
parent 5a0c7a819f
commit e07352fa4f
4 changed files with 19 additions and 1 deletions
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14
gas/config/tc-arm.c
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@ -11463,6 +11463,7 @@ encode_thumb32_addr_mode (int i, bool is_t, bool is_d)
X(_bflx, 0000, f070e001), \
X(_bic, 4380, ea200000), \
X(_bics, 4380, ea300000), \
X(_bxaut, 0000, fb500f10), \
X(_cinc, 0000, ea509000), \
X(_cinv, 0000, ea50a000), \
X(_cmn, 42c0, eb100f00), \
@ -22343,6 +22344,18 @@ do_t_pacbti (void)
inst.instruction = THUMB_OP32 (inst.instruction);
}
static void
do_t_pacbti_nonop (void)
{
constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, pacbti_ext),
_(BAD_PACBTI));
inst.instruction = THUMB_OP32 (inst.instruction);
inst.instruction |= inst.operands[0].reg << 12;
inst.instruction |= inst.operands[1].reg << 16;
inst.instruction |= inst.operands[2].reg;
}
/* Overall per-instruction processing. */
@ -26333,6 +26346,7 @@ static const struct asm_opcode insns[] =
#define THUMB_VARIANT & arm_ext_v8_1m_main
toU("aut", _aut, 3, (R12, LR, SP), t_pacbti),
ToU("bti", f3af800f, 0, (), noargs),
toU("bxaut", _bxaut, 3, (RR, RR, RR), t_pacbti_nonop),
toU("pac", _pac, 3, (R12, LR, SP), t_pacbti),
toU("pacbti", _pacbti, 3, (R12, LR, SP), t_pacbti),
toU("cinc", _cinc, 3, (RRnpcsp, RR_ZR, COND), t_cond),

3
gas/testsuite/gas/arm/armv8_1-m-pacbti.d
View File

@ -1,6 +1,6 @@
#name: Valid Armv8.1-M pointer authentication and branch target identification extention
#source: armv8_1-m-pacbti.s
#as: -march=armv8.1-m.main
#as: -march=armv8.1-m.main+pacbti
#objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
@ -10,4 +10,5 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f3af 800d pacbti r12, lr, sp
0[0-9a-f]+ <[^>]+> f3af 802d aut r12, lr, sp
0[0-9a-f]+ <[^>]+> f3af 801d pac r12, lr, sp
0[0-9a-f]+ <[^>]+> fb54 3f15 bxaut r3, r4, r5
#...

1
gas/testsuite/gas/arm/armv8_1-m-pacbti.s
View File

@ -6,3 +6,4 @@
pacbti r12, lr, sp
aut r12, lr, sp
pac r12, lr, sp
bxaut r3, r4, r5

2
opcodes/arm-dis.c
View File

@ -4658,6 +4658,8 @@ static const struct opcode32 thumb32_opcodes[] =
0xf3af802d, 0xffffffff, "aut\tr12, lr, sp"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf3af800f, 0xffffffff, "bti"},
{ARM_FEATURE_CORE_HIGH_HIGH (ARM_EXT3_PACBTI),
0xfb500f10, 0xfff00ff0, "bxaut%c\t%12-15r, %16-19r, %0-3r"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf3af801d, 0xffffffff, "pac\tr12, lr, sp"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),