Properly sign-extend byte.
gas/testsuite/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.d: Updated. * gas/i386/opcode-intel.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. opcodes/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (sIbT): New. (b_T_mode): Likewise. (dis386): Replace sIb with sIbT on "pushT". (x86_64_table): Replace sIb with Ib on "aam" and "aad". (OP_sI): Handle b_T_mode. Properly sign-extend byte.
This commit is contained in:
H.J. Lu
parent
0ae8ca9029
commit
e3949f17f3
@ -1,3 +1,10 @@
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2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/intel.d: Updated.
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* gas/i386/opcode-intel.d: Likewise.
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* gas/i386/opcode-suffix.d: Likewise.
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* gas/i386/opcode.d: Likewise.
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2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction
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@ -212,8 +212,8 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: d1 90 90 90 90 90 [ ]*rcll -0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: d2 90 90 90 90 90 [ ]*rclb %cl,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: d3 90 90 90 90 90 [ ]*rcll %cl,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: d4 90 [ ]*aam \$0xffffff90
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[ ]*[a-f0-9]+: d5 90 [ ]*aad \$0xffffff90
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[ ]*[a-f0-9]+: d4 90 [ ]*aam \$0x90
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[ ]*[a-f0-9]+: d5 90 [ ]*aad \$0x90
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[ ]*[a-f0-9]+: d7 [ ]*xlat %ds:\(%ebx\)
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[ ]*[a-f0-9]+: d8 90 90 90 90 90 [ ]*fcoms -0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: d9 90 90 90 90 90 [ ]*fsts -0x6f6f6f70\(%eax\)
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@ -473,12 +473,12 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 66 62 90 90 90 90 90 [ ]*bound %dx,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 66 68 90 90 [ ]*pushw \$0x9090
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[ ]*[a-f0-9]+: 66 69 90 90 90 90 90 90 90 [ ]*imul \$0x9090,-0x6f6f6f70\(%eax\),%dx
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[ ]*[a-f0-9]+: 66 6a 90 [ ]*pushw \$0xffffff90
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[ ]*[a-f0-9]+: 66 6b 90 90 90 90 90 90 [ ]*imul \$0xffffff90,-0x6f6f6f70\(%eax\),%dx
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[ ]*[a-f0-9]+: 66 6a 90 [ ]*pushw \$0xff90
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[ ]*[a-f0-9]+: 66 6b 90 90 90 90 90 90 [ ]*imul \$0xff90,-0x6f6f6f70\(%eax\),%dx
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[ ]*[a-f0-9]+: 66 6d [ ]*insw \(%dx\),%es:\(%edi\)
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[ ]*[a-f0-9]+: 66 6f [ ]*outsw %ds:\(%esi\),\(%dx\)
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[ ]*[a-f0-9]+: 66 81 90 90 90 90 90 90 90 [ ]*adcw \$0x9090,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 66 83 90 90 90 90 90 90 [ ]*adcw \$0xffffff90,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 66 83 90 90 90 90 90 90 [ ]*adcw \$0xff90,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 66 85 90 90 90 90 90 [ ]*test %dx,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 66 87 90 90 90 90 90 [ ]*xchg %dx,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 66 89 90 90 90 90 90 [ ]*mov %dx,-0x6f6f6f70\(%eax\)
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@ -210,8 +210,8 @@ Disassembly of section .text:
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*[0-9a-f]+: d1 90 90 90 90 90[ ]+rcl[ ]+DWORD PTR \[eax-0x6f6f6f70\],1
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*[0-9a-f]+: d2 90 90 90 90 90[ ]+rcl[ ]+BYTE PTR \[eax-0x6f6f6f70\],cl
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*[0-9a-f]+: d3 90 90 90 90 90[ ]+rcl[ ]+DWORD PTR \[eax-0x6f6f6f70\],cl
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*[0-9a-f]+: d4 90[ ]+aam[ ]+0xffffff90
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*[0-9a-f]+: d5 90[ ]+aad[ ]+0xffffff90
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*[0-9a-f]+: d4 90[ ]+aam[ ]+0x90
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*[0-9a-f]+: d5 90[ ]+aad[ ]+0x90
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*[0-9a-f]+: d7[ ]+xlat[ ]+(BYTE PTR )?(ds:)?\[ebx\]
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*[0-9a-f]+: d8 90 90 90 90 90[ ]+fcom[ ]+DWORD PTR \[eax-0x6f6f6f70\]
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*[0-9a-f]+: d9 90 90 90 90 90[ ]+fst[ ]+DWORD PTR \[eax-0x6f6f6f70\]
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@ -471,12 +471,12 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 68 90 90[ ]+pushw[ ]+0x9090
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*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090
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*[0-9a-f]+: 66 6a 90[ ]+pushw[ ]+0xffffff90
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*[0-9a-f]+: 66 6b 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0xffffff90
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*[0-9a-f]+: 66 6a 90[ ]+pushw[ ]+0xff90
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*[0-9a-f]+: 66 6b 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0xff90
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*[0-9a-f]+: 66 6d[ ]+ins[ ]+WORD PTR es:\[edi\],dx
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*[0-9a-f]+: 66 6f[ ]+outs[ ]+dx,WORD PTR ds:\[esi\]
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*[0-9a-f]+: 66 81 90 90 90 90 90 90 90[ ]+adc[ ]+WORD PTR \[eax-0x6f6f6f70\],0x9090
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*[0-9a-f]+: 66 83 90 90 90 90 90 90[ ]+adc[ ]+WORD PTR \[eax-0x6f6f6f70\],0xffffff90
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*[0-9a-f]+: 66 83 90 90 90 90 90 90[ ]+adc[ ]+WORD PTR \[eax-0x6f6f6f70\],0xff90
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*[0-9a-f]+: 66 85 90 90 90 90 90[ ]+test[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 87 90 90 90 90 90[ ]+xchg[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 89 90 90 90 90 90[ ]+mov[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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@ -210,8 +210,8 @@ Disassembly of section .text:
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*[0-9a-f]+: d1 90 90 90 90 90[ ]+rcll[ ]+-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: d2 90 90 90 90 90[ ]+rclb[ ]+%cl,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: d3 90 90 90 90 90[ ]+rcll[ ]+%cl,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: d4 90[ ]+aam[ ]+\$0xffffff90
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*[0-9a-f]+: d5 90[ ]+aad[ ]+\$0xffffff90
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*[0-9a-f]+: d4 90[ ]+aam[ ]+\$0x90
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*[0-9a-f]+: d5 90[ ]+aad[ ]+\$0x90
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*[0-9a-f]+: d7[ ]+xlat[ ]+%ds:\(%ebx\)
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*[0-9a-f]+: d8 90 90 90 90 90[ ]+fcoms[ ]+-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: d9 90 90 90 90 90[ ]+fsts[ ]+-0x6f6f6f70\(%eax\)
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@ -471,12 +471,12 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+boundw %dx,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 66 68 90 90[ ]+pushw[ ]+\$0x9090
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*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imulw[ ]+\$0x9090,-0x6f6f6f70\(%eax\),%dx
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*[0-9a-f]+: 66 6a 90[ ]+pushw[ ]+\$0xffffff90
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*[0-9a-f]+: 66 6b 90 90 90 90 90 90[ ]+imulw[ ]+\$0xffffff90,-0x6f6f6f70\(%eax\),%dx
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*[0-9a-f]+: 66 6a 90[ ]+pushw[ ]+\$0xff90
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*[0-9a-f]+: 66 6b 90 90 90 90 90 90[ ]+imulw[ ]+\$0xff90,-0x6f6f6f70\(%eax\),%dx
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*[0-9a-f]+: 66 6d[ ]+insw[ ]+\(%dx\),%es:\(%edi\)
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*[0-9a-f]+: 66 6f[ ]+outsw[ ]+%ds:\(%esi\),\(%dx\)
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*[0-9a-f]+: 66 81 90 90 90 90 90 90 90[ ]+adcw[ ]+\$0x9090,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 66 83 90 90 90 90 90 90[ ]+adcw[ ]+\$0xffffff90,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 66 83 90 90 90 90 90 90[ ]+adcw[ ]+\$0xff90,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 66 85 90 90 90 90 90[ ]+testw[ ]+%dx,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 66 87 90 90 90 90 90[ ]+xchgw[ ]+%dx,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 66 89 90 90 90 90 90[ ]+movw[ ]+%dx,-0x6f6f6f70\(%eax\)
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@ -209,8 +209,8 @@ Disassembly of section .text:
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283: d1 90 90 90 90 90 [ ]*rcll -0x6f6f6f70\(%eax\)
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289: d2 90 90 90 90 90 [ ]*rclb %cl,-0x6f6f6f70\(%eax\)
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28f: d3 90 90 90 90 90 [ ]*rcll %cl,-0x6f6f6f70\(%eax\)
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295: d4 90 [ ]*aam \$0xffffff90
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297: d5 90 [ ]*aad \$0xffffff90
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295: d4 90 [ ]*aam \$0x90
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297: d5 90 [ ]*aad \$0x90
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299: d7 [ ]*xlat %ds:\(%ebx\)
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29a: d8 90 90 90 90 90 [ ]*fcoms -0x6f6f6f70\(%eax\)
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2a0: d9 90 90 90 90 90 [ ]*fsts -0x6f6f6f70\(%eax\)
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@ -470,12 +470,12 @@ Disassembly of section .text:
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783: 66 62 90 90 90 90 90 [ ]*bound %dx,-0x6f6f6f70\(%eax\)
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78a: 66 68 90 90 [ ]*pushw \$0x9090
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78e: 66 69 90 90 90 90 90 90 90 [ ]*imul \$0x9090,-0x6f6f6f70\(%eax\),%dx
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797: 66 6a 90 [ ]*pushw \$0xffffff90
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79a: 66 6b 90 90 90 90 90 90 [ ]*imul \$0xffffff90,-0x6f6f6f70\(%eax\),%dx
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797: 66 6a 90 [ ]*pushw \$0xff90
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79a: 66 6b 90 90 90 90 90 90 [ ]*imul \$0xff90,-0x6f6f6f70\(%eax\),%dx
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7a2: 66 6d [ ]*insw \(%dx\),%es:\(%edi\)
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7a4: 66 6f [ ]*outsw %ds:\(%esi\),\(%dx\)
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7a6: 66 81 90 90 90 90 90 90 90 [ ]*adcw \$0x9090,-0x6f6f6f70\(%eax\)
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7af: 66 83 90 90 90 90 90 90 [ ]*adcw \$0xffffff90,-0x6f6f6f70\(%eax\)
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7af: 66 83 90 90 90 90 90 90 [ ]*adcw \$0xff90,-0x6f6f6f70\(%eax\)
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7b7: 66 85 90 90 90 90 90 [ ]*test %dx,-0x6f6f6f70\(%eax\)
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7be: 66 87 90 90 90 90 90 [ ]*xchg %dx,-0x6f6f6f70\(%eax\)
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7c5: 66 89 90 90 90 90 90 [ ]*mov %dx,-0x6f6f6f70\(%eax\)
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@ -1,3 +1,11 @@
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2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (sIbT): New.
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(b_T_mode): Likewise.
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(dis386): Replace sIb with sIbT on "pushT".
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(x86_64_table): Replace sIb with Ib on "aam" and "aad".
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(OP_sI): Handle b_T_mode. Properly sign-extend byte.
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2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
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* i386-init.h: Regenerated.
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@ -252,6 +252,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define Rm { OP_R, m_mode }
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#define Ib { OP_I, b_mode }
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#define sIb { OP_sI, b_mode } /* sign extened byte */
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#define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */
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#define Iv { OP_I, v_mode }
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#define sIv { OP_sI, v_mode }
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#define Iq { OP_I, q_mode }
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@ -414,6 +415,8 @@ enum
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b_mode = 1,
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/* byte operand with operand swapped */
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b_swap_mode,
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/* byte operand, sign extend like 'T' suffix */
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b_T_mode,
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/* operand size depends on prefixes */
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v_mode,
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/* operand size depends on prefixes with operand swapped */
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@ -1790,7 +1793,7 @@ static const struct dis386 dis386[] = {
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/* 68 */
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{ "pushT", { sIv } },
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{ "imulS", { Gv, Ev, Iv } },
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{ "pushT", { sIb } },
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{ "pushT", { sIbT } },
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{ "imulS", { Gv, Ev, sIb } },
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{ "ins{b|}", { Ybr, indirDX } },
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{ X86_64_TABLE (X86_64_6D) },
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@ -5544,12 +5547,12 @@ static const struct dis386 x86_64_table[][2] = {
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/* X86_64_D4 */
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{
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{ "aam", { sIb } },
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{ "aam", { Ib } },
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},
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/* X86_64_D5 */
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{
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{ "aad", { sIb } },
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{ "aad", { Ib } },
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},
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/* X86_64_EA */
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@ -13731,10 +13734,32 @@ OP_sI (int bytemode, int sizeflag)
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switch (bytemode)
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{
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case b_mode:
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case b_T_mode:
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FETCH_DATA (the_info, codep + 1);
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op = *codep++;
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if ((op & 0x80) != 0)
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op -= 0x100;
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if (bytemode == b_T_mode)
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{
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if (address_mode != mode_64bit
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|| !(sizeflag & DFLAG))
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{
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if (sizeflag & DFLAG)
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op &= 0xffffffff;
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else
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op &= 0xffff;
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}
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}
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else
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{
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if (!(rex & REX_W))
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{
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if (sizeflag & DFLAG)
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op &= 0xffffffff;
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else
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op &= 0xffff;
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}
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}
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break;
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case v_mode:
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if (sizeflag & DFLAG)
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