diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 80d553e581b..17806b432bb 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.tbl: Add a blank line.
+
 2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 3551f12b2a1..ded96884c0b 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -84,6 +84,7 @@
 #define Vex128 Vex=VEX128
 #define Vex256 Vex=VEX256
 #define VexLIG Vex=VEXScalar
+
 #define VecSIB128 SIB=VECSIB128
 #define VecSIB256 SIB=VECSIB256
 #define VecSIB512 SIB=VECSIB512