This commit is the result of running the gdb/copyright.py script,
which automated the update of the copyright year range for all
source files managed by the GDB project to be updated to include
year 2023.
This commit brings all the changes made by running gdb/copyright.py
as per GDB's Start of New Year Procedure.
For the avoidance of doubt, all changes in this commits were
performed by the script.
This updates the various "mloop.in" files to emit an include of
stdlib.h, to avoid warnings about 'abort' being undeclared.
One such warning now remains, in mn10300.igen. I don't know offhand
the best way to fix this one.
2021-05-04 Tom Tromey <tromey@adacore.com>
* mloop.in: Include <stdlib.h>.
sim/iq2000/ChangeLog
2021-05-04 Tom Tromey <tromey@adacore.com>
* mloop.in: Include <stdlib.h>.
sim/lm32/ChangeLog
2021-05-04 Tom Tromey <tromey@adacore.com>
* mloop.in: Include <stdlib.h>.
sim/m32r/ChangeLog
2021-05-04 Tom Tromey <tromey@adacore.com>
* mloop.in: Include <stdlib.h>.
sim/or1k/ChangeLog
2021-05-04 Tom Tromey <tromey@adacore.com>
* mloop.in: Include <stdlib.h>.
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...
gdb/ChangeLog
Update copyright year range in copyright header of all GDB files.
This commit applies all changes made after running the gdb/copyright.py
script.
Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.
gdb/ChangeLog:
Update copyright year range in all GDB files.
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN
based sim so the bulk of the code is generated from the .cpu files by
CGEN. The engine decode and execute logic in mloop uses scache with
pseudo-basic-block extraction and supports both full and fast (switch)
modes.
The sim does not implement an mmu at the moment. The sim does implement
fpu instructions via the common sim-fpu implementation.
sim/ChangeLog:
2017-12-12 Stafford Horne <shorne@gmail.com>
Peter Gavin <pgavin@gmail.com>
* configure.tgt: Add or1k sim.
* or1k/README: New file.
* or1k/Makefile.in: New file.
* or1k/configure.ac: New file.
* or1k/mloop.in: New file.
* or1k/or1k-sim.h: New file.
* or1k/or1k.c: New file.
* or1k/sim-if.c: New file.
* or1k/sim-main.h: New file.
* or1k/traps.c: New file.
