7 Commits

Author SHA1 Message Date
James Bowman
395b0d8a3f sim: ft32: correct simulation of MEMCPY and MEMSET
The MEMCPY and MEMSET instructions should only examine the low 15 bits of
their length arguments.
2015-09-29 23:39:24 -04:00
James Bowman
71c34ca7a0 sim: ft32: correctly simulate PM write port
The FT32 simulator was not correctly simulating the behavior of the
program memory (PM) write port.  When it is locked, writes to the
data register do nothing.
2015-09-29 23:36:56 -04:00
James Bowman
bcd68f9e44 sim: ft32: add character input port
The FT32 simulator has character output, of course. This patch
adds character input, which lets the simulator run interactive
FT32 applications, e.g. language interpreters.
2015-09-22 22:43:56 -04:00
Mike Frysinger
034685f9ce sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
2015-04-17 02:44:30 -04:00
Mike Frysinger
65f9096890 sim: ft32: fix ft32_pc_get logic 2015-04-13 01:54:33 -04:00
Mike Frysinger
29f1a5934a sim: ft32: delete sim_read/sim_write funcs
The common sim-hrw.o provides both of these, so simply use them.
2015-04-12 05:13:23 -04:00
James Bowman
f46e4eb78b sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
2015-03-28 02:12:33 -04:00