19 Commits

Author SHA1 Message Date
Mike Frysinger
883be19774 sim: cpu: change default init to handle all cpus
All the runtimes were only initializing a single CPU.  When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup.  Change the default from 0 to the compile time value.
2022-12-25 02:10:46 -05:00
Mike Frysinger
20fea6638f sim: use bfd_vma when reading start addr from bfd info
Since SIM_ADDR is always 32-bit, it might truncate the address with
64-bit ELFs.  Since we load that addr from the bfd, use the bfd_vma
type which matches the bfd_get_start_address API.
2022-12-22 19:29:10 -05:00
Mike Frysinger
3d165c11f0 sim: pru: invert sim_cpu storage 2022-12-21 00:00:01 -05:00
Mike Frysinger
ee1cffd388 sim: common: change sim_{fetch,store}_register helpers to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-11-02 20:31:10 +05:45
Mike Frysinger
5bab16fdf1 sim: reg: constify store helper
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
Mike Frysinger
ed60d3edd5 sim: constify various integer readers
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
Joel Brobecker
4a94e36819 Automatic Copyright Year update after running gdb/copyright.py
This commit brings all the changes made by running gdb/copyright.py
as per GDB's Start of New Year Procedure.

For the avoidance of doubt, all changes in this commits were
performed by the script.
2022-01-01 19:13:23 +04:00
Mike Frysinger
8cfc9a1895 sim: callback: expose argv & environ
Pass the existing strings data to the callbacks so that common
libgloss syscalls can be implemented (which we'll do shortly).
2021-11-16 01:13:39 -05:00
Mike Frysinger
54f7a83a62 sim: keep track of program environment strings
We've been passing the environment strings to sim_create_inferior,
but most ports don't do anything with them.  A few will use ad-hoc
logic to stuff the stack for user-mode programs, but that's it.

Let's formalize this across the board by storing the strings in the
normal sim state.  This will allow (in future commits) supporting
more functionality in the run interface, and to unify some of the
libgloss syscalls.
2021-11-16 00:58:41 -05:00
Mike Frysinger
e8f20a28b1 sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.
2021-11-15 02:53:29 -05:00
Mike Frysinger
1fef66b0dc sim: split sim-signal.h include out
The sim-basics.h is too big and includes too many things.  This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
2021-06-18 00:50:14 -04:00
Mike Frysinger
f9a4d54332 sim: overhaul & unify endian settings management
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified).  If none are specified, the arch is
expected to support both, and the value will be probed based on the
user runtime options or the input program.

Only two arches today set the default value (bpf & mips).  We can
probably let this go as it only shows up in one scenario: the sim
is invoked, but with no inputs, and no user endian selection.  This
means bpf will not behave like the other arches: an error is shown
and forces the user to make a choice.  If an input program is used
though, we'll still switch the default to that.  This allows us to
remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting.

For the ports that set a "wire" endian, move it to the runtime init
of the respective sim_open calls.  This allows us to change the
WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting
if they want to force a specific endianness.

With all the endian logic moved to runtime selection, we can move
the configure call up to the common dir so we only process it once
across all ports.

The ppc arch was picking the wire endian based on the target used,
but since we weren't doing that for other biendian arches, we can
let this go too.  We'll rely on the input selecting the endian, or
make the user decide.
2021-06-17 23:20:13 -04:00
Mike Frysinger
ba307cddcf sim: overhaul alignment settings management
Currently, the sim-config module will abort if alignment settings
haven't been specified by the port's configure.ac.  This is a bit
weird when we've allowed SIM_AC_OPTION_ALIGNMENT to seem like it's
optional to use.  Thus everyone invokes it.

There are 4 alignment settings, but really only 2 matters: strict
and nonstrict.  The "mixed" setting is just the default ("unset"),
and "forced" isn't used directly by anyone (it's available as a
runtime option for some ports).

The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified).  If none are specified, then the
build won't work (see above as if SIM_AC_OPTION_ALIGNMENT wasn't
called).  If default settings are provided, then that is used, but
we allow the user to override at runtime.  Otherwise, the "wire"
settings are used and user runtime options to change are ignored.

Most ports specify a default, or set the "wire" to nonstrict.  A
few set "wire" to strict, but it's not clear that's necessary as
it doesn't make the code behavior, by default, any different.  It
might make things a little faster, but we should provide the user
the choice of the compromises to make: force a specific mode at
compile time for faster runtime, or allow the choice at runtime.
More likely it seems like an oversight when these ports were
initially created, and/or copied & pasted from existing ports.

With all that backstory, let's get to what this commit does.

First kill off the idea of a compile-time default alignment and
set it to nonstrict in the common code.  For any ports that want
strict alignment by default, that code is moved to sim_open while
initializing the sim.  That means WITH_DEFAULT_ALIGNMENT can be
completely removed.

Moving the default alignment to the runtime also allows removal
of setting the "wire" settings at configure time.  Which allows
removing of all arguments to SIM_AC_OPTION_ALIGNMENT and moving
that call to common code.

The macro logic can be reworked to not pass WITH_ALIGNMENT as -D
CPPFLAG and instead move it to config.h.

All of these taken together mean we can hoist the macro up to the
top level and share it among all sims so behavior is consistent
among all the ports.
2021-06-12 21:14:50 -04:00
Mike Frysinger
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
Mike Frysinger
df68e12b3b sim: create header namespace
The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it.  So
create a new sim/ namespace and move the headers there.
2021-05-14 00:41:05 -04:00
Mike Frysinger
d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
2021-04-12 00:14:32 -04:00
Joel Brobecker
3666a04883 Update copyright year range in all GDB files
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...

gdb/ChangeLog

        Update copyright year range in copyright header of all GDB files.
2021-01-01 12:12:21 +04:00
Joel Brobecker
b811d2c292 Update copyright year range in all GDB files.
gdb/ChangeLog:

        Update copyright year range in all GDB files.
2020-01-01 10:20:53 +04:00
Dimitar Dimitrov
ddd44b7053 sim: Add PRU simulator port
A simulator port for the TI PRU I/O processor.

v1: https://sourceware.org/ml/gdb-patches/2016-12/msg00143.html
v2: https://sourceware.org/ml/gdb-patches/2017-02/msg00397.html
v3: https://sourceware.org/ml/gdb-patches/2017-02/msg00516.html
v4: https://sourceware.org/ml/gdb-patches/2018-06/msg00484.html
v5: https://sourceware.org/ml/gdb-patches/2019-08/msg00584.html
v6: https://sourceware.org/ml/gdb-patches/2019-09/msg00036.html

gdb/ChangeLog:

	* NEWS: Mention new simulator port for PRU.

sim/ChangeLog:

	* MAINTAINERS: Add myself as PRU maintainer.
	* configure: Regenerated.
	* configure.tgt: Add PRU.

sim/common/ChangeLog:

	* gennltvals.sh: Add PRU libgloss target.
	* nltvals.def: Regenerate from the latest libgloss sources.

sim/pru/ChangeLog:

	* Makefile.in: New file.
	* aclocal.m4: Regenerated.
	* config.in: Regenerated.
	* configure: Regenerated.
	* configure.ac: New file.
	* interp.c: New file.
	* pru.h: New file.
	* pru.isa: New file.
	* sim-main.h: New file.
2019-09-23 22:11:02 +01:00