This patch uses bitfields in reloc_howto_struct, reducing its size
from 80 to 40 bytes on 64-bit hosts and from 52 to 32 bytes on 32-bit
hosts (with a 32-bit bfd_vma). I've also added a new "negate" field
rather than making the encoded "size" field do double duty as both
a size and a flag.
There was just one use of an encoded size of 8, which according to
bfd_get_reloc_size meant 16 bytes, in vms-alpha.c ALPHA_R_LINKAGE.
See git commit c3d8e071bf adding ALPHA_R_LINKAGE and git commit
8612a388f7 decoding size 8 in bfd_get_reloc_size. Since no other part
of BFD handles 16 byte relocs, I've removed that encoding and special
cased the ALPHA_R_LINKAGE size in vms-alpha.c.
* reloc.c (reloc_howto_type): Typedef.
(bfd_symbol): Delete forward declaration.
(struct reloc_howto_struct): Add "negate" field. Make "size",
"bitsize", "rightshift", "bitpos", "complain_on_overflow",
"pc_relative", "partial_inplace", and "pcrel_offset" bitfields.
Rearrange for better packing. Revise comments.
(HOWTO): Map to rearranged reloc_howto_struct.
(bfd_get_reloc_size): Delete now unused cases.
(read_reloc, write_reloc): Likewise.
(apply_reloc, _bfd_relocate_contents): Test howto->negate
rather than howto->size < 0 for negated relocation values.
* coff-rs6000.c (xcoff_complain_overflow_bitfield_func): Avoid
signed/unsigned warning.
(xcoff_ppc_relocate_section): Delete "condition is always false"
code.
* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
* cpu-ns32k.c (do_ns32k_reloc): Adjust to suit reloc_howto_struct
changes.
* vms-alpha.c (_bfd_vms_write_etir, alpha_vms_slurp_relocs): Use
size 16 for ALPHA_R_LINKAGE.
(alpha_howto_table <ALPHA_R_LINKAGE>): Set encoded size and
bitsize to zero.
* bfd-in.h (reloc_howto_type): Delete.
* bfd-in2.h: Regenerate.
NEWHOWTO was promised way back in 1991 (git commit e5683622186).
I doubt it's ever going to be implemented. This patch removes it,
and tidies some reloc howtos. I was going to make some changes to
reloc_howto_struct, so I think it's important that all relocs howtos
are initialized with HOWTO.
* reloc.c (HOWTO): Revise comment.
(NEWHOWTO, HOWTO_PREPARE): Delete.
* coff-arm.c (coff_arm_reloc_type_lookup): Replace const struc
reloc_howto_struct with reloc_howto_type.
* ns32knetbsd.c (MY_bfd_reloc_type_lookup): Likewise.
* vms-alpha.c (alpha_vms_bfd_reloc_type_lookup): Likewise.
* elf-hppa.h (HOW): Define.
(elf_hppa_howto_table): Use it to simplify this table, correcting
name of R_PARISC_LTOFF16WF, R_PARISC_LTOFF_FPTR64, and
R_PARISC_LTOFF_FPTR16DF.
* elf32-mep.c (MEPREL): Use HOWTO.
* bfd-in2.h: Regenerate.
R_PPC64_REL24_NOTOC is used on calls like "bl foo@notoc" to tell the
linker that linkage stubs for PLT calls or long branches can't use r2
for pic addressing. Instead, new stubs that generate pc-relative
addresses are used. One complication is that pc-relative offsets to
the PLT may need to be 64-bit in large programs, in contrast to the
toc-relative addressing used by older PLT linkage stubs where a 32-bit
offset is sufficient until the PLT itself exceeds 2G in size.
.eh_frame info to cover the _notoc stubs is yet to be implemented.
bfd/
* elf64-ppc.c (ADDI_R12_R11, ADDI_R12_R12, LIS_R12),
(ADDIS_R12_R11, ORIS_R12_R12_0, ORI_R12_R12_0),
(SLDI_R12_R12_32, LDX_R12_R11_R12, ADD_R12_R11_R12): Define.
(ppc64_elf_howto_raw): Add R_PPC64_REL24_NOTOC entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_REL24_NOTOC.
(ppc_stub_type): Add ppc_stub_long_branch_notoc,
ppc_stub_long_branch_both, ppc_stub_plt_branch_notoc,
ppc_stub_plt_branch_both, ppc_stub_plt_call_notoc, and
ppc_stub_plt_call_both.
(is_branch_reloc): Add R_PPC64_REL24_NOTOC.
(build_offset, size_offset): New functions.
(plt_stub_size): Support plt_call_notoc and plt_call_both.
(ppc_build_one_stub, ppc_size_one_stub): Support new stubs.
(toc_adjusting_stub_needed): Handle R_PPC64_REL24_NOTOC.
(ppc64_elf_size_stubs): Likewise, and new stubs.
(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Likewise.
* reloc.c: Add BFD_RELOC_PPC64_REL24_NOTOC.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @notoc.
(ppc_force_relocation, ppc_fix_adjustable): Handle REL24_NOTOC.
ld/
* testsuite/ld-powerpc/ext.d,
* testsuite/ld-powerpc/ext.s,
* testsuite/ld-powerpc/ext.lnk,
* testsuite/ld-powerpc/notoc.d,
* testsuite/ld-powerpc/notoc.s: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants. V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc. There is support for bare-metal ELF targets and Linux with both glibc and uClibc.
This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics. C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers. (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about.
bfd * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
(BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
* Makefile.in: Regenerated.
* archures.c (enum bfd_architecture): Add bfd_arch_csky and
related bfd_mach defines.
(bfd_csky_arch): Declare.
(bfd_archures_list): Add C-SKY.
* bfd-in.h (elf32_csky_build_stubs): Declare.
(elf32_csky_size_stubs): Declare.
(elf32_csky_next_input_section: Declare.
(elf32_csky_setup_section_lists): Declare.
* bfd-in2.h: Regenerated.
* config.bfd: Add C-SKY.
* configure.ac: Likewise.
* configure: Regenerated.
* cpu-csky.c: New file.
* elf-bfd.h (enum elf_target_id): Add C-SKY.
* elf32-csky.c: New file.
* libbfd.h: Regenerated.
* reloc.c: Add C-SKY relocations.
* targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
(_bfd_target_vector): Add C-SKY target vector entries.
binutils* readelf.c: Include elf/csky.h.
(guess_is_rela): Handle EM_CSKY.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
include * dis-asm.h (csky_symbol_is_valid): Declare.
* opcode/csky.h: New file.
opcodes * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c.
* Makefile.in: Regenerated.
* configure.ac: Add C-SKY.
* configure: Regenerated.
* csky-dis.c: New file.
* csky-opc.h: New file.
* disassemble.c (ARCH_csky): Define.
(disassembler, disassemble_init_for_target): Add case for ARCH_csky.
* disassemble.h (print_insn_csky, csky_get_disassembler): Declare.
gas * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
(TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
* Makefile.in: Regenerated.
* config/tc-csky.c: New file.
* config/tc-csky.h: New file.
* config/te-csky_abiv1.h: New file.
* config/te-csky_abiv1_linux.h: New file.
* config/te-csky_abiv2.h: New file.
* config/te-csky_abiv2_linux.h: New file.
* configure.tgt: Add C-SKY.
* doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set CSKY feature.
* doc/as.texi (Overview): Add C-SKY options.
(Machine Dependencies): Likewise.
* doc/c-csky.texi: New file.
* testsuite/gas/csky/*: New test cases.
ld * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations.
(ecskyelf.c, ecskyelf_linux.c): New rules.
* Makefile.in: Regenerated.
* configure.tgt: Add C-SKY.
* emulparams/cskyelf.sh: New file.
* emulparams/cskyelf_linux.sh: New file.
* emultempl/cskyelf.em: New file.
* gen-doc.texi: Add C-SKY.
* ld.texi: Likewise.
(Options specific to C-SKY targets): New section.
* testsuite/ld-csky/*: New tests.
It is usually possible to tell absolute and ordinary symbols apart in
BFD throughout the link, by checking whether the section that owns the
symbol is absolute or not.
That however does not work for ordinary symbols defined in a linker
script outside an output section statement. Initially such symbols are
entered into to the link hash as absolute symbols, owned by the absolute
section. A flag is set in the internal linker expression defining such
symbols to tell the linker to convert them to section-relative ones in
the final phase of the link. That flag is however not accessible to BFD
linker code, including BFD target code in particular.
Add a flag to the link hash then to copy the information held in the
linker expression. Define a macro, `bfd_is_abs_symbol', for BFD code to
use where determining whether a symbol is absolute or ordinary is
required before the final link phase.
This macro will correctly identify the special `__ehdr_start' symbol as
ordinary throughout link, for example, even though early on it will be
assigned to the absolute section. Of course this does not let BFD code
identify what the symbol's ultimate section will be before the final
link phase has converted this symbol (in `update_definedness').
include/
* bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
bfd/
* linker.c (bfd_is_abs_symbol): New macro.
* bfd-in2.h: Regenerate.
ld/
* ldexp.c (exp_fold_tree_1) <etree_assign, etree_provide>
<etree_provided>: Copy expression's `rel_from_abs' flag to the
link hash.
BFD's bfd_get_mach () function returns a bfd specific value representing
the architecture of the target which is populated from the Tag_CPU_arch
build attribute value of that target. Among other users of that
interfacem, objdump which uses it to print the architecture version of
the binary being examinated and to decide what instruction is available
if run with "-m arm" via its own mapping from bfd_mach_arm_X values to
feature bits available.
However, both BFD and objdump's most recent known architecture is
Armv5TE. When encountering a newer architecture bfd_get_mach will return
bfd_mach_arm_unknown. This is unfortunate since objdump uses that value
to allow all instructions on all architectures which is already what it
does by default, making the "-m arm" trick useless.
This patch updates BFD and objdump's knowledge of Arm architecture
versions up to the latest Armv8-M Baseline and Mainline, Armv8-R and
Armv8.4-A architectures. Since several architecture versions (eg. 8.X-A)
share the same Tag_CPU_arch build attribute value and
bfd_mach_arm values, the mapping from bfd machine value to feature bits
need to return the most featureful feature bits that would yield the
given bfd machine value otherwise some instruction would not disassemble
under "-m arm" mode. The patch rework that mapping to make this clearer
and simplify writing the mapping rules. In particular, for simplicity
all FPU instructions are allowed in all cases.
Finally, the patch also rewrite the cpu_arch_ver table in GAS to use the
TAG_CPU_ARCH_X macros rather than hardcode their value.
2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* archures.c (bfd_mach_arm_5TEJ, bfd_mach_arm_6, bfd_mach_arm_6KZ,
bfd_mach_arm_6T2, bfd_mach_arm_6K, bfd_mach_arm_7, bfd_mach_arm_6M,
bfd_mach_arm_6SM, bfd_mach_arm_7EM, bfd_mach_arm_8, bfd_mach_arm_8R,
bfd_mach_arm_8M_BASE, bfd_mach_arm_8M_MAIN): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (arch_info_struct): Add entries for above new
bfd_mach_arm values.
* elf32-arm.c (bfd_arm_get_mach_from_attributes): Add Tag_CPU_arch to
bfd_mach_arm mapping logic for pre Armv4 and Armv5TEJ and later
architectures. Force assert failure for any new Tag_CPU_arch value.
gas/
* config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros
rather than hardcode their values.
ld/
* arm-dis.c (select_arm_features): Fix typo in heading comment. Allow
all FPU features and add mapping from new bfd_mach_arm values to
allowed CPU feature bits.
opcodes/
* testsuite/ld-arm/tls-descrelax-be8.d: Add architecture version in
expected result.
* testsuite/ld-arm/tls-descrelax-v7.d: Likewise.
* testsuite/ld-arm/tls-longplt-lib.d: Likewise.
* testsuite/ld-arm/tls-longplt.d: Likewise.
Archive element IO is performed on the file of the containing archive,
which leads to the BFD "where" field of archives and their elements
being out of sync with the real file position. (We're talking
traditional archives here, not thin archives.) The old bfd_seek code
recognized this by not attempting to optimize away seeks for
archives. However, there was other code that could return bogus
results. For example, cache.c limits the number of open files by
closing a file and remembering its state once the limit is reached.
If bfd_tell is called on an archive element when the containing
archive is closed, it will return an invalid file pointer.
It's possible to have a valid "where" field for archives by always
using and updating the containing archive BFD. That's what this patch
does. Note that cache.c used to find the containing archive BFD
anyway for the iostream, so we're not really doing extra work, just
transferring it up to the correct abstraction level.
The patch also gets rid of some hacks. bfd_tell was called when
bfd_seek failed, in an attempt to correct "where". That's got to be
papering over another problem, so that code has been removed.
bfd_read also had an "optimiziation" to return early when the number
of bytes was zero, and bfd_seek optimized calls that didn't move the
file pointer. This was covering for a coff_slurp_line_table bug where
IO was attempted on a pe-dll BFD without an iovec.
* bfd.c (struct bfd): Update comment on "where" usage.
* bfdio.c (bfd_bwrite, bfd_stat): Use and update "iovec",
"iostream", and "where" from containing archive file. Return
error on NULL iovec.
(bfd_bread): Similarly, and return error attempted out of
bounds archive element access.
(bfd_tell, bfd_flush): Use and update "iovec", "iostream", and
"where" from containing archive file.
(bfd_seek): Likewise. Return error on NULL iovec. Don't
attempt to optimize away seeks. Don't paper over errors by
calling bfd_tell.
(bfd_get_mtime): Call bfd_stat rather than iovec->bstat.
(bfd_get_size): Likewise.
(bfd_mmap): Operate on and use iovec of containing archive
file. Return error on NULL iovec.
* cache.c (bfd_cache_lookup_worker): Abort if working on
archive element bfd.
(cache_bread_1): Delete bfd parameter, add FILE* parameter.
Don't ignore zero byte reads.
(cache_bread): Look up FILE* in cache here. Error on NULL
lookup.
(cache_bwrite): Rename "where" to "from".
(cache_bmmap): Don't handle archive elements.
* coffcode.h (coff_slurp_line_table): Exit early on zero
lineno count.
* bfd-in2.h: Regenerate.
bfd * Makefile.am: Add s12z files.
* Makefile.in: Regenerate.
* archures.c: Add bfd_s12z_arch.
* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
* bfd-in2.h: Regenerate.
* config.bfd: Add s12z target.
* configure.ac: Add s12z target.
* configure: Regenerate.
* cpu-s12z.c: New file.
* elf32-s12z.c: New file.
* libbfd.c (bfd_putb24): New function.
(bfd_putl24): New function.
* libbfd.h: Regenerate.
* reloc.c: Add s12z relocations.
(bfd_get_reloc_size): Handle size 5 relocs.
* targets.c: Add s12z_elf32_vec.
opcodes * Makefile.am: Add support for s12z architecture.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* s12z-dis.c: New file.
* s12z.h: New file.
include * elf/s12z.h: New header.
ld * Makefile.am: Add support for s12z architecture.
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* emulparams/m9s12zelf.sh: New file.
* scripttempl/elfm9s12z.sc: New file.
* testsuite/ld-discard/static.d: Expect to fail for the s12z
target.
* testsuite/ld-elf/endsym.d: Likewise.
* testsuite/ld-elf/merge.d: Likewise.
* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
* testsuite/ld-elf/sec64k.exp: Likewise.
* testsuite/ld-s12z: New directory.
* testsuite/ld-s12z/opr-linking.d: New file.
* testsuite/ld-s12z/opr-linking.s: New file.
* testsuite/ld-s12z/relative-linking.d: New file.
* testsuite/ld-s12z/relative-linking.s: New file.
* testsuite/ld-s12z/z12s.exp: New file.
gas * Makefile.am: Add support for s12z target.
* Makefile.in: Regenerate.
* NEWS: Mention the new support.
* config/tc-s12z.c: New file.
* config/tc-s12z.h: New file.
* configure.tgt: Add s12z support.
* doc/Makefile.am: Likewise.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add s12z documentation.
* doc/as.textinfo: Likewise.
* doc/c-s12z.texi: New file.
* testsuite/gas/s12z: New directory.
* testsuite/gas/s12z/abs.d: New file.
* testsuite/gas/s12z/abs.s: New file.
* testsuite/gas/s12z/adc-imm.d: New file.
* testsuite/gas/s12z/adc-imm.s: New file.
* testsuite/gas/s12z/adc-opr.d: New file.
* testsuite/gas/s12z/adc-opr.s: New file.
* testsuite/gas/s12z/add-imm.d: New file.
* testsuite/gas/s12z/add-imm.s: New file.
* testsuite/gas/s12z/add-opr.d: New file.
* testsuite/gas/s12z/add-opr.s: New file.
* testsuite/gas/s12z/and-imm.d: New file.
* testsuite/gas/s12z/and-imm.s: New file.
* testsuite/gas/s12z/and-opr.d: New file.
* testsuite/gas/s12z/and-opr.s: New file.
* testsuite/gas/s12z/and-or-cc.d: New file.
* testsuite/gas/s12z/and-or-cc.s: New file.
* testsuite/gas/s12z/bfext-special.d: New file.
* testsuite/gas/s12z/bfext-special.s: New file.
* testsuite/gas/s12z/bfext.d: New file.
* testsuite/gas/s12z/bfext.s: New file.
* testsuite/gas/s12z/bit-manip.d: New file.
* testsuite/gas/s12z/bit-manip.s: New file.
* testsuite/gas/s12z/bit.d: New file.
* testsuite/gas/s12z/bit.s: New file.
* testsuite/gas/s12z/bra-expression-defined.d: New file.
* testsuite/gas/s12z/bra-expression-defined.s: New file.
* testsuite/gas/s12z/bra-expression-undef.d: New file.
* testsuite/gas/s12z/bra-expression-undef.s: New file.
* testsuite/gas/s12z/bra.d: New file.
* testsuite/gas/s12z/bra.s: New file.
* testsuite/gas/s12z/brclr-symbols.d: New file.
* testsuite/gas/s12z/brclr-symbols.s: New file.
* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
* testsuite/gas/s12z/clb.d: New file.
* testsuite/gas/s12z/clb.s: New file.
* testsuite/gas/s12z/clr-opr.d: New file.
* testsuite/gas/s12z/clr-opr.s: New file.
* testsuite/gas/s12z/clr.d: New file.
* testsuite/gas/s12z/clr.s: New file.
* testsuite/gas/s12z/cmp-imm.d: New file.
* testsuite/gas/s12z/cmp-imm.s: New file.
* testsuite/gas/s12z/cmp-opr-inc.d: New file.
* testsuite/gas/s12z/cmp-opr-inc.s: New file.
* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
* testsuite/gas/s12z/cmp-opr-reg.d: New file.
* testsuite/gas/s12z/cmp-opr-reg.s: New file.
* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
* testsuite/gas/s12z/cmp-opr-xys.d: New file.
* testsuite/gas/s12z/cmp-opr-xys.s: New file.
* testsuite/gas/s12z/cmp-s-imm.d: New file.
* testsuite/gas/s12z/cmp-s-imm.s: New file.
* testsuite/gas/s12z/cmp-s-opr.d: New file.
* testsuite/gas/s12z/cmp-s-opr.s: New file.
* testsuite/gas/s12z/cmp-xy.d: New file.
* testsuite/gas/s12z/cmp-xy.s: New file.
* testsuite/gas/s12z/com-opr.d: New file.
* testsuite/gas/s12z/com-opr.s: New file.
* testsuite/gas/s12z/complex-shifts.d: New file.
* testsuite/gas/s12z/complex-shifts.s: New file.
* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
* testsuite/gas/s12z/dbCC.d: New file.
* testsuite/gas/s12z/dbCC.s: New file.
* testsuite/gas/s12z/dec-opr.d: New file.
* testsuite/gas/s12z/dec-opr.s: New file.
* testsuite/gas/s12z/dec.d: New file.
* testsuite/gas/s12z/dec.s: New file.
* testsuite/gas/s12z/div.d: New file.
* testsuite/gas/s12z/div.s: New file.
* testsuite/gas/s12z/eor.d: New file.
* testsuite/gas/s12z/eor.s: New file.
* testsuite/gas/s12z/exg.d: New file.
* testsuite/gas/s12z/exg.s: New file.
* testsuite/gas/s12z/ext24-ld-xy.d: New file.
* testsuite/gas/s12z/ext24-ld-xy.s: New file.
* testsuite/gas/s12z/inc-opr.d: New file.
* testsuite/gas/s12z/inc-opr.s: New file.
* testsuite/gas/s12z/inc.d: New file.
* testsuite/gas/s12z/inc.s: New file.
* testsuite/gas/s12z/inh.d: New file.
* testsuite/gas/s12z/inh.s: New file.
* testsuite/gas/s12z/jmp.d: New file.
* testsuite/gas/s12z/jmp.s: New file.
* testsuite/gas/s12z/jsr.d: New file.
* testsuite/gas/s12z/jsr.s: New file.
* testsuite/gas/s12z/ld-imm-page2.d: New file.
* testsuite/gas/s12z/ld-imm-page2.s: New file.
* testsuite/gas/s12z/ld-imm.d: New file.
* testsuite/gas/s12z/ld-imm.s: New file.
* testsuite/gas/s12z/ld-immu18.d: New file.
* testsuite/gas/s12z/ld-immu18.s: New file.
* testsuite/gas/s12z/ld-large-direct.d: New file.
* testsuite/gas/s12z/ld-large-direct.s: New file.
* testsuite/gas/s12z/ld-opr.d: New file.
* testsuite/gas/s12z/ld-opr.s: New file.
* testsuite/gas/s12z/ld-s-opr.d: New file.
* testsuite/gas/s12z/ld-s-opr.s: New file.
* testsuite/gas/s12z/ld-small-direct.d: New file.
* testsuite/gas/s12z/ld-small-direct.s: New file.
* testsuite/gas/s12z/lea-immu18.d: New file.
* testsuite/gas/s12z/lea-immu18.s: New file.
* testsuite/gas/s12z/lea.d: New file.
* testsuite/gas/s12z/lea.s: New file.
* testsuite/gas/s12z/mac.d: New file.
* testsuite/gas/s12z/mac.s: New file.
* testsuite/gas/s12z/min-max.d: New file.
* testsuite/gas/s12z/min-max.s: New file.
* testsuite/gas/s12z/mod.d: New file.
* testsuite/gas/s12z/mod.s: New file.
* testsuite/gas/s12z/mov.d: New file.
* testsuite/gas/s12z/mov.s: New file.
* testsuite/gas/s12z/mul-imm.d: New file.
* testsuite/gas/s12z/mul-imm.s: New file.
* testsuite/gas/s12z/mul-opr-opr.d: New file.
* testsuite/gas/s12z/mul-opr-opr.s: New file.
* testsuite/gas/s12z/mul-opr.d: New file.
* testsuite/gas/s12z/mul-opr.s: New file.
* testsuite/gas/s12z/mul-reg.d: New file.
* testsuite/gas/s12z/mul-reg.s: New file.
* testsuite/gas/s12z/mul.d: New file.
* testsuite/gas/s12z/mul.s: New file.
* testsuite/gas/s12z/neg-opr.d: New file.
* testsuite/gas/s12z/neg-opr.s: New file.
* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
* testsuite/gas/s12z/opr-18u.d: New file.
* testsuite/gas/s12z/opr-18u.s: New file.
* testsuite/gas/s12z/opr-expr.d: New file.
* testsuite/gas/s12z/opr-expr.s: New file.
* testsuite/gas/s12z/opr-ext-18.d: New file.
* testsuite/gas/s12z/opr-ext-18.s: New file.
* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
* testsuite/gas/s12z/opr-idx3-reg.d: New file.
* testsuite/gas/s12z/opr-idx3-reg.s: New file.
* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
* testsuite/gas/s12z/opr-indirect-expr.d: New file.
* testsuite/gas/s12z/opr-indirect-expr.s: New file.
* testsuite/gas/s12z/opr-symbol.d: New file.
* testsuite/gas/s12z/opr-symbol.s: New file.
* testsuite/gas/s12z/or-imm.d: New file.
* testsuite/gas/s12z/or-imm.s: New file.
* testsuite/gas/s12z/or-opr.d: New file.
* testsuite/gas/s12z/or-opr.s: New file.
* testsuite/gas/s12z/p2-mul.d: New file.
* testsuite/gas/s12z/p2-mul.s: New file.
* testsuite/gas/s12z/page2-inh.d: New file.
* testsuite/gas/s12z/page2-inh.s: New file.
* testsuite/gas/s12z/psh-pul.d: New file.
* testsuite/gas/s12z/psh-pul.s: New file.
* testsuite/gas/s12z/qmul.d: New file.
* testsuite/gas/s12z/qmul.s: New file.
* testsuite/gas/s12z/rotate.d: New file.
* testsuite/gas/s12z/rotate.s: New file.
* testsuite/gas/s12z/s12z.exp: New file.
* testsuite/gas/s12z/sat.d: New file.
* testsuite/gas/s12z/sat.s: New file.
* testsuite/gas/s12z/sbc-imm.d: New file.
* testsuite/gas/s12z/sbc-imm.s: New file.
* testsuite/gas/s12z/sbc-opr.d: New file.
* testsuite/gas/s12z/sbc-opr.s: New file.
* testsuite/gas/s12z/shift.d: New file.
* testsuite/gas/s12z/shift.s: New file.
* testsuite/gas/s12z/simple-shift.d: New file.
* testsuite/gas/s12z/simple-shift.s: New file.
* testsuite/gas/s12z/single-ops.d: New file.
* testsuite/gas/s12z/single-ops.s: New file.
* testsuite/gas/s12z/specd6.d: New file.
* testsuite/gas/s12z/specd6.s: New file.
* testsuite/gas/s12z/st-large-direct.d: New file.
* testsuite/gas/s12z/st-large-direct.s: New file.
* testsuite/gas/s12z/st-opr.d: New file.
* testsuite/gas/s12z/st-opr.s: New file.
* testsuite/gas/s12z/st-s-opr.d: New file.
* testsuite/gas/s12z/st-s-opr.s: New file.
* testsuite/gas/s12z/st-small-direct.d: New file.
* testsuite/gas/s12z/st-small-direct.s: New file.
* testsuite/gas/s12z/st-xy.d: New file.
* testsuite/gas/s12z/st-xy.s: New file.
* testsuite/gas/s12z/sub-imm.d: New file.
* testsuite/gas/s12z/sub-imm.s: New file.
* testsuite/gas/s12z/sub-opr.d: New file.
* testsuite/gas/s12z/sub-opr.s: New file.
* testsuite/gas/s12z/tfr.d: New file.
* testsuite/gas/s12z/tfr.s: New file.
* testsuite/gas/s12z/trap.d: New file.
* testsuite/gas/s12z/trap.s: New file.
binutils* readelf.c: Add support for s12z architecture.
* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
targets.
https://sourceware.org/ml/binutils/2013-05/msg00271.html was supposed
to banish "file format is ambiguous" errors for ELF. It didn't,
because the code supposedly detecting formats that implement
match_priority didn't work. That was due to not placing all matching
targets into the vector of matching targets. ELF objects should all
match the generic ELF target (priority 2), plus one or more machine
specific targets (priority 1), and perhaps a single machine specific
target with OS/ABI set (priority 0, best match). So the armel object
in the testcase actually matches elf32-littlearm,
elf32-littlearm-symbian, and elf32-littlearm-vxworks (all priority 1),
and elf32-little (priority 2). As the PR reported, elf32-little
wasn't seen as matching. Fixing that part of the problem wasn't too
difficult but matching the generic ELF target as well as the ARM ELF
targets resulted in ARM testsuite failures.
These proved to be the annoying reordering of stubs that occurs from
time to time due to the stub names containing the section id.
Matching another target causes more sections to be created in
elf_object_p. If section ids change, stub names change, which results
in different hashing and can therefore result in different hash table
traversal and stub creation order. That particular problem is fixed
by resetting section_id to the initial state before attempting each
target match, and taking a snapshot of its value after a successful
match.
PR 22458
* format.c (struct bfd_preserve): Add section_id.
(bfd_preserve_save, bfd_preserve_restore): Save and restore
_bfd_section_id.
(bfd_reinit): Set _bfd_section_id.
(bfd_check_format_matches): Put all matches of any priority into
matching_vector. Save initial section id and start each attempted
match at that section id.
* libbfd-in.h (_bfd_section_id): Declare.
* section.c (_bfd_section_id): Rename from section_id and make
global. Adjust uses.
(bfd_get_next_section_id): Delete.
* elf64-ppc.c (ppc64_elf_setup_section_lists): Replace use of
bfd_get_section_id with _bfd_section_id.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
Define and handle TLS relocations for FDPIC in BFD and gas.
In gas, the new relocations are rejected if the --fdpic option was not
specified.
We also define the __tdata_start symbol to mark the start of the
.tdata section. This allows FDPIC static binaries to find the start of
.tdata section, since phdr->p_vaddr of TLS segment is not a valid
value for FDPIC.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/:
* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
(BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC): New
relocations.
* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC.
(struct elf32_arm_link_hash_table): Update comment.
(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
(IS_ARM_TLS_RELOC): Likewise.
(elf32_arm_check_relocs): Likewise.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_size_dynamic_sections): Update comment.
* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC.
gas/
* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
GOTTPOFF_FDIC relocations.
(md_apply_fix): Handle the new TLS FDPIC relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
include/
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
R_ARM_TLS_IE32_FDPIC.
ld/
* scripttempl/elf.sc: Define __tdata_start for .tdata section.
Andrew Sadek <andrew.sadek.se@gmail.com>
A new implemented feature in GCC Microblaze that allows Position
Independent Code to run using Data Text Relative addressing instead
of using Global Offset Table.
Its aim was to make 'PIC' more efficient and flexible as elf size
excess performance overhead were noticed when using GOT due to the
indirect addressing.
include/ChangeLog:
* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
* elf/microblaze.h (Add 3 new relocations):
R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
and R_MICROBLAZE_TEXTREL_32_LO for relax function.
bfd/ChangeLog:
* bfd/reloc.c (2 new BFD relocations):
BFD_RELOC_MICROBLAZE_64_TEXTPCREL &
BFD_RELOC_MICROBLAZE_64_TEXTPCREL
* bfd/bfd-in2.h: Regenerate
* bfd/libbfd.h: Regenerate
* bfd/elf32-microblaze.c (Handle new relocs): define 'HOWTO' of 3
new relocs and handle them in both relocate and relax functions.
(microblaze_elf_reloc_type_lookup): add mapping between for new
bfd relocs.
(microblaze_elf_relocate_section): Handle new relocs in case of
elf relocation.
(microblaze_elf_relax_section): Handle new relocs for elf relaxation.
gas/ChangeLog:
* gas/config/tc-microblaze.c (Handle new relocs directives in
assembler): Handle new relocs from compiler output.
(imm_types): add new imm types for data text relative addressing
TEXT_OFFSET, TEXT_PC_OFFSET
(md_convert_frag): conversion for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
BFD_RELOC_MICROBLAZE_64_TEXTPCREL
(md_apply_fix): apply fix for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
BFD_RELOC_MICROBLAZE_64_TEXTPCREL
(md_estimate_size_before_relax): estimate size for
BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
BFD_RELOC_MICROBLAZE_64_TEXTPCREL
(tc_gen_reloc): generate relocations for
BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
BFD_RELOC_MICROBLAZE_64_TEXTPCREL
ld/ChangeLog:
* ld/lexsup.c (Add 2 ld options):
(ld_options): add disable-multiple-abs-defs @ 'ld_options' array
(parse_args): parse new option and pass flag to 'link_info' struct.
* ld/ldlex.h (Add enum): add new enum @ 'option_values' enum.
* ld/ld.texinfo (Add new option): Add description for
'disable-multiple-abs-defs'
* ld/main.c: Initialize flags with false @ 'main'. Handle
disable-multiple-abs-defs @ 'mutiple_definition'.
max-page-size only matters for demand paged executables or shared
libraries, and the ideal size is the largest value used by your
operating system. Values larger than necessary just waste file space
and memory. common-page-size also affects file and memory size,
trading a possible small increase in file size for a decrease in
memory size when the operating system is using a common-page-size
page. With a powerpc max-page-size of 64k and common-page-size of 4k
many executables will use no more memory pages when the system page
size is 4k than an executable linked with -z max-page-size=0x1000,
yet will still run on a system using 64k pages. However, when running
on a system using 64k pages relro protection will not be completely
effective.
Due to the relro problem, powerpc binutils has been using a default
common-page-size of 64k since 2014-12-18 (git commit 04c6a44c7),
leading to complaints about increased file and memory sizes. People
not using relro do have a valid reason to complain..
So this patch introduces an extra back-end value to use as the default
for common-page-size when generating relro executables, and enables
the support for powerpc. Non relro executables will now be generated
with a default common-page-size of 4k.
bfd/
* elf-bfd.h (struct elf_backend_data): Add relropagesize.
* elfxx-target.h (ELF_RELROPAGESIZE): Provide default and
sanity test.
(elfNN_bed): Init relropagesize.
* bfd.c (bfd_emul_get_commonpagesize): Add boolean param to
select relropagesize.
* elf32-ppc.c (ELF_COMMONPAGESIZE): Define as 0x1000.
(ELF_RELROPAGESIZE): Define as ELF_MAXPAGESIZE.
(ELF_MINPAGESIZE): Don't define.
* elf64-ppc.c (ELF_COMMONPAGESIZE): Define as 0x1000.
(ELF_RELROPAGESIZE): Define as ELF_MAXPAGESIZE.
* bfd-in2.h: Regenerate.
ld/
* ldmain.c (main): Move config.maxpagesize and
config.commonpagesize initialization to..
* ldemul.c (after_parse_default): ..here.
* testsuite/ld-powerpc/ppc476-shared.d: Pass -z common-page-size.
* testsuite/ld-powerpc/ppc476-shared2.d: Likewise.
This patch adds the following relocation support into binutils gas.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
Those relocations includes both ip64 and ilp32 variant.
Define a SEC_FIXED_SIZE section flag for target backends to use for
output sections whose size has been fixed in the psABI. The size of
such sections will not be changed anyhow by the generic linker and it is
up to the target backend to get their size right.
bfd/
* section.c (SEC_FIXED_SIZE): New macro.
* bfd-in2.h: Regenerate.
ld/
* ldlang.c (insert_pad): Do not change output section's size if
SEC_FIXED_SIZE is set in the flags.
(size_input_section): Likewise.
(lang_size_sections_1): Likewise.
(lang_reset_memory_regions): Likewise.
Remove the SEC_HAS_GOT_REF section flag no longer in use since commit
a252afa4cdff ("Fix linking of PIC code on PA"),
<https://sourceware.org/ml/binutils/2003-08/msg00467.html>, to make the
bit position available for reuse.
bfd/
* section.c (SEC_HAS_GOT_REF): Remove macro.
* bfd-in2.h: Regenerate.
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.
Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.
bfd/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-ft32.c: Add HOWTO R_FT32_15.
* reloc.c: Add BFD_RELOC_FT32_15.
gas/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
K15.
(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.
include/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* elf/ft32.h: Add R_FT32_15.
* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
(ft32_shortcode, sc_compar, ft32_split_shortcode,
ft32_merge_shortcode, ft32_merge_shortcode): New functions.
opcodes/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
K15. Add jmpix pattern.
sim/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
* reloc.c (enum bfd_reloc_status): Start values at 2.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so
that a TRUE return indicates success. Compare the result of
calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok.
(build_one_stub): Change sense of tests against aarch64_relocate
return value.
(elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather
than FALSE, when an error is detected.
(elfNN_aarch64_final_link_relocate): Likewise.
* testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not
warnings. Expect errors about unsupported relocations.
* testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
A downside to the 2017-10-04 PR22245 fix is that bfd_set_error can now
silently accept invalid errors if/when someone passes the a value of
the wrong enumeration type, which previously would be caught by the
-Wenum-conversion warning.
PR 22245
* bfd.c (bfd_set_error): Revert 2017-10-04 change. Remove
ellipsis parameter. Split out bfd_error_on_input code to..
(bfd_set_input_error): .. New function.
* archive.c (_bfd_write_archive_contents): Use bfd_set_input_error.
* vms-lib.c (_bfd_vms_lib_write_archive_contents): Likewise.
* bfd-in2.h: Regenerate.
Passing enum as a first argument to variadic argument function
may lead to undefined behavior. The explanation on CERT site:
https://www.securecoding.cert.org/confluence/display/cplusplus/
EXP58-CPP.+Pass+an+object+of+the+correct+type+to+va_start
The bug was found by Kirill Nedostoev (nedostoev.ka@phystech.edu)
when he tried to build GNU binutils with Clang 7.
PR 22245
* bfd.c (bfd_set_error): Avoid UB on passing arg to va_start that
undergoes default promotion.
* bfd-in2.h: Regenerate.
The following relocation types were added to GCC/binutils:
ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
GCC as well to adjust the index of function calls to functions with
attribute jli_call_always.
bfd/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-arc.c (JLI): Define.
* reloc.c: Add JLI relocations.
gas/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/jli-1.d: New file.
* testsuite/gas/arc/jli-1.s: Likewise.
* testsuite/gas/arc/taux.d: Update for jli_base.
include/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* elf/arc-reloc.def: Add JLI relocs howto.
* opcode/arc-func.h (replace_jli): New function.
ld/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* emulparams/arcelf.sh (JLI_START_TABLE): Define.
* scripttempl/elfarc.sc: Handle jlitab section.
* scripttempl/elfarcv2.sc: Likewise.
* testsuite/ld-arc/arc.exp: Add JLI test.
* testsuite/ld-arc/jli-script.ld: New file.
* testsuite/ld-arc/jli-simple.dd: Likewise.
* testsuite/ld-arc/jli-simple.rd: Likewise.
* testsuite/ld-arc/jli-simple.s: Likewise.
* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.
opcode/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
(UIMM3_23): Adjust accordingly.
* arc-regs.h: Add/correct jli_base register.
* arc-tbl.h (jli_s): Likewise.
bfd_get_size and bfd_get_file_size should return the unsigned file
size. Otherwise they return negative values for file >= 2GB with
32-bit ufile_ptr.
bfd/
* bfd-in2.h: Regenerated.
* bfdio.c (bfd_get_size): Change return type to ufile_ptr.
(bfd_get_file_size): Likewise.
binutils/
* objdump.c (dump_relocs_in_section): Cast to ufile_ptr when
comparing against bfd_get_file_size return.
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with
the MIPS16e2 ASE as per documentation, including in particular:
1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW
MIPS16e2 instructions[1], for assembly and disassembly,
2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE
regular MIPS instructions[2], for assembly and disassembly,
3. ELF binary file annotation for the interAptiv MR2 MIPS architecture
extension.
4. Support for interAptiv MR2 architecture selection for assembly, in
the form of the `-march=interaptiv-mr2' command-line option and its
corresponding `arch=interaptiv-mr2' setting for the `.set' and
`.module' pseudo-ops.
5. Support for interAptiv MR2 architecture selection for disassembly,
in the form of the `mips:interaptiv-mr2' target architecture, for
use e.g. with the `-m' command-line option for `objdump'.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 interAptiv Multiprocessing System Software User's Manual",
Imagination Technologies Ltd., Document Number: MD00904, Revision
02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific
Instructions", pp. 878-883
[2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917
include/
* elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
(AFL_EXT_INTERAPTIV_MR2): Likewise.
* opcode/mips.h: Document new operand codes defined.
(INSN_INTERAPTIV_MR2): New macro.
(INSN_CHIP_MASK): Adjust accordingly.
(CPU_INTERAPTIV_MR2): New macro.
(cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
(MIPS16_ALL_ARGS): Rename to...
(MIPS_SVRS_ALL_ARGS): ... this.
(MIPS16_ALL_STATICS): Rename to...
(MIPS_SVRS_ALL_STATICS): ... this.
bfd/
* archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
* cpu-mips.c (I_interaptiv_mr2): New enum value.
(arch_info_struct): Add "mips:interaptiv-mr2" entry.
* elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
case.
(mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
(mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
`bfd_mach_mips_interaptiv_mr2' entries.
* bfd-in2.h: Regenerate.
opcodes/
* mips-formats.h (INT_BIAS): New macro.
(INT_ADJ): Redefine in INT_BIAS terms.
* mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
(mips_print_save_restore): New function.
(print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
(validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
call.
(print_insn_args): Handle OP_SAVE_RESTORE_LIST.
(print_mips16_insn_arg): Call `mips_print_save_restore' for
OP_SAVE_RESTORE_LIST handling, factored out from here.
* mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
(RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
(mips_builtin_opcodes): Add "restore" and "save" entries.
* mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
(IAMR2): New macro.
(mips16_opcodes): Add "copyw" and "ucopyw" entries.
binutils/
* readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
* NEWS: Mention Imagination interAptiv MR2 processor support.
gas/
* config/tc-mips.c (validate_mips_insn): Handle
OP_SAVE_RESTORE_LIST specially.
(mips_encode_save_restore, mips16_encode_save_restore): New
functions.
(match_save_restore_list_operand): Factor out SAVE/RESTORE
operand insertion into the instruction word or halfword to these
new functions.
(mips_cpu_info_table): Add "interaptiv-mr2" entry.
* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
`-march=' argument list.
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.
bfd/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* elfnn-riscv.c (perform_relocation): Support the new
R_RISCV_32_PCREL relocation.
(riscv_elf_relocate_section): Likewise.
* elfxx-riscv.c (howto_table): Likewise.
(riscv_reloc_map): Likewise.
* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
* libbfd.h: Regenerate.
gas/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
R_RISCV_32_PCREL relocation.
include/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* elf/riscv.h (R_RISCV_32_PCREL): New.
Chenghua Xu
Alan Modra
Andrew Jenner
John Darrington
Maciej W. Rozycki
Thomas Preud'homme
Mephi
H.J. Lu
Francois H. Theron
Christophe Lyon
Michael Eager
Renlin Li
Nick Clifton
James Bowman
James Bowman
Pedro Alves
Pavel I. Kryukov
John Eric Martin
Maciej W. Rozycki
Kuan-Lin Chen