8cb6e17571
Looking at the ARM disassembler output, every comment seems to start
with a ';' character, so I assumed this was the correct character to
start an assembler comment.
I then spotted a couple of places where there was no ';', but instead,
just a '@' character. I thought that this was a case of a missing
';', and proposed a patch to add the missing ';' characters.
Turns out I was wrong, '@' is actually the ARM assembler comment
character, while ';' is the statement separator. Thus this:
nop ;@ comment
is two statements, the first is the 'nop' instruction, while the
second contains no instructions, just the '@ comment' comment text.
This:
nop @ comment
is a single 'nop' instruction followed by a comment. And finally,
this:
nop ; comment
is two statements, the first contains the 'nop' instruction, while the
second contains the instruction 'comment', which obviously isn't
actually an instruction at all.
Why this matters is that, in the next commit, I would like to add
libopcodes syntax styling support for ARM.
The question then is how should the disassembler style the three cases
above?
As '@' is the actual comment start character then clearly the '@' and
anything after it can be styled as a comment. But what about ';' in
the second example? Style as text? Style as a comment?
And the third example is even harder, what about the 'comment' text?
Style as an instruction mnemonic? Style as text? Style as a comment?
I think the only sensible answer is to move the disassembler to use
'@' consistently as its comment character, and remove all the uses of
';'.
Then, in the next commit, it's obvious what to do.
There's obviously a *lot* of tests that get updated by this commit,
the only actual code changes are in opcodes/arm-dis.c.
38 lines
1.2 KiB
Plaintext
38 lines
1.2 KiB
Plaintext
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.*: file format .*
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Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: e52dc008 str ip, \[sp, #-8\]!
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80804: e59fc000 ldr ip, \[pc] @ 8080c <.*>
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80808: e59cf008 ldr pc, \[ip, #8\]
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8080c: 00081400 .word 0x00081400
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8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_
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80810: e59fc000 ldr ip, \[pc] @ 80818 <.*>
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80814: e59cf000 ldr pc, \[ip\]
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80818: 0008140c .word 0x0008140c
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80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc
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8081c: e59fc000 ldr ip, \[pc] @ 80824 <.*>
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80820: eafffff6 b 80800 <.*>
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80824: 00000000 .word 0x00000000
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80828: e59fc000 ldr ip, \[pc] @ 80830 <.*>
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8082c: e59cf000 ldr pc, \[ip\]
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80830: 00081410 .word 0x00081410
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80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10
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80834: e59fc000 ldr ip, \[pc] @ 8083c <.*>
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80838: eafffff0 b 80800 <.*>
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8083c: 0000000c .word 0x0000000c
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Disassembly of section \.text:
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00080c00 <_start>:
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80c00: ebffff08 bl 80828 <.*>
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80c00: R_ARM_PC24 \.plt\+0x20
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80c04: eb000000 bl 80c0c <sexternal>
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80c04: R_ARM_PC24 sexternal-0x8
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80c08: eaffff00 b 80810 <.*>
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80c08: R_ARM_PC24 \.plt\+0x8
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00080c0c <sexternal>:
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80c0c: e1a0f00e mov pc, lr
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