Alan Modra 3d7d6c1b50 opcodes int vs bfd_boolean fixes ...

cpu/
	* frv.opc (frv_is_branch_major, frv_is_float_major),
	(frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
	(frv_is_media_insn, spr_valid): Correct prototypes.
include/
	* opcode/aarch64.h (aarch64_opcode_encode): Correct prototype.
opcodes/
	* arc-dis.c (extract_operand_value): Correct NULL cast.
	* frv-opc.h: Regenerate.

2021-03-29 11:22:21 +10:30

..

bpf.cpu

bpf: xBPF SDIV, SMOD instructions

2020-09-18 10:04:23 -07:00

bpf.opc

cpu,gas,opcodes: remove no longer needed workaround from the BPF port

2020-06-04 16:17:42 +02:00

ChangeLog

opcodes int vs bfd_boolean fixes

2021-03-29 11:22:21 +10:30

cris.cpu

…

epiphany.cpu

…

epiphany.opc

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fr30.cpu

…

fr30.opc

…

frv.cpu

ubsan: frv: left shift of negative value

2020-02-01 23:23:18 +10:30

frv.opc

opcodes int vs bfd_boolean fixes

2021-03-29 11:22:21 +10:30

ip2k.cpu

…

ip2k.opc

…

iq10.cpu

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iq2000.cpu

…

iq2000.opc

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iq2000m.cpu

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lm32.cpu

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lm32.opc

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m32c.cpu

ubsan: m32c: left shift of negative value

2020-02-03 15:59:08 +10:30

m32c.opc

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m32r.cpu

Fix spelling mistakes

2020-10-05 14:20:15 +01:00

m32r.opc

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mep-avc2.cpu

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mep-avc.cpu

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mep-c5.cpu

…

mep-core.cpu

mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative value

2020-09-01 16:03:08 +09:30

mep-default.cpu

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mep-ext-cop.cpu

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mep-fmax.cpu

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mep-h1.cpu

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mep-ivc2.cpu

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mep-rhcop.cpu

…

mep-sample-ucidsp.cpu

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mep.cpu

…

mep.opc

opcodes: discriminate endianness and insn-endianness in CGEN ports

2020-06-04 16:17:42 +02:00

mt.cpu

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mt.opc

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or1k.cpu

or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts

2020-05-19 20:40:27 +09:00

or1k.opc

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or1kcommon.cpu

or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts

2020-05-19 20:40:27 +09:00

or1korbis.cpu

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or1korfpx.cpu

or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts

2020-05-19 20:40:27 +09:00

sh64-compact.cpu

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sh64-media.cpu

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sh.cpu

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sh.opc

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simplify.inc

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xc16x.cpu

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xc16x.opc

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xstormy16.cpu

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xstormy16.opc

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